blob: c6250268a3093cf2052bf6ca91a90ddff6a7e5d7 [file] [log] [blame]
Daniel Pettie7cb20f2013-10-20 05:00:51 +00001#include <string.h>
2
Brian Silvermanf92396c2013-09-12 20:13:13 -07003#include "fill_packet.h"
4#include "encoder.h"
5
6#include "FreeRTOS.h"
7#include "task.h"
8
9#include "digital.h"
10#include "analog.h"
Brian Silverman49876942013-10-11 17:50:26 -070011#include "gyro.h"
Brian Silvermanf92396c2013-09-12 20:13:13 -070012
13// How long (in ms) to wait after a falling edge on the bottom indexer sensor
14// before reading the indexer encoder.
15static const int kBottomFallDelayTime = 32;
Daniel Petti5003b772013-11-07 02:19:50 +000016
Daniel Petti6300d682013-10-14 02:12:18 +000017// How long to wait for a revolution of the shooter wheel (on the third robot)
18// before said wheel is deemed "stopped". (In secs)
Daniel Petti5003b772013-11-07 02:19:50 +000019static const float kWheelStopThreshold = 2.0;
Brian Silvermanf92396c2013-09-12 20:13:13 -070020
Brian Silvermana280ae02013-10-28 18:21:15 -070021// The timer to use for timestamping sensor readings.
22// This is a constant to avoid hard-coding it in a lot of places, but there ARE
23// things (PCONP bits, IRQ numbers, etc) that have this value in them
24// implicitly.
25#define SENSOR_TIMING_TIMER TIM1
26// How many counts per second SENSOR_TIMING_TIMER should be.
27// This will wrap the counter about every 1/3 of a second.
28static const int kSensorTimingRate = 100000;
29
Brian Silvermanf92396c2013-09-12 20:13:13 -070030#define ENC(gpio, a, b) readGPIO(gpio, a) * 2 + readGPIO(gpio, b)
31int encoder_bits(int channel) {
32 switch (channel) {
33 case 0:
34 return ENC(GPIO1, 20, 23);
35 case 1:
36 return ENC(GPIO2, 11, 12);
37 case 2:
38 return ENC(GPIO0, 21, 22);
39 case 3:
40 return ENC(GPIO0, 19, 20);
41 default:
42 return -1;
43 }
44 return -1;
45}
46#undef ENC
47
48// Uses EINT1 and EINT2 on 2.11 and 2.12.
49volatile int32_t encoder1_val;
50// On GPIO pins 0.22 and 0.21.
51volatile int32_t encoder2_val;
52// On GPIO pins 0.20 and 0.19.
53volatile int32_t encoder3_val;
54// On GPIO pins 2.0 and 2.1.
55volatile int32_t encoder4_val;
56// On GPIO pins 2.2 and 2.3.
57volatile int32_t encoder5_val;
58
Brian Silverman25aae9a2013-10-08 13:37:45 -070059// It is important to clear the various interrupt flags first thing in the ISRs.
60// It doesn't seem to work otherwise, possibly because of the reason that Brian
61// found poking around online: caches on the bus make it so that the clearing of
62// the interrupt gets to the NVIC after the ISR returns, so it runs the ISR a
63// second time. Also, by clearing them early, if a second interrupt arrives from
64// the same source it will still get handled instead of getting lost.
65
Brian Silvermanf92396c2013-09-12 20:13:13 -070066// ENC1A 2.11
67void EINT1_IRQHandler(void) {
Brian Silverman25aae9a2013-10-08 13:37:45 -070068 // Make sure to change this BEFORE clearing the interrupt like the datasheet
69 // says you have to.
Brian Silverman1623c332013-10-01 18:05:16 -070070 SC->EXTPOLAR ^= 0x2;
Brian Silvermanf92396c2013-09-12 20:13:13 -070071 SC->EXTINT = 0x2;
72 int fiopin = GPIO2->FIOPIN;
Brian Silverman25aae9a2013-10-08 13:37:45 -070073 // This looks like a weird way to XOR the 2 inputs, but it compiles down to
74 // just 2 instructions, which is hard to beat.
Brian Silvermanf92396c2013-09-12 20:13:13 -070075 if (((fiopin >> 1) ^ fiopin) & 0x800) {
76 ++encoder1_val;
77 } else {
78 --encoder1_val;
79 }
Brian Silvermanf92396c2013-09-12 20:13:13 -070080}
81// ENC1B 2.12
82void EINT2_IRQHandler(void) {
Brian Silverman1623c332013-10-01 18:05:16 -070083 SC->EXTPOLAR ^= 0x4;
Brian Silvermanf92396c2013-09-12 20:13:13 -070084 SC->EXTINT = 0x4;
85 int fiopin = GPIO2->FIOPIN;
86 if (((fiopin >> 1) ^ fiopin) & 0x800) {
87 --encoder1_val;
88 } else {
89 ++encoder1_val;
90 }
Brian Silvermanf92396c2013-09-12 20:13:13 -070091}
92
Daniel Petti6300d682013-10-14 02:12:18 +000093static inline void reset_TC(void) {
Daniel Pettie7cb20f2013-10-20 05:00:51 +000094 TIM2->TCR |= (1 << 1); // Put it into reset.
Daniel Pettie7cb20f2013-10-20 05:00:51 +000095 TIM2->TCR = 1; // Take it out of reset + make sure it's enabled.
Daniel Petti6300d682013-10-14 02:12:18 +000096}
97
Daniel Pettie7cb20f2013-10-20 05:00:51 +000098// TIM2
Daniel Pettid9c84d42013-10-15 04:51:07 +000099volatile uint32_t shooter_cycle_ticks;
Daniel Pettie7cb20f2013-10-20 05:00:51 +0000100void TIMER2_IRQHandler(void) {
Daniel Petti6300d682013-10-14 02:12:18 +0000101 // Apparently, this handler runs regardless of a match or capture event.
Daniel Pettie7cb20f2013-10-20 05:00:51 +0000102 if (TIM2->IR & (1 << 4)) {
Daniel Petti6300d682013-10-14 02:12:18 +0000103 // Capture
Daniel Pettie7cb20f2013-10-20 05:00:51 +0000104 TIM2->IR = (1 << 3); // Clear the interrupt.
Daniel Petti6300d682013-10-14 02:12:18 +0000105
Daniel Pettie7cb20f2013-10-20 05:00:51 +0000106 shooter_cycle_ticks = TIM2->CR0;
Daniel Petti6300d682013-10-14 02:12:18 +0000107
108 reset_TC();
Daniel Pettie7cb20f2013-10-20 05:00:51 +0000109 } else if (TIM2->IR & 1) {
Daniel Petti6300d682013-10-14 02:12:18 +0000110 // Match
Daniel Pettie7cb20f2013-10-20 05:00:51 +0000111 TIM2->IR = 1; // Clear the interrupt
Daniel Petti6300d682013-10-14 02:12:18 +0000112
113 // Assume shooter is stopped.
114 shooter_cycle_ticks = 0;
115
116 // Disable timer.
Daniel Pettie7cb20f2013-10-20 05:00:51 +0000117 TIM2->TCR = 0;
Daniel Petti6300d682013-10-14 02:12:18 +0000118 }
119
120 // It will only handle one interrupt per run.
121 // If there is another interrupt pending, it won't be cleared, and the ISR
122 // will be run again to handle it.
123}
124
Brian Silverman1623c332013-10-01 18:05:16 -0700125// TODO(brians): Have this indicate some kind of error instead of just looping
126// infinitely in the ISR because it never clears it.
127static void NoGPIO(void) {}
128static void Encoder2ARise(void) {
129 GPIOINT->IO0IntClr = (1 << 22);
Brian Silvermanf92396c2013-09-12 20:13:13 -0700130 if (GPIO0->FIOPIN & (1 << 21)) {
131 ++encoder2_val;
132 } else {
133 --encoder2_val;
134 }
135}
Brian Silverman1623c332013-10-01 18:05:16 -0700136static void Encoder2AFall(void) {
137 GPIOINT->IO0IntClr = (1 << 22);
Brian Silvermanf92396c2013-09-12 20:13:13 -0700138 if (GPIO0->FIOPIN & (1 << 21)) {
139 --encoder2_val;
140 } else {
141 ++encoder2_val;
142 }
143}
Brian Silverman1623c332013-10-01 18:05:16 -0700144static void Encoder2BRise(void) {
145 GPIOINT->IO0IntClr = (1 << 21);
Brian Silvermanf92396c2013-09-12 20:13:13 -0700146 if (GPIO0->FIOPIN & (1 << 22)) {
147 --encoder2_val;
148 } else {
149 ++encoder2_val;
150 }
151}
Brian Silverman1623c332013-10-01 18:05:16 -0700152static void Encoder2BFall(void) {
153 GPIOINT->IO0IntClr = (1 << 21);
Brian Silvermanf92396c2013-09-12 20:13:13 -0700154 if (GPIO0->FIOPIN & (1 << 22)) {
155 ++encoder2_val;
156 } else {
157 --encoder2_val;
158 }
159}
160
Brian Silverman1623c332013-10-01 18:05:16 -0700161static void Encoder3ARise(void) {
162 GPIOINT->IO0IntClr = (1 << 20);
Brian Silvermanf92396c2013-09-12 20:13:13 -0700163 if (GPIO0->FIOPIN & (1 << 19)) {
164 ++encoder3_val;
165 } else {
166 --encoder3_val;
167 }
168}
Brian Silverman1623c332013-10-01 18:05:16 -0700169static void Encoder3AFall(void) {
170 GPIOINT->IO0IntClr = (1 << 20);
Brian Silvermanf92396c2013-09-12 20:13:13 -0700171 if (GPIO0->FIOPIN & (1 << 19)) {
172 --encoder3_val;
173 } else {
174 ++encoder3_val;
175 }
176}
Brian Silverman1623c332013-10-01 18:05:16 -0700177static void Encoder3BRise(void) {
178 GPIOINT->IO0IntClr = (1 << 19);
Brian Silvermanf92396c2013-09-12 20:13:13 -0700179 if (GPIO0->FIOPIN & (1 << 20)) {
180 --encoder3_val;
181 } else {
182 ++encoder3_val;
183 }
184}
Brian Silverman1623c332013-10-01 18:05:16 -0700185static void Encoder3BFall(void) {
186 GPIOINT->IO0IntClr = (1 << 19);
Brian Silvermanf92396c2013-09-12 20:13:13 -0700187 if (GPIO0->FIOPIN & (1 << 20)) {
188 ++encoder3_val;
189 } else {
190 --encoder3_val;
191 }
192}
193
Brian Silverman1623c332013-10-01 18:05:16 -0700194static void Encoder4ARise(void) {
195 GPIOINT->IO2IntClr = (1 << 0);
Brian Silvermanf92396c2013-09-12 20:13:13 -0700196 if (GPIO2->FIOPIN & (1 << 1)) {
197 ++encoder4_val;
198 } else {
199 --encoder4_val;
200 }
201}
Brian Silverman1623c332013-10-01 18:05:16 -0700202static void Encoder4AFall(void) {
203 GPIOINT->IO2IntClr = (1 << 0);
Brian Silvermanf92396c2013-09-12 20:13:13 -0700204 if (GPIO2->FIOPIN & (1 << 1)) {
205 --encoder4_val;
206 } else {
207 ++encoder4_val;
208 }
209}
Brian Silverman1623c332013-10-01 18:05:16 -0700210static void Encoder4BRise(void) {
211 GPIOINT->IO2IntClr = (1 << 1);
Brian Silvermanf92396c2013-09-12 20:13:13 -0700212 if (GPIO2->FIOPIN & (1 << 0)) {
213 --encoder4_val;
214 } else {
215 ++encoder4_val;
216 }
217}
Brian Silverman1623c332013-10-01 18:05:16 -0700218static void Encoder4BFall(void) {
219 GPIOINT->IO2IntClr = (1 << 1);
Brian Silvermanf92396c2013-09-12 20:13:13 -0700220 if (GPIO2->FIOPIN & (1 << 0)) {
221 ++encoder4_val;
222 } else {
223 --encoder4_val;
224 }
225}
226
Brian Silverman1623c332013-10-01 18:05:16 -0700227static void Encoder5ARise(void) {
228 GPIOINT->IO2IntClr = (1 << 2);
Brian Silvermanf92396c2013-09-12 20:13:13 -0700229 if (GPIO2->FIOPIN & (1 << 3)) {
230 ++encoder5_val;
231 } else {
232 --encoder5_val;
233 }
234}
Brian Silverman1623c332013-10-01 18:05:16 -0700235static void Encoder5AFall(void) {
236 GPIOINT->IO2IntClr = (1 << 2);
Brian Silvermanf92396c2013-09-12 20:13:13 -0700237 if (GPIO2->FIOPIN & (1 << 3)) {
238 --encoder5_val;
239 } else {
240 ++encoder5_val;
241 }
242}
Brian Silverman1623c332013-10-01 18:05:16 -0700243static void Encoder5BRise(void) {
244 GPIOINT->IO2IntClr = (1 << 3);
Brian Silvermanf92396c2013-09-12 20:13:13 -0700245 if (GPIO2->FIOPIN & (1 << 2)) {
246 --encoder5_val;
247 } else {
248 ++encoder5_val;
249 }
250}
Brian Silverman1623c332013-10-01 18:05:16 -0700251static void Encoder5BFall(void) {
252 GPIOINT->IO2IntClr = (1 << 3);
Brian Silvermanf92396c2013-09-12 20:13:13 -0700253 if (GPIO2->FIOPIN & (1 << 2)) {
254 ++encoder5_val;
255 } else {
256 --encoder5_val;
257 }
258}
259
260volatile int32_t capture_top_rise;
261volatile int8_t top_rise_count;
Brian Silverman1623c332013-10-01 18:05:16 -0700262static void IndexerTopRise(void) {
263 GPIOINT->IO0IntClr = (1 << 5);
Brian Silvermanf92396c2013-09-12 20:13:13 -0700264 // edge counting encoder capture
265 ++top_rise_count;
266 capture_top_rise = encoder3_val;
267}
268volatile int32_t capture_top_fall;
269volatile int8_t top_fall_count;
Brian Silverman1623c332013-10-01 18:05:16 -0700270static void IndexerTopFall(void) {
271 GPIOINT->IO0IntClr = (1 << 5);
Brian Silvermanf92396c2013-09-12 20:13:13 -0700272 // edge counting encoder capture
273 ++top_fall_count;
274 capture_top_fall = encoder3_val;
275}
276volatile int8_t bottom_rise_count;
Brian Silverman1623c332013-10-01 18:05:16 -0700277static void IndexerBottomRise(void) {
278 GPIOINT->IO0IntClr = (1 << 4);
Brian Silvermanf92396c2013-09-12 20:13:13 -0700279 // edge counting
280 ++bottom_rise_count;
281}
282volatile int32_t capture_bottom_fall_delay;
283volatile int8_t bottom_fall_delay_count;
Brian Silvermanf92396c2013-09-12 20:13:13 -0700284portTickType xDelayTimeFrom;
285static portTASK_FUNCTION(vDelayCapture, pvParameters)
286{
287 portTickType xSleepFrom = xTaskGetTickCount();
288
289 for (;;) {
Brian Silverman25aae9a2013-10-08 13:37:45 -0700290 // Atomically (wrt the ISR) switch xDelayTimeFrom to 0 and store its old
291 // value to use later.
Brian Silvermanf92396c2013-09-12 20:13:13 -0700292 NVIC_DisableIRQ(EINT3_IRQn);
Brian Silverman25aae9a2013-10-08 13:37:45 -0700293 portTickType new_time = xDelayTimeFrom;
294 xDelayTimeFrom = 0;
295 NVIC_EnableIRQ(EINT3_IRQn);
296
297 if (new_time != 0) {
298 xSleepFrom = new_time;
Brian Silvermanf92396c2013-09-12 20:13:13 -0700299
300 vTaskDelayUntil(&xSleepFrom, kBottomFallDelayTime / portTICK_RATE_MS);
301
Brian Silverman25aae9a2013-10-08 13:37:45 -0700302 // Make sure that the USB ISR doesn't look at inconsistent values.
Brian Silverman1623c332013-10-01 18:05:16 -0700303 NVIC_DisableIRQ(USB_IRQn);
Brian Silvermanf92396c2013-09-12 20:13:13 -0700304 capture_bottom_fall_delay = encoder3_val;
Brian Silverman1623c332013-10-01 18:05:16 -0700305 ++bottom_fall_delay_count;
306 NVIC_EnableIRQ(USB_IRQn);
Brian Silvermanf92396c2013-09-12 20:13:13 -0700307 } else {
Brian Silverman25aae9a2013-10-08 13:37:45 -0700308 // Wait 10ms and then check again.
Brian Silvermanf92396c2013-09-12 20:13:13 -0700309 vTaskDelayUntil(&xSleepFrom, 10 / portTICK_RATE_MS);
310 }
311 }
312}
313
314volatile int8_t bottom_fall_count;
Brian Silverman1623c332013-10-01 18:05:16 -0700315static void IndexerBottomFall(void) {
316 GPIOINT->IO0IntClr = (1 << 4);
Brian Silvermanf92396c2013-09-12 20:13:13 -0700317 ++bottom_fall_count;
318 // edge counting start delayed capture
319 xDelayTimeFrom = xTaskGetTickCount();
Brian Silvermanf92396c2013-09-12 20:13:13 -0700320}
321volatile int32_t capture_wrist_rise;
322volatile int8_t wrist_rise_count;
Brian Silverman1623c332013-10-01 18:05:16 -0700323static void WristHallRise(void) {
324 GPIOINT->IO0IntClr = (1 << 6);
Brian Silvermanf92396c2013-09-12 20:13:13 -0700325 // edge counting encoder capture
326 ++wrist_rise_count;
327 capture_wrist_rise = (int32_t)QEI->QEIPOS;
328}
329volatile int32_t capture_shooter_angle_rise;
330volatile int8_t shooter_angle_rise_count;
Brian Silverman1623c332013-10-01 18:05:16 -0700331static void ShooterHallRise(void) {
332 GPIOINT->IO0IntClr = (1 << 7);
Brian Silvermanf92396c2013-09-12 20:13:13 -0700333 // edge counting encoder capture
334 ++shooter_angle_rise_count;
335 capture_shooter_angle_rise = encoder2_val;
336}
Daniel Pettie7cb20f2013-10-20 05:00:51 +0000337
338// Third robot shooter.
Daniel Petti6300d682013-10-14 02:12:18 +0000339static void ShooterPhotoFall(void) {
340 GPIOINT->IO0IntClr = (1 << 23);
341 // We reset TC to make sure we don't get a crap
342 // value from CR0 when the capture interrupt occurs
Daniel Pettie7cb20f2013-10-20 05:00:51 +0000343 // if the shooter is just starting up again, and so
344 // that the match interrupt thing works right.
Daniel Petti6300d682013-10-14 02:12:18 +0000345 reset_TC();
346}
Brian Silvermanf92396c2013-09-12 20:13:13 -0700347
Daniel Pettie7cb20f2013-10-20 05:00:51 +0000348typedef void (*Handler)(void);
349// Contains default pointers for ISR functions.
350// (These can be used without modifications on the comp/practice bots.)
351Handler ISRTable[] = {
Brian Silvermanf92396c2013-09-12 20:13:13 -0700352 Encoder5BFall, // index 0: P2.3 Fall #bit 31 //Encoder 5 B //Dio 10
353 Encoder5AFall, // index 1: P2.2 Fall #bit 30 //Encoder 5 A //Dio 9
354 Encoder4BFall, // index 2: P2.1 Fall #bit 29 //Encoder 4 B //Dio 8
355 Encoder4AFall, // index 3: P2.0 Fall #bit 28 //Encoder 4 A //Dio 7
Daniel Pettie7cb20f2013-10-20 05:00:51 +0000356 NoGPIO, // index 4: NO GPIO #bit 27
Brian Silvermanf92396c2013-09-12 20:13:13 -0700357 Encoder2AFall, // index 5: P0.22 Fall #bit 26 //Encoder 2 A
358 Encoder2BFall, // index 6: P0.21 Fall #bit 25 //Encoder 2 B
359 Encoder3AFall, // index 7: P0.20 Fall #bit 24 //Encoder 3 A
360 Encoder3BFall, // index 8: P0.19 Fall #bit 23 //Encoder 3 B
361 Encoder2ARise, // index 9: P0.22 Rise #bit 22 //Encoder 2 A
362 Encoder2BRise, // index 10: P0.21 Rise #bit 21 //Encoder 2 B
363 Encoder3ARise, // index 11: P0.20 Rise #bit 20 //Encoder 3 A
364 Encoder3BRise, // index 12: P0.19 Rise #bit 19 //Encoder 3 B
365 NoGPIO, // index 13: NO GPIO #bit 18
366 NoGPIO, // index 14: NO GPIO #bit 17
367 NoGPIO, // index 15: NO GPIO #bit 16
368 NoGPIO, // index 16: NO GPIO #bit 15
369 NoGPIO, // index 17: NO GPIO #bit 14
370 NoGPIO, // index 18: NO GPIO #bit 13
371 NoGPIO, // index 19: NO GPIO #bit 12
372 ShooterHallRise, // index 20: P0.7 Fall #bit 11 //Shooter Hall //Dio 4
373 WristHallRise, // index 21: P0.6 Fall #bit 10 //Wrist Hall //Dio 3
374 IndexerTopRise, // index 22: P0.5 Fall #bit 9 //Indexer Top //Dio 2
375 IndexerBottomRise, // index 23: P0.4 Fall #bit 8 //Indexer Bottom //Dio 1
376 NoGPIO, // index 24: NO GPIO #bit 7
377 NoGPIO, // index 25: NO GPIO #bit 6
378 IndexerTopFall, // index 26: P0.5 Rise #bit 5 //Indexer Top //Dio 2
379 IndexerBottomFall, // index 27: P0.4 Rise #bit 4 //Indexer Bottom //Dio 1
380 Encoder5BRise, // index 28: P2.3 Rise #bit 3 //Encoder 5 B //Dio 10
381 Encoder5ARise, // index 29: P2.2 Rise #bit 2 //Encoder 5 A //Dio 9
382 Encoder4BRise, // index 30: P2.1 Rise #bit 1 //Encoder 4 B //Dio 8
383 Encoder4ARise, // index 31: P2.0 Rise #bit 0 //Encoder 4 A //Dio 7
384 NoGPIO // index 32: NO BITS SET #False Alarm
Daniel Pettie7cb20f2013-10-20 05:00:51 +0000385};
386
387// Count leading zeros.
388// Returns 0 if bit 31 is set etc.
389__attribute__((always_inline)) static __INLINE uint32_t __clz(uint32_t value) {
390 uint32_t result;
391 __asm__("clz %0, %1" : "=r" (result) : "r" (value));
392 return result;
393}
394inline static void IRQ_Dispatch(void) {
395 // There is no need to add a loop here to handle multiple interrupts at the
396 // same time because the processor has tail chaining of interrupts which we
397 // can't really beat with our own loop.
398 // It would actually be bad because a loop here would block EINT1/2 for longer
399 // lengths of time.
400
401 uint32_t index = __clz(GPIOINT->IO2IntStatR | GPIOINT->IO0IntStatR |
402 (GPIOINT->IO2IntStatF << 28) | (GPIOINT->IO0IntStatF << 4));
403
404 ISRTable[index]();
Brian Silvermanf92396c2013-09-12 20:13:13 -0700405}
406void EINT3_IRQHandler(void) {
Brian Silvermanf92396c2013-09-12 20:13:13 -0700407 IRQ_Dispatch();
Brian Silvermanf92396c2013-09-12 20:13:13 -0700408}
Daniel Pettie7cb20f2013-10-20 05:00:51 +0000409
Brian Silvermanf92396c2013-09-12 20:13:13 -0700410int32_t encoder_val(int chan) {
411 int32_t val;
412 switch (chan) {
413 case 0: // Wrist
414 return (int32_t)QEI->QEIPOS;
415 case 1: // Shooter Wheel
416 NVIC_DisableIRQ(EINT1_IRQn);
417 NVIC_DisableIRQ(EINT2_IRQn);
418 val = encoder1_val;
419 NVIC_EnableIRQ(EINT2_IRQn);
420 NVIC_EnableIRQ(EINT1_IRQn);
421 return val;
422 case 2: // Shooter Angle
423 NVIC_DisableIRQ(EINT3_IRQn);
424 val = encoder2_val;
425 NVIC_EnableIRQ(EINT3_IRQn);
426 return val;
427 case 3: // Indexer
428 NVIC_DisableIRQ(EINT3_IRQn);
429 val = encoder3_val;
430 NVIC_EnableIRQ(EINT3_IRQn);
431 return val;
432 case 4: // Drive R
433 NVIC_DisableIRQ(EINT3_IRQn);
434 val = encoder4_val;
435 NVIC_EnableIRQ(EINT3_IRQn);
436 return val;
437 case 5: // Drive L
438 NVIC_DisableIRQ(EINT3_IRQn);
439 val = encoder5_val;
440 NVIC_EnableIRQ(EINT3_IRQn);
441 return val;
442 default:
443 return -1;
444 }
445}
446
Brian Silvermana280ae02013-10-28 18:21:15 -0700447static volatile uint32_t sensor_timing_wraps = 0;
448
449void TIMER1_IRQHandler(void) {
450 SENSOR_TIMING_TIMER->IR = 1 << 0; // clear channel 0 match
451 ++sensor_timing_wraps;
452}
453
Brian Silvermanf92396c2013-09-12 20:13:13 -0700454void encoder_init(void) {
Brian Silvermana280ae02013-10-28 18:21:15 -0700455 // Set up the timer for timestamping sensor readings.
456 SC->PCONP |= 1 << 2;
457 SENSOR_TIMING_TIMER->PR = (configCPU_CLOCK_HZ / kSensorTimingRate) - 1UL;
458 SENSOR_TIMING_TIMER->TC = 1; // don't match the first time around
459 SENSOR_TIMING_TIMER->MR0 = 0; // match every time it wraps
460 SENSOR_TIMING_TIMER->MCR = 1 << 0; // interrupt on match channel 0
461 // Priority 4 is higher than any FreeRTOS-managed stuff (ie USB), but lower
462 // than encoders etc.
463 NVIC_SetPriority(TIMER1_IRQn, 4);
464 NVIC_EnableIRQ(TIMER1_IRQn);
465 SENSOR_TIMING_TIMER->TCR = 1; // enable it
466
Brian Silvermanf92396c2013-09-12 20:13:13 -0700467 // Setup the encoder interface.
468 SC->PCONP |= PCONP_PCQEI;
469 PINCON->PINSEL3 = ((PINCON->PINSEL3 & 0xffff3dff) | 0x00004100);
470 // Reset the count and velocity.
471 QEI->QEICON = 0x00000005;
472 QEI->QEICONF = 0x00000004;
473 // Wrap back to 0 when we wrap the int and vice versa.
474 QEI->QEIMAXPOS = 0xFFFFFFFF;
Daniel Pettid9c84d42013-10-15 04:51:07 +0000475
Daniel Petti433d6432013-11-01 05:10:28 +0000476 // Set up encoder 2.
477 GPIOINT->IO0IntEnF |= (1 << 22); // Set GPIO falling interrupt.
478 GPIOINT->IO0IntEnR |= (1 << 22); // Set GPIO rising interrupt.
479 GPIOINT->IO0IntEnF |= (1 << 21); // Set GPIO falling interrupt.
480 GPIOINT->IO0IntEnR |= (1 << 21); // Set GPIO rising interrupt.
Brian Silvermanf92396c2013-09-12 20:13:13 -0700481 // Make sure they're in mode 00 (the default, aka nothing special).
Daniel Petti433d6432013-11-01 05:10:28 +0000482 PINCON->PINSEL1 &= ~(0x3 << 12);
483 PINCON->PINSEL1 &= ~(0x3 << 10);
484 encoder2_val = 0;
Brian Silvermanf92396c2013-09-12 20:13:13 -0700485
Daniel Petti433d6432013-11-01 05:10:28 +0000486 // Set up encoder 3.
487 GPIOINT->IO0IntEnF |= (1 << 20); // Set GPIO falling interrupt.
488 GPIOINT->IO0IntEnR |= (1 << 20); // Set GPIO rising interrupt.
489 GPIOINT->IO0IntEnF |= (1 << 19); // Set GPIO falling interrupt.
490 GPIOINT->IO0IntEnR |= (1 << 19); // Set GPIO rising interrupt.
Brian Silvermanf92396c2013-09-12 20:13:13 -0700491 // Make sure they're in mode 00 (the default, aka nothing special).
Daniel Petti433d6432013-11-01 05:10:28 +0000492 PINCON->PINSEL1 &= ~(0x3 << 8);
493 PINCON->PINSEL1 &= ~(0x3 << 6);
494 encoder3_val = 0;
495
Brian Silvermanf92396c2013-09-12 20:13:13 -0700496 // Enable interrupts from the GPIO pins.
497 NVIC_EnableIRQ(EINT3_IRQn);
498
499 if (is_bot3) {
Daniel Pettie7cb20f2013-10-20 05:00:51 +0000500 // Modify robot handler table for third robot.
501 ISRTable[23] = ShooterPhotoFall;
502
Daniel Petti6300d682013-10-14 02:12:18 +0000503 // Set up timer for bot3 photosensor.
Daniel Pettie7cb20f2013-10-20 05:00:51 +0000504 // Make sure timer two is powered.
505 SC->PCONP |= (1 << 22);
Daniel Petti5003b772013-11-07 02:19:50 +0000506 // Rate of clock signal is just CCLK.
507 SC->PCLKSEL1 |= (1 << 12);
Daniel Pettie7cb20f2013-10-20 05:00:51 +0000508 // Select capture 2.0 function on pin 0.4.
509 PINCON->PINSEL0 |= (0x3 << 8);
Daniel Petti6300d682013-10-14 02:12:18 +0000510 // Set timer to capture and interrupt on rising edge.
Daniel Pettie7cb20f2013-10-20 05:00:51 +0000511 TIM2->CCR = 0x5;
Daniel Petti6300d682013-10-14 02:12:18 +0000512 // Set up match interrupt.
Daniel Petti5003b772013-11-07 02:19:50 +0000513 TIM2->MR0 = kWheelStopThreshold * (10 ^ 8);
Daniel Pettie7cb20f2013-10-20 05:00:51 +0000514 TIM2->MCR = 1;
Daniel Petti6300d682013-10-14 02:12:18 +0000515 // Enable timer IRQ, and make it lower priority than the encoders.
516 NVIC_SetPriority(TIMER3_IRQn, 1);
517 NVIC_EnableIRQ(TIMER3_IRQn);
518 // Set up GPIO interrupt on other edge.
Daniel Petti6300d682013-10-14 02:12:18 +0000519 GPIOINT->IO0IntEnF |= (1 << 23);
Daniel Pettid9c84d42013-10-15 04:51:07 +0000520
Brian Silvermanf92396c2013-09-12 20:13:13 -0700521 } else { // is main robot
Daniel Pettid9c84d42013-10-15 04:51:07 +0000522 // Set up encoder 1.
523 // Make GPIOs 2.11 and 2.12 trigger EINT1 and EINT2 (respectively).
524 // PINSEL4[23:22] = {0 1}
525 // PINSEL4[25:24] = {0 1}
526 PINCON->PINSEL4 = (PINCON->PINSEL4 & ~(0x3 << 22)) | (0x1 << 22);
527 PINCON->PINSEL4 = (PINCON->PINSEL4 & ~(0x3 << 24)) | (0x1 << 24);
528 // Clear the interrupt flags for EINT1 and EINT2 (0x6 = 0b0110).
529 SC->EXTMODE = 0x6;
530 SC->EXTINT = 0x6;
531 NVIC_EnableIRQ(EINT1_IRQn);
532 NVIC_EnableIRQ(EINT2_IRQn);
533 encoder1_val = 0;
534
Daniel Petti433d6432013-11-01 05:10:28 +0000535 // Set up encoder 4.
536 GPIOINT->IO2IntEnF |= (1 << 0); // Set GPIO falling interrupt.
537 GPIOINT->IO2IntEnR |= (1 << 0); // Set GPIO rising interrupt.
538 GPIOINT->IO2IntEnF |= (1 << 1); // Set GPIO falling interrupt.
539 GPIOINT->IO2IntEnR |= (1 << 1); // Set GPIO rising interrupt.
Daniel Pettid9c84d42013-10-15 04:51:07 +0000540 // Make sure they're in mode 00 (the default, aka nothing special).
Daniel Petti433d6432013-11-01 05:10:28 +0000541 PINCON->PINSEL4 &= ~(0x3 << 0);
542 PINCON->PINSEL4 &= ~(0x3 << 2);
543 encoder4_val = 0;
Daniel Pettid9c84d42013-10-15 04:51:07 +0000544
Daniel Petti433d6432013-11-01 05:10:28 +0000545 // Set up encoder 5.
546 GPIOINT->IO2IntEnF |= (1 << 2); // Set GPIO falling interrupt.
547 GPIOINT->IO2IntEnR |= (1 << 2); // Set GPIO rising interrupt.
548 GPIOINT->IO2IntEnF |= (1 << 3); // Set GPIO falling interrupt.
549 GPIOINT->IO2IntEnR |= (1 << 3); // Set GPIO rising interrupt.
Daniel Pettid9c84d42013-10-15 04:51:07 +0000550 // Make sure they're in mode 00 (the default, aka nothing special).
Daniel Petti433d6432013-11-01 05:10:28 +0000551 PINCON->PINSEL4 &= ~(0x3 << 4);
552 PINCON->PINSEL4 &= ~(0x3 << 6);
553 encoder5_val = 0;
554
Daniel Pettid9c84d42013-10-15 04:51:07 +0000555
Brian Silvermanf92396c2013-09-12 20:13:13 -0700556 xTaskCreate(vDelayCapture,
557 (signed char *) "SENSORs",
558 configMINIMAL_STACK_SIZE + 100,
559 NULL /*parameters*/,
560 tskIDLE_PRIORITY + 5,
561 NULL /*return task handle*/);
562
563 GPIOINT->IO0IntEnF |= (1 << 4); // Set GPIO falling interrupt
564 GPIOINT->IO0IntEnR |= (1 << 4); // Set GPIO rising interrupt
565 PINCON->PINSEL0 &= ~(0x3 << 8);
566
567 GPIOINT->IO0IntEnF |= (1 << 5); // Set GPIO falling interrupt
568 GPIOINT->IO0IntEnR |= (1 << 5); // Set GPIO rising interrupt
569 PINCON->PINSEL0 &= ~(0x3 << 10);
570
571 GPIOINT->IO0IntEnF |= (1 << 6);
572 PINCON->PINSEL0 &= ~(0x3 << 12);
573
574 GPIOINT->IO0IntEnF |= (1 << 7);
575 PINCON->PINSEL0 &= ~(0x3 << 14);
576 }
577}
578
579void fillSensorPacket(struct DataStruct *packet) {
Brian Silvermand36b7d32013-10-24 15:56:47 -0700580 if (gyro_output.initialized) {
581 packet->gyro_angle = gyro_output.angle;
582 packet->old_gyro_reading = gyro_output.last_reading_bad;
583 packet->bad_gyro = gyro_output.gyro_bad;
584 } else {
585 packet->gyro_angle = 0;
586 packet->old_gyro_reading = 1;
587 packet->bad_gyro = 0;
588 }
Brian Silvermanf92396c2013-09-12 20:13:13 -0700589
Brian Silvermana280ae02013-10-28 18:21:15 -0700590 NVIC_DisableIRQ(TIMER1_IRQn);
591 packet->timestamp = ((uint64_t)sensor_timing_wraps << 32) | TIM1->TC;
592 NVIC_EnableIRQ(TIMER1_IRQn);
593
Brian Silvermanf92396c2013-09-12 20:13:13 -0700594 packet->dip_switch0 = dip_switch(0);
595 packet->dip_switch1 = dip_switch(1);
596 packet->dip_switch2 = dip_switch(2);
597 packet->dip_switch3 = dip_switch(3);
598
Brian Silverman25aae9a2013-10-08 13:37:45 -0700599 // We disable EINT3 to avoid sending back inconsistent values. All of the
600 // aligned reads from the variables are atomic, so disabling it isn't
601 // necessary for just reading encoder values. We re-enable it periodically
602 // because disabling and enabling is cheap (2 instructions) and we really rely
603 // on low interrupt latencies.
604
Brian Silvermanf92396c2013-09-12 20:13:13 -0700605 if (is_bot3) {
606 packet->robot_id = 1;
Daniel Pettid9c84d42013-10-15 04:51:07 +0000607
Daniel Petti433d6432013-11-01 05:10:28 +0000608 packet->main.left_drive = encoder3_val;
609 packet->main.right_drive = encoder2_val;
610
Daniel Pettid9c84d42013-10-15 04:51:07 +0000611 packet->bot3.shooter_cycle_ticks = shooter_cycle_ticks;
Brian Silvermanf92396c2013-09-12 20:13:13 -0700612 } else { // is main robot
Brian Silverman74acd622013-10-26 14:47:14 -0700613 packet->robot_id = 2;
Brian Silvermanf92396c2013-09-12 20:13:13 -0700614
Daniel Petti433d6432013-11-01 05:10:28 +0000615 packet->main.left_drive = encoder5_val;
616 packet->main.right_drive = encoder4_val;
617
Brian Silvermanf92396c2013-09-12 20:13:13 -0700618 packet->main.shooter = encoder1_val;
Brian Silvermanf92396c2013-09-12 20:13:13 -0700619 packet->main.indexer = encoder3_val;
Brian Silverman1ba46c72013-10-31 16:05:57 -0700620 packet->main.battery_voltage = analog(3);
Brian Silverman74acd622013-10-26 14:47:14 -0700621 packet->main.left_drive_hall = analog(1);
Brian Silverman1ba46c72013-10-31 16:05:57 -0700622 packet->main.right_drive_hall = analog(2);
Brian Silvermanf92396c2013-09-12 20:13:13 -0700623
Brian Silverman25aae9a2013-10-08 13:37:45 -0700624 NVIC_DisableIRQ(EINT3_IRQn);
Brian Silvermanf92396c2013-09-12 20:13:13 -0700625
626 packet->main.wrist = (int32_t)QEI->QEIPOS;
627 packet->main.wrist_hall_effect = !digital(3);
628 packet->main.capture_wrist_rise = capture_wrist_rise;
629 packet->main.wrist_rise_count = wrist_rise_count;
630
Brian Silverman25aae9a2013-10-08 13:37:45 -0700631 NVIC_EnableIRQ(EINT3_IRQn);
Brian Silvermanf92396c2013-09-12 20:13:13 -0700632 NVIC_DisableIRQ(EINT3_IRQn);
633
634 packet->main.capture_top_rise = capture_top_rise;
635 packet->main.top_rise_count = top_rise_count;
Brian Silvermanf92396c2013-09-12 20:13:13 -0700636 packet->main.capture_top_fall = capture_top_fall;
637 packet->main.top_fall_count = top_fall_count;
638 packet->main.top_disc = !digital(2);
639
Brian Silverman25aae9a2013-10-08 13:37:45 -0700640 NVIC_EnableIRQ(EINT3_IRQn);
641 NVIC_DisableIRQ(EINT3_IRQn);
642
Brian Silvermanf92396c2013-09-12 20:13:13 -0700643 packet->main.capture_bottom_fall_delay = capture_bottom_fall_delay;
644 packet->main.bottom_fall_delay_count = bottom_fall_delay_count;
645 packet->main.bottom_fall_count = bottom_fall_count;
646 packet->main.bottom_disc = !digital(1);
647
Brian Silverman25aae9a2013-10-08 13:37:45 -0700648 NVIC_EnableIRQ(EINT3_IRQn);
649 NVIC_DisableIRQ(EINT3_IRQn);
650
Brian Silverman1623c332013-10-01 18:05:16 -0700651 packet->main.loader_top = !digital(5);
652 packet->main.loader_bottom = !digital(6);
653
Brian Silverman25aae9a2013-10-08 13:37:45 -0700654 NVIC_EnableIRQ(EINT3_IRQn);
655 NVIC_DisableIRQ(EINT3_IRQn);
656
657 packet->main.shooter_angle = encoder2_val;
Brian Silvermanf92396c2013-09-12 20:13:13 -0700658 packet->main.capture_shooter_angle_rise = capture_shooter_angle_rise;
659 packet->main.shooter_angle_rise_count = shooter_angle_rise_count;
660 packet->main.angle_adjust_bottom_hall_effect = !digital(4);
661
662 NVIC_EnableIRQ(EINT3_IRQn);
663
664 packet->main.bottom_rise_count = bottom_rise_count;
665 }
666}