blob: ff0a2827aee846ddbd17f2aa751f7b446b8868cb [file] [log] [blame]
Brian Silvermanf92396c2013-09-12 20:13:13 -07001#include "fill_packet.h"
2#include "encoder.h"
3
4#include "FreeRTOS.h"
5#include "task.h"
6
7#include "digital.h"
8#include "analog.h"
9
10// How long (in ms) to wait after a falling edge on the bottom indexer sensor
11// before reading the indexer encoder.
12static const int kBottomFallDelayTime = 32;
13
14#define ENC(gpio, a, b) readGPIO(gpio, a) * 2 + readGPIO(gpio, b)
15int encoder_bits(int channel) {
16 switch (channel) {
17 case 0:
18 return ENC(GPIO1, 20, 23);
19 case 1:
20 return ENC(GPIO2, 11, 12);
21 case 2:
22 return ENC(GPIO0, 21, 22);
23 case 3:
24 return ENC(GPIO0, 19, 20);
25 default:
26 return -1;
27 }
28 return -1;
29}
30#undef ENC
31
32// Uses EINT1 and EINT2 on 2.11 and 2.12.
33volatile int32_t encoder1_val;
34// On GPIO pins 0.22 and 0.21.
35volatile int32_t encoder2_val;
36// On GPIO pins 0.20 and 0.19.
37volatile int32_t encoder3_val;
38// On GPIO pins 2.0 and 2.1.
39volatile int32_t encoder4_val;
40// On GPIO pins 2.2 and 2.3.
41volatile int32_t encoder5_val;
42
43// ENC1A 2.11
44void EINT1_IRQHandler(void) {
45 // TODO(brians): figure out why this has to be up here too
46 SC->EXTINT = 0x2;
47 int fiopin = GPIO2->FIOPIN;
48 if (((fiopin >> 1) ^ fiopin) & 0x800) {
49 ++encoder1_val;
50 } else {
51 --encoder1_val;
52 }
53 SC->EXTPOLAR ^= 0x2;
54 SC->EXTINT = 0x2;
55}
56// ENC1B 2.12
57void EINT2_IRQHandler(void) {
58 SC->EXTINT = 0x4;
59 int fiopin = GPIO2->FIOPIN;
60 if (((fiopin >> 1) ^ fiopin) & 0x800) {
61 --encoder1_val;
62 } else {
63 ++encoder1_val;
64 }
65 SC->EXTPOLAR ^= 0x4;
66 SC->EXTINT = 0x4;
67}
68
69// GPIO Interrupt handlers
70static void NoGPIO() {}
71static void Encoder2ARise() {
72 GPIOINT->IO0IntClr |= (1 << 22);
73 if (GPIO0->FIOPIN & (1 << 21)) {
74 ++encoder2_val;
75 } else {
76 --encoder2_val;
77 }
78}
79static void Encoder2AFall() {
80 GPIOINT->IO0IntClr |= (1 << 22);
81 if (GPIO0->FIOPIN & (1 << 21)) {
82 --encoder2_val;
83 } else {
84 ++encoder2_val;
85 }
86}
87static void Encoder2BRise() {
88 GPIOINT->IO0IntClr |= (1 << 21);
89 if (GPIO0->FIOPIN & (1 << 22)) {
90 --encoder2_val;
91 } else {
92 ++encoder2_val;
93 }
94}
95static void Encoder2BFall() {
96 GPIOINT->IO0IntClr |= (1 << 21);
97 if (GPIO0->FIOPIN & (1 << 22)) {
98 ++encoder2_val;
99 } else {
100 --encoder2_val;
101 }
102}
103
104static void Encoder3ARise() {
105 GPIOINT->IO0IntClr |= (1 << 20);
106 if (GPIO0->FIOPIN & (1 << 19)) {
107 ++encoder3_val;
108 } else {
109 --encoder3_val;
110 }
111}
112static void Encoder3AFall() {
113 GPIOINT->IO0IntClr |= (1 << 20);
114 if (GPIO0->FIOPIN & (1 << 19)) {
115 --encoder3_val;
116 } else {
117 ++encoder3_val;
118 }
119}
120static void Encoder3BRise() {
121 GPIOINT->IO0IntClr |= (1 << 19);
122 if (GPIO0->FIOPIN & (1 << 20)) {
123 --encoder3_val;
124 } else {
125 ++encoder3_val;
126 }
127}
128static void Encoder3BFall() {
129 GPIOINT->IO0IntClr |= (1 << 19);
130 if (GPIO0->FIOPIN & (1 << 20)) {
131 ++encoder3_val;
132 } else {
133 --encoder3_val;
134 }
135}
136
137static void Encoder4ARise() {
138 GPIOINT->IO2IntClr |= (1 << 0);
139 if (GPIO2->FIOPIN & (1 << 1)) {
140 ++encoder4_val;
141 } else {
142 --encoder4_val;
143 }
144}
145static void Encoder4AFall() {
146 GPIOINT->IO2IntClr |= (1 << 0);
147 if (GPIO2->FIOPIN & (1 << 1)) {
148 --encoder4_val;
149 } else {
150 ++encoder4_val;
151 }
152}
153static void Encoder4BRise() {
154 GPIOINT->IO2IntClr |= (1 << 1);
155 if (GPIO2->FIOPIN & (1 << 0)) {
156 --encoder4_val;
157 } else {
158 ++encoder4_val;
159 }
160}
161static void Encoder4BFall() {
162 GPIOINT->IO2IntClr |= (1 << 1);
163 if (GPIO2->FIOPIN & (1 << 0)) {
164 ++encoder4_val;
165 } else {
166 --encoder4_val;
167 }
168}
169
170static void Encoder5ARise() {
171 GPIOINT->IO2IntClr |= (1 << 2);
172 if (GPIO2->FIOPIN & (1 << 3)) {
173 ++encoder5_val;
174 } else {
175 --encoder5_val;
176 }
177}
178static void Encoder5AFall() {
179 GPIOINT->IO2IntClr |= (1 << 2);
180 if (GPIO2->FIOPIN & (1 << 3)) {
181 --encoder5_val;
182 } else {
183 ++encoder5_val;
184 }
185}
186static void Encoder5BRise() {
187 GPIOINT->IO2IntClr |= (1 << 3);
188 if (GPIO2->FIOPIN & (1 << 2)) {
189 --encoder5_val;
190 } else {
191 ++encoder5_val;
192 }
193}
194static void Encoder5BFall() {
195 GPIOINT->IO2IntClr |= (1 << 3);
196 if (GPIO2->FIOPIN & (1 << 2)) {
197 ++encoder5_val;
198 } else {
199 --encoder5_val;
200 }
201}
202
203volatile int32_t capture_top_rise;
204volatile int8_t top_rise_count;
205static void IndexerTopRise() {
206 GPIOINT->IO0IntClr |= (1 << 5);
207 // edge counting encoder capture
208 ++top_rise_count;
209 capture_top_rise = encoder3_val;
210}
211volatile int32_t capture_top_fall;
212volatile int8_t top_fall_count;
213static void IndexerTopFall() {
214 GPIOINT->IO0IntClr |= (1 << 5);
215 // edge counting encoder capture
216 ++top_fall_count;
217 capture_top_fall = encoder3_val;
218}
219volatile int8_t bottom_rise_count;
220static void IndexerBottomRise() {
221 GPIOINT->IO0IntClr |= (1 << 4);
222 // edge counting
223 ++bottom_rise_count;
224}
225volatile int32_t capture_bottom_fall_delay;
226volatile int8_t bottom_fall_delay_count;
227volatile int32_t dirty_delay;
228portTickType xDelayTimeFrom;
229static portTASK_FUNCTION(vDelayCapture, pvParameters)
230{
231 portTickType xSleepFrom = xTaskGetTickCount();
232
233 for (;;) {
234 NVIC_DisableIRQ(EINT3_IRQn);
235 if (dirty_delay != 0) {
236 xSleepFrom = xDelayTimeFrom;
237 dirty_delay = 0;
238 NVIC_EnableIRQ(EINT3_IRQn);
239
240 vTaskDelayUntil(&xSleepFrom, kBottomFallDelayTime / portTICK_RATE_MS);
241
242 NVIC_DisableIRQ(EINT3_IRQn);
243 ++bottom_fall_delay_count;
244 capture_bottom_fall_delay = encoder3_val;
245 NVIC_EnableIRQ(EINT3_IRQn);
246 } else {
247 NVIC_EnableIRQ(EINT3_IRQn);
248 vTaskDelayUntil(&xSleepFrom, 10 / portTICK_RATE_MS);
249 }
250 }
251}
252
253volatile int8_t bottom_fall_count;
254static void IndexerBottomFall() {
255 GPIOINT->IO0IntClr |= (1 << 4);
256 ++bottom_fall_count;
257 // edge counting start delayed capture
258 xDelayTimeFrom = xTaskGetTickCount();
259 dirty_delay = 1;
260}
261volatile int32_t capture_wrist_rise;
262volatile int8_t wrist_rise_count;
263static void WristHallRise() {
264 GPIOINT->IO0IntClr |= (1 << 6);
265 // edge counting encoder capture
266 ++wrist_rise_count;
267 capture_wrist_rise = (int32_t)QEI->QEIPOS;
268}
269volatile int32_t capture_shooter_angle_rise;
270volatile int8_t shooter_angle_rise_count;
271static void ShooterHallRise() {
272 GPIOINT->IO0IntClr |= (1 << 7);
273 // edge counting encoder capture
274 ++shooter_angle_rise_count;
275 capture_shooter_angle_rise = encoder2_val;
276}
277
278// Count leading zeros.
279// Returns 0 if bit 31 is set etc.
280__attribute__((always_inline)) static __INLINE uint32_t __clz(uint32_t value) {
281 uint32_t result;
282 __asm__("clz %0, %1" : "=r" (result) : "r" (value));
283 return result;
284}
285inline static void IRQ_Dispatch(void) {
286 // TODO(brians): think about adding a loop here so that we can handle multiple
287 // interrupts right on top of each other faster
288 uint32_t index = __clz(GPIOINT->IO2IntStatR | GPIOINT->IO0IntStatR |
289 (GPIOINT->IO2IntStatF << 28) | (GPIOINT->IO0IntStatF << 4));
290
291 typedef void (*Handler)(void);
292 const static Handler table[] = {
293 Encoder5BFall, // index 0: P2.3 Fall #bit 31 //Encoder 5 B //Dio 10
294 Encoder5AFall, // index 1: P2.2 Fall #bit 30 //Encoder 5 A //Dio 9
295 Encoder4BFall, // index 2: P2.1 Fall #bit 29 //Encoder 4 B //Dio 8
296 Encoder4AFall, // index 3: P2.0 Fall #bit 28 //Encoder 4 A //Dio 7
297 NoGPIO, // index 4: NO GPIO #bit 27
298 Encoder2AFall, // index 5: P0.22 Fall #bit 26 //Encoder 2 A
299 Encoder2BFall, // index 6: P0.21 Fall #bit 25 //Encoder 2 B
300 Encoder3AFall, // index 7: P0.20 Fall #bit 24 //Encoder 3 A
301 Encoder3BFall, // index 8: P0.19 Fall #bit 23 //Encoder 3 B
302 Encoder2ARise, // index 9: P0.22 Rise #bit 22 //Encoder 2 A
303 Encoder2BRise, // index 10: P0.21 Rise #bit 21 //Encoder 2 B
304 Encoder3ARise, // index 11: P0.20 Rise #bit 20 //Encoder 3 A
305 Encoder3BRise, // index 12: P0.19 Rise #bit 19 //Encoder 3 B
306 NoGPIO, // index 13: NO GPIO #bit 18
307 NoGPIO, // index 14: NO GPIO #bit 17
308 NoGPIO, // index 15: NO GPIO #bit 16
309 NoGPIO, // index 16: NO GPIO #bit 15
310 NoGPIO, // index 17: NO GPIO #bit 14
311 NoGPIO, // index 18: NO GPIO #bit 13
312 NoGPIO, // index 19: NO GPIO #bit 12
313 ShooterHallRise, // index 20: P0.7 Fall #bit 11 //Shooter Hall //Dio 4
314 WristHallRise, // index 21: P0.6 Fall #bit 10 //Wrist Hall //Dio 3
315 IndexerTopRise, // index 22: P0.5 Fall #bit 9 //Indexer Top //Dio 2
316 IndexerBottomRise, // index 23: P0.4 Fall #bit 8 //Indexer Bottom //Dio 1
317 NoGPIO, // index 24: NO GPIO #bit 7
318 NoGPIO, // index 25: NO GPIO #bit 6
319 IndexerTopFall, // index 26: P0.5 Rise #bit 5 //Indexer Top //Dio 2
320 IndexerBottomFall, // index 27: P0.4 Rise #bit 4 //Indexer Bottom //Dio 1
321 Encoder5BRise, // index 28: P2.3 Rise #bit 3 //Encoder 5 B //Dio 10
322 Encoder5ARise, // index 29: P2.2 Rise #bit 2 //Encoder 5 A //Dio 9
323 Encoder4BRise, // index 30: P2.1 Rise #bit 1 //Encoder 4 B //Dio 8
324 Encoder4ARise, // index 31: P2.0 Rise #bit 0 //Encoder 4 A //Dio 7
325 NoGPIO // index 32: NO BITS SET #False Alarm
326 };
327 table[index]();
328}
329void EINT3_IRQHandler(void) {
330 // Have to disable it here or else it re-fires the interrupt while the code
331 // reads to figure out which pin the interrupt is for.
332 // TODO(brians): figure out details + look for an alternative
333 NVIC_DisableIRQ(EINT3_IRQn);
334 IRQ_Dispatch();
335 NVIC_EnableIRQ(EINT3_IRQn);
336}
337int32_t encoder_val(int chan) {
338 int32_t val;
339 switch (chan) {
340 case 0: // Wrist
341 return (int32_t)QEI->QEIPOS;
342 case 1: // Shooter Wheel
343 NVIC_DisableIRQ(EINT1_IRQn);
344 NVIC_DisableIRQ(EINT2_IRQn);
345 val = encoder1_val;
346 NVIC_EnableIRQ(EINT2_IRQn);
347 NVIC_EnableIRQ(EINT1_IRQn);
348 return val;
349 case 2: // Shooter Angle
350 NVIC_DisableIRQ(EINT3_IRQn);
351 val = encoder2_val;
352 NVIC_EnableIRQ(EINT3_IRQn);
353 return val;
354 case 3: // Indexer
355 NVIC_DisableIRQ(EINT3_IRQn);
356 val = encoder3_val;
357 NVIC_EnableIRQ(EINT3_IRQn);
358 return val;
359 case 4: // Drive R
360 NVIC_DisableIRQ(EINT3_IRQn);
361 val = encoder4_val;
362 NVIC_EnableIRQ(EINT3_IRQn);
363 return val;
364 case 5: // Drive L
365 NVIC_DisableIRQ(EINT3_IRQn);
366 val = encoder5_val;
367 NVIC_EnableIRQ(EINT3_IRQn);
368 return val;
369 default:
370 return -1;
371 }
372}
373
374void encoder_init(void) {
375 // Setup the encoder interface.
376 SC->PCONP |= PCONP_PCQEI;
377 PINCON->PINSEL3 = ((PINCON->PINSEL3 & 0xffff3dff) | 0x00004100);
378 // Reset the count and velocity.
379 QEI->QEICON = 0x00000005;
380 QEI->QEICONF = 0x00000004;
381 // Wrap back to 0 when we wrap the int and vice versa.
382 QEI->QEIMAXPOS = 0xFFFFFFFF;
383
384 // Set up encoder 1.
385 // Make GPIOs 2.11 and 2.12 trigger EINT1 and EINT2 (respectively).
386 // PINSEL4[23:22] = {0 1}
387 // PINSEL4[25:24] = {0 1}
388 PINCON->PINSEL4 = (PINCON->PINSEL4 & ~(0x3 << 22)) | (0x1 << 22);
389 PINCON->PINSEL4 = (PINCON->PINSEL4 & ~(0x3 << 24)) | (0x1 << 24);
390 // Clear the interrupt flags for EINT1 and EINT2 (0x6 = 0b0110).
391 SC->EXTMODE = 0x6;
392 SC->EXTINT = 0x6;
393 NVIC_EnableIRQ(EINT1_IRQn);
394 NVIC_EnableIRQ(EINT2_IRQn);
395 encoder1_val = 0;
396
397 // Set up encoder 2.
398 GPIOINT->IO0IntEnF |= (1 << 22); // Set GPIO falling interrupt.
399 GPIOINT->IO0IntEnR |= (1 << 22); // Set GPIO rising interrupt.
400 GPIOINT->IO0IntEnF |= (1 << 21); // Set GPIO falling interrupt.
401 GPIOINT->IO0IntEnR |= (1 << 21); // Set GPIO rising interrupt.
402 // Make sure they're in mode 00 (the default, aka nothing special).
403 PINCON->PINSEL1 &= ~(0x3 << 12);
404 PINCON->PINSEL1 &= ~(0x3 << 10);
405 encoder2_val = 0;
406
407 // Set up encoder 3.
408 GPIOINT->IO0IntEnF |= (1 << 20); // Set GPIO falling interrupt.
409 GPIOINT->IO0IntEnR |= (1 << 20); // Set GPIO rising interrupt.
410 GPIOINT->IO0IntEnF |= (1 << 19); // Set GPIO falling interrupt.
411 GPIOINT->IO0IntEnR |= (1 << 19); // Set GPIO rising interrupt.
412 // Make sure they're in mode 00 (the default, aka nothing special).
413 PINCON->PINSEL1 &= ~(0x3 << 8);
414 PINCON->PINSEL1 &= ~(0x3 << 6);
415 encoder3_val = 0;
416
417 // Set up encoder 4.
418 GPIOINT->IO2IntEnF |= (1 << 0); // Set GPIO falling interrupt.
419 GPIOINT->IO2IntEnR |= (1 << 0); // Set GPIO rising interrupt.
420 GPIOINT->IO2IntEnF |= (1 << 1); // Set GPIO falling interrupt.
421 GPIOINT->IO2IntEnR |= (1 << 1); // Set GPIO rising interrupt.
422 // Make sure they're in mode 00 (the default, aka nothing special).
423 PINCON->PINSEL4 &= ~(0x3 << 0);
424 PINCON->PINSEL4 &= ~(0x3 << 2);
425 encoder4_val = 0;
426
427 // Set up encoder 5.
428 GPIOINT->IO2IntEnF |= (1 << 2); // Set GPIO falling interrupt.
429 GPIOINT->IO2IntEnR |= (1 << 2); // Set GPIO rising interrupt.
430 GPIOINT->IO2IntEnF |= (1 << 3); // Set GPIO falling interrupt.
431 GPIOINT->IO2IntEnR |= (1 << 3); // Set GPIO rising interrupt.
432 // Make sure they're in mode 00 (the default, aka nothing special).
433 PINCON->PINSEL4 &= ~(0x3 << 4);
434 PINCON->PINSEL4 &= ~(0x3 << 6);
435 encoder5_val = 0;
436
437 // Enable interrupts from the GPIO pins.
438 NVIC_EnableIRQ(EINT3_IRQn);
439
440 if (is_bot3) {
441 } else { // is main robot
442 xTaskCreate(vDelayCapture,
443 (signed char *) "SENSORs",
444 configMINIMAL_STACK_SIZE + 100,
445 NULL /*parameters*/,
446 tskIDLE_PRIORITY + 5,
447 NULL /*return task handle*/);
448
449 GPIOINT->IO0IntEnF |= (1 << 4); // Set GPIO falling interrupt
450 GPIOINT->IO0IntEnR |= (1 << 4); // Set GPIO rising interrupt
451 PINCON->PINSEL0 &= ~(0x3 << 8);
452
453 GPIOINT->IO0IntEnF |= (1 << 5); // Set GPIO falling interrupt
454 GPIOINT->IO0IntEnR |= (1 << 5); // Set GPIO rising interrupt
455 PINCON->PINSEL0 &= ~(0x3 << 10);
456
457 GPIOINT->IO0IntEnF |= (1 << 6);
458 PINCON->PINSEL0 &= ~(0x3 << 12);
459
460 GPIOINT->IO0IntEnF |= (1 << 7);
461 PINCON->PINSEL0 &= ~(0x3 << 14);
462 }
463}
464
465void fillSensorPacket(struct DataStruct *packet) {
466 packet->gyro_angle = gyro_angle;
467
468 packet->dip_switch0 = dip_switch(0);
469 packet->dip_switch1 = dip_switch(1);
470 packet->dip_switch2 = dip_switch(2);
471 packet->dip_switch3 = dip_switch(3);
472
473 if (is_bot3) {
474 packet->robot_id = 1;
475 } else { // is main robot
476 packet->robot_id = 0;
477
478 packet->main.shooter = encoder1_val;
479 packet->main.left_drive = encoder4_val;
480 packet->main.right_drive = encoder5_val;
481 packet->main.shooter_angle = encoder2_val;
482 packet->main.indexer = encoder3_val;
483
484 NVIC_DisableIRQ(EINT1_IRQn);
485 NVIC_DisableIRQ(EINT2_IRQn);
486
487 packet->main.wrist = (int32_t)QEI->QEIPOS;
488 packet->main.wrist_hall_effect = !digital(3);
489 packet->main.capture_wrist_rise = capture_wrist_rise;
490 packet->main.wrist_rise_count = wrist_rise_count;
491
492 NVIC_EnableIRQ(EINT1_IRQn);
493 NVIC_EnableIRQ(EINT2_IRQn);
494
495 NVIC_DisableIRQ(EINT3_IRQn);
496
497 packet->main.capture_top_rise = capture_top_rise;
498 packet->main.top_rise_count = top_rise_count;
499
500 packet->main.capture_top_fall = capture_top_fall;
501 packet->main.top_fall_count = top_fall_count;
502 packet->main.top_disc = !digital(2);
503
504 packet->main.capture_bottom_fall_delay = capture_bottom_fall_delay;
505 packet->main.bottom_fall_delay_count = bottom_fall_delay_count;
506 packet->main.bottom_fall_count = bottom_fall_count;
507 packet->main.bottom_disc = !digital(1);
508
509 packet->main.capture_shooter_angle_rise = capture_shooter_angle_rise;
510 packet->main.shooter_angle_rise_count = shooter_angle_rise_count;
511 packet->main.angle_adjust_bottom_hall_effect = !digital(4);
512
513 NVIC_EnableIRQ(EINT3_IRQn);
514
515 packet->main.bottom_rise_count = bottom_rise_count;
516 }
517}