brians | 0ab60bb | 2013-01-31 02:21:51 +0000 | [diff] [blame] | 1 | // **************************************************************************** |
| 2 | // CopyLeft qwerk Robotics unINC. 2010 All Rights Reserved. |
| 3 | // **************************************************************************** |
| 4 | |
| 5 | // **************************************************************************** |
| 6 | // **************** IO Pin Setup |
| 7 | // **************************************************************************** |
| 8 | |
| 9 | #include "FreeRTOS.h" |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 10 | #include "queue.h" |
| 11 | #include "task.h" |
| 12 | |
| 13 | #include "analog.h" |
brians | 0ab60bb | 2013-01-31 02:21:51 +0000 | [diff] [blame] | 14 | |
Brian Silverman | d241148 | 2013-03-28 21:36:32 -0700 | [diff] [blame] | 15 | // How long (in ms) to wait after a falling edge on the bottom indexer sensor |
| 16 | // before reading the indexer encoder. |
| 17 | static const int kBottomFallDelayTime = 32; |
| 18 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 19 | void analog_init(void) { |
| 20 | // b[1:0] CAN RD1 p0.0 |
| 21 | // b[3:2] CAN TD1 p0.1 |
| 22 | //PINCON->PINSEL0 = 0x00000005; |
brians | 0ab60bb | 2013-01-31 02:21:51 +0000 | [diff] [blame] | 23 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 24 | // b[29:28] USB_DMIN p0.30 |
| 25 | // b[27:26] USB_DPLUS p0.29 |
| 26 | // b[21:20] AD0.3 p0.26 |
| 27 | // b[19:18] AD0.2 p0.25 |
| 28 | // PINCON->PINSEL1 = 0x14140000; |
brians | 0ab60bb | 2013-01-31 02:21:51 +0000 | [diff] [blame] | 29 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 30 | // PINCON->PINSEL2 = 0x0; |
brians | 0ab60bb | 2013-01-31 02:21:51 +0000 | [diff] [blame] | 31 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 32 | // b[31:30] AD0.5 p1.31 |
| 33 | // b[29:28] V_BUS p1.30 |
| 34 | // b[21:20] MCOB1 p1.26 |
| 35 | // b[19:18] MCOA1 p1.25 |
| 36 | // b[15:14] MCI1 p1.23 |
| 37 | // b[13:12] MCOB0 p1.22 |
| 38 | // b[09:08] MCI0 p1.20 |
| 39 | // b[07:06] MCOA0 p1.19 |
| 40 | // b[05:04] USB_UP_LED p1.18 |
| 41 | //PINCON->PINSEL3 = 0xE0145150; |
| 42 | SC->PCONP |= PCONP_PCAD; |
brians | 0ab60bb | 2013-01-31 02:21:51 +0000 | [diff] [blame] | 43 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 44 | // Enable AD0.0, AD0.1, AD0.2, AD0.3 |
| 45 | PINCON->PINSEL1 &= 0xFFC03FFF; |
| 46 | PINCON->PINSEL1 |= 0x00D54000; |
| 47 | ADC->ADCR = 0x00200500; |
brians | 0ab60bb | 2013-01-31 02:21:51 +0000 | [diff] [blame] | 48 | } |
| 49 | |
| 50 | // **************************************************************************** |
| 51 | // **************** ADC Functions |
| 52 | // **************************************************************************** |
| 53 | |
| 54 | |
| 55 | // **************** macros |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 56 | // starts conversion [26:24] = 001 |
brians | 0ab60bb | 2013-01-31 02:21:51 +0000 | [diff] [blame] | 57 | |
| 58 | // **************** functions |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 59 | int analog(int channel) { |
| 60 | ADC->ADCR = ((ADC->ADCR & 0xF8FFFF00) | (0x01000000 | (1 << channel))); |
brians | 0ab60bb | 2013-01-31 02:21:51 +0000 | [diff] [blame] | 61 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 62 | // Poll until it is done. |
| 63 | while(!(ADC->ADGDR & 0x80000000)); |
brians | 0ab60bb | 2013-01-31 02:21:51 +0000 | [diff] [blame] | 64 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 65 | return ((ADC->ADGDR & 0x0000FFF0) >> 4); |
brians | 0ab60bb | 2013-01-31 02:21:51 +0000 | [diff] [blame] | 66 | } |
| 67 | // GPIO1 P0.4 |
| 68 | // GPIO2 P0.5 |
| 69 | // GPIO3 P0.6 |
| 70 | // GPIO4 P0.7 |
| 71 | // GPIO5 P0.8 |
| 72 | // GPIO6 P0.9 |
| 73 | // GPIO7 P2.0 |
| 74 | // GPIO8 P2.1 |
| 75 | // GPIO9 P2.2 |
| 76 | // GPIO10 P2.3 |
| 77 | // GPIO11 P2.4 |
| 78 | // GPIO12 P2.5 |
| 79 | |
| 80 | // DIP0 P1.29 |
| 81 | // DIP1 P2.13 |
| 82 | // DIP2 P0.11 |
| 83 | // DIP3 P0.10 |
Brian Silverman | d241148 | 2013-03-28 21:36:32 -0700 | [diff] [blame] | 84 | #define readGPIO(gpio, chan) ((((gpio)->FIOPIN) >> (chan)) & 1) |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 85 | inline int readGPIO_inline(int major, int minor) { |
| 86 | switch (major) { |
| 87 | case 0: |
| 88 | return readGPIO(GPIO0, minor); |
| 89 | case 1: |
| 90 | return readGPIO(GPIO1, minor); |
| 91 | case 2: |
| 92 | return readGPIO(GPIO2, minor); |
| 93 | default: |
| 94 | return -1; |
| 95 | } |
brians | 0ab60bb | 2013-01-31 02:21:51 +0000 | [diff] [blame] | 96 | } |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 97 | int digital(int channel) { |
| 98 | if (channel < 1) { |
| 99 | return -1; |
| 100 | } else if (channel < 7) { |
| 101 | int chan = channel + 3; |
Brian Silverman | d241148 | 2013-03-28 21:36:32 -0700 | [diff] [blame] | 102 | return readGPIO(GPIO0, chan); |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 103 | } else if (channel < 13) { |
| 104 | int chan = channel - 7; |
Brian Silverman | d241148 | 2013-03-28 21:36:32 -0700 | [diff] [blame] | 105 | return readGPIO(GPIO2, chan); |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 106 | } |
| 107 | return -1; |
brians | 0ab60bb | 2013-01-31 02:21:51 +0000 | [diff] [blame] | 108 | } |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 109 | int dip(int channel) { |
| 110 | switch (channel) { |
| 111 | case 0: |
| 112 | return readGPIO(GPIO1, 29); |
| 113 | case 1: |
| 114 | return readGPIO(GPIO2, 13); |
| 115 | case 2: |
| 116 | return readGPIO(GPIO0, 11); |
| 117 | case 3: |
| 118 | return readGPIO(GPIO0, 10); |
| 119 | default: |
| 120 | return -1; |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 121 | } |
brians | 0ab60bb | 2013-01-31 02:21:51 +0000 | [diff] [blame] | 122 | } |
Brian Silverman | d241148 | 2013-03-28 21:36:32 -0700 | [diff] [blame] | 123 | // ENC0A 1.20 |
| 124 | // ENC0B 1.23 |
| 125 | // ENC1A 2.11 |
| 126 | // ENC1B 2.12 |
| 127 | // ENC2A 0.21 |
| 128 | // ENC2B 0.22 |
| 129 | // ENC3A 0.19 |
| 130 | // ENC3B 0.20 |
brians | 0ab60bb | 2013-01-31 02:21:51 +0000 | [diff] [blame] | 131 | |
Brian Silverman | d241148 | 2013-03-28 21:36:32 -0700 | [diff] [blame] | 132 | #define ENC(gpio, a, b) readGPIO(gpio, a) * 2 + readGPIO(gpio, b) |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 133 | int encoder_bits(int channel) { |
| 134 | switch (channel) { |
| 135 | case 0: |
| 136 | return ENC(GPIO1, 20, 23); |
| 137 | case 1: |
| 138 | return ENC(GPIO2, 11, 12); |
| 139 | case 2: |
| 140 | return ENC(GPIO0, 21, 22); |
| 141 | case 3: |
| 142 | return ENC(GPIO0, 19, 20); |
| 143 | default: |
| 144 | return -1; |
| 145 | } |
| 146 | return -1; |
brians | 0ab60bb | 2013-01-31 02:21:51 +0000 | [diff] [blame] | 147 | } |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 148 | #undef ENC |
brians | 0ab60bb | 2013-01-31 02:21:51 +0000 | [diff] [blame] | 149 | |
Brian Silverman | d241148 | 2013-03-28 21:36:32 -0700 | [diff] [blame] | 150 | // Uses EINT1 and EINT2 on 2.11 and 2.12. |
brians | 0ab60bb | 2013-01-31 02:21:51 +0000 | [diff] [blame] | 151 | volatile int32_t encoder1_val; |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 152 | // On GPIO pins 0.22 and 0.21. |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 153 | volatile int32_t encoder2_val; |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 154 | // On GPIO pins 0.20 and 0.19. |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 155 | volatile int32_t encoder3_val; |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 156 | // On GPIO pins 2.0 and 2.1. |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 157 | volatile int32_t encoder4_val; |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 158 | // On GPIO pins 2.2 and 2.3. |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 159 | volatile int32_t encoder5_val; |
| 160 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 161 | // ENC1A 2.11 |
Brian Silverman | ab2e676 | 2013-03-29 17:27:41 -0700 | [diff] [blame] | 162 | void EINT1_IRQHandler(void) { |
Brian Silverman | 8bc6a4d | 2013-03-29 23:55:28 -0700 | [diff] [blame^] | 163 | // TODO(brians): figure out why this has to be up here too |
| 164 | SC->EXTINT = 0x2; |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 165 | int fiopin = GPIO2->FIOPIN; |
| 166 | if (((fiopin >> 1) ^ fiopin) & 0x800) { |
Brian Silverman | ab2e676 | 2013-03-29 17:27:41 -0700 | [diff] [blame] | 167 | ++encoder1_val; |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 168 | } else { |
Brian Silverman | ab2e676 | 2013-03-29 17:27:41 -0700 | [diff] [blame] | 169 | --encoder1_val; |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 170 | } |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 171 | SC->EXTPOLAR ^= 0x2; |
Brian Silverman | 42a9c91 | 2013-03-29 23:37:46 -0700 | [diff] [blame] | 172 | SC->EXTINT = 0x2; |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 173 | } |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 174 | // ENC1B 2.12 |
Brian Silverman | ab2e676 | 2013-03-29 17:27:41 -0700 | [diff] [blame] | 175 | void EINT2_IRQHandler(void) { |
Brian Silverman | 8bc6a4d | 2013-03-29 23:55:28 -0700 | [diff] [blame^] | 176 | SC->EXTINT = 0x4; |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 177 | int fiopin = GPIO2->FIOPIN; |
| 178 | if (((fiopin >> 1) ^ fiopin) & 0x800) { |
Brian Silverman | ab2e676 | 2013-03-29 17:27:41 -0700 | [diff] [blame] | 179 | --encoder1_val; |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 180 | } else { |
Brian Silverman | ab2e676 | 2013-03-29 17:27:41 -0700 | [diff] [blame] | 181 | ++encoder1_val; |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 182 | } |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 183 | SC->EXTPOLAR ^= 0x4; |
Brian Silverman | 42a9c91 | 2013-03-29 23:37:46 -0700 | [diff] [blame] | 184 | SC->EXTINT = 0x4; |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 185 | } |
| 186 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 187 | // GPIO Interrupt handlers |
Brian Silverman | d241148 | 2013-03-28 21:36:32 -0700 | [diff] [blame] | 188 | static void NoGPIO() {} |
| 189 | static void Encoder2ARise() { |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 190 | GPIOINT->IO0IntClr |= (1 << 22); |
| 191 | if (GPIO0->FIOPIN & (1 << 21)) { |
| 192 | ++encoder2_val; |
| 193 | } else { |
| 194 | --encoder2_val; |
| 195 | } |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 196 | } |
Brian Silverman | d241148 | 2013-03-28 21:36:32 -0700 | [diff] [blame] | 197 | static void Encoder2AFall() { |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 198 | GPIOINT->IO0IntClr |= (1 << 22); |
| 199 | if (GPIO0->FIOPIN & (1 << 21)) { |
| 200 | --encoder2_val; |
| 201 | } else { |
| 202 | ++encoder2_val; |
| 203 | } |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 204 | } |
Brian Silverman | d241148 | 2013-03-28 21:36:32 -0700 | [diff] [blame] | 205 | static void Encoder2BRise() { |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 206 | GPIOINT->IO0IntClr |= (1 << 21); |
| 207 | if (GPIO0->FIOPIN & (1 << 22)) { |
| 208 | --encoder2_val; |
| 209 | } else { |
| 210 | ++encoder2_val; |
| 211 | } |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 212 | } |
Brian Silverman | d241148 | 2013-03-28 21:36:32 -0700 | [diff] [blame] | 213 | static void Encoder2BFall() { |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 214 | GPIOINT->IO0IntClr |= (1 << 21); |
| 215 | if (GPIO0->FIOPIN & (1 << 22)) { |
| 216 | ++encoder2_val; |
| 217 | } else { |
| 218 | --encoder2_val; |
| 219 | } |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 220 | } |
| 221 | |
Brian Silverman | d241148 | 2013-03-28 21:36:32 -0700 | [diff] [blame] | 222 | static void Encoder3ARise() { |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 223 | GPIOINT->IO0IntClr |= (1 << 20); |
| 224 | if (GPIO0->FIOPIN & (1 << 19)) { |
| 225 | ++encoder3_val; |
| 226 | } else { |
| 227 | --encoder3_val; |
| 228 | } |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 229 | } |
Brian Silverman | d241148 | 2013-03-28 21:36:32 -0700 | [diff] [blame] | 230 | static void Encoder3AFall() { |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 231 | GPIOINT->IO0IntClr |= (1 << 20); |
| 232 | if (GPIO0->FIOPIN & (1 << 19)) { |
| 233 | --encoder3_val; |
| 234 | } else { |
| 235 | ++encoder3_val; |
| 236 | } |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 237 | } |
Brian Silverman | d241148 | 2013-03-28 21:36:32 -0700 | [diff] [blame] | 238 | static void Encoder3BRise() { |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 239 | GPIOINT->IO0IntClr |= (1 << 19); |
| 240 | if (GPIO0->FIOPIN & (1 << 20)) { |
| 241 | --encoder3_val; |
| 242 | } else { |
| 243 | ++encoder3_val; |
| 244 | } |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 245 | } |
Brian Silverman | d241148 | 2013-03-28 21:36:32 -0700 | [diff] [blame] | 246 | static void Encoder3BFall() { |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 247 | GPIOINT->IO0IntClr |= (1 << 19); |
| 248 | if (GPIO0->FIOPIN & (1 << 20)) { |
| 249 | ++encoder3_val; |
| 250 | } else { |
| 251 | --encoder3_val; |
| 252 | } |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 253 | } |
| 254 | |
Brian Silverman | d241148 | 2013-03-28 21:36:32 -0700 | [diff] [blame] | 255 | static void Encoder4ARise() { |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 256 | GPIOINT->IO2IntClr |= (1 << 0); |
| 257 | if (GPIO2->FIOPIN & (1 << 1)) { |
| 258 | ++encoder4_val; |
| 259 | } else { |
| 260 | --encoder4_val; |
| 261 | } |
| 262 | } |
Brian Silverman | d241148 | 2013-03-28 21:36:32 -0700 | [diff] [blame] | 263 | static void Encoder4AFall() { |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 264 | GPIOINT->IO2IntClr |= (1 << 0); |
| 265 | if (GPIO2->FIOPIN & (1 << 1)) { |
| 266 | --encoder4_val; |
| 267 | } else { |
| 268 | ++encoder4_val; |
| 269 | } |
| 270 | } |
Brian Silverman | d241148 | 2013-03-28 21:36:32 -0700 | [diff] [blame] | 271 | static void Encoder4BRise() { |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 272 | GPIOINT->IO2IntClr |= (1 << 1); |
| 273 | if (GPIO2->FIOPIN & (1 << 0)) { |
| 274 | --encoder4_val; |
| 275 | } else { |
| 276 | ++encoder4_val; |
| 277 | } |
| 278 | } |
Brian Silverman | d241148 | 2013-03-28 21:36:32 -0700 | [diff] [blame] | 279 | static void Encoder4BFall() { |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 280 | GPIOINT->IO2IntClr |= (1 << 1); |
| 281 | if (GPIO2->FIOPIN & (1 << 0)) { |
| 282 | ++encoder4_val; |
| 283 | } else { |
| 284 | --encoder4_val; |
| 285 | } |
| 286 | } |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 287 | |
Brian Silverman | d241148 | 2013-03-28 21:36:32 -0700 | [diff] [blame] | 288 | static void Encoder5ARise() { |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 289 | GPIOINT->IO2IntClr |= (1 << 2); |
| 290 | if (GPIO2->FIOPIN & (1 << 3)) { |
| 291 | ++encoder5_val; |
| 292 | } else { |
| 293 | --encoder5_val; |
| 294 | } |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 295 | } |
Brian Silverman | d241148 | 2013-03-28 21:36:32 -0700 | [diff] [blame] | 296 | static void Encoder5AFall() { |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 297 | GPIOINT->IO2IntClr |= (1 << 2); |
| 298 | if (GPIO2->FIOPIN & (1 << 3)) { |
| 299 | --encoder5_val; |
| 300 | } else { |
| 301 | ++encoder5_val; |
| 302 | } |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 303 | } |
Brian Silverman | d241148 | 2013-03-28 21:36:32 -0700 | [diff] [blame] | 304 | static void Encoder5BRise() { |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 305 | GPIOINT->IO2IntClr |= (1 << 3); |
| 306 | if (GPIO2->FIOPIN & (1 << 2)) { |
| 307 | --encoder5_val; |
| 308 | } else { |
| 309 | ++encoder5_val; |
| 310 | } |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 311 | } |
Brian Silverman | d241148 | 2013-03-28 21:36:32 -0700 | [diff] [blame] | 312 | static void Encoder5BFall() { |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 313 | GPIOINT->IO2IntClr |= (1 << 3); |
| 314 | if (GPIO2->FIOPIN & (1 << 2)) { |
| 315 | ++encoder5_val; |
| 316 | } else { |
| 317 | --encoder5_val; |
| 318 | } |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 319 | } |
| 320 | |
| 321 | volatile int32_t capture_top_rise; |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 322 | volatile int8_t top_rise_count; |
Brian Silverman | d241148 | 2013-03-28 21:36:32 -0700 | [diff] [blame] | 323 | static void IndexerTopRise() { |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 324 | GPIOINT->IO0IntClr |= (1 << 5); |
| 325 | // edge counting encoder capture |
| 326 | ++top_rise_count; |
| 327 | capture_top_rise = encoder3_val; |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 328 | } |
| 329 | volatile int32_t capture_top_fall; |
| 330 | volatile int8_t top_fall_count; |
Brian Silverman | d241148 | 2013-03-28 21:36:32 -0700 | [diff] [blame] | 331 | static void IndexerTopFall() { |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 332 | GPIOINT->IO0IntClr |= (1 << 5); |
| 333 | // edge counting encoder capture |
| 334 | ++top_fall_count; |
| 335 | capture_top_fall = encoder3_val; |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 336 | } |
| 337 | volatile int8_t bottom_rise_count; |
Brian Silverman | d241148 | 2013-03-28 21:36:32 -0700 | [diff] [blame] | 338 | static void IndexerBottomRise() { |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 339 | GPIOINT->IO0IntClr |= (1 << 4); |
| 340 | // edge counting |
| 341 | ++bottom_rise_count; |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 342 | } |
| 343 | volatile int32_t capture_bottom_fall_delay; |
| 344 | volatile int8_t bottom_fall_delay_count; |
| 345 | volatile int32_t dirty_delay; |
| 346 | portTickType xDelayTimeFrom; |
| 347 | static portTASK_FUNCTION(vDelayCapture, pvParameters) |
| 348 | { |
Brian Silverman | d241148 | 2013-03-28 21:36:32 -0700 | [diff] [blame] | 349 | portTickType xSleepFrom = xTaskGetTickCount(); |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 350 | |
Brian Silverman | d241148 | 2013-03-28 21:36:32 -0700 | [diff] [blame] | 351 | for (;;) { |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 352 | NVIC_DisableIRQ(EINT3_IRQn); |
Brian Silverman | d241148 | 2013-03-28 21:36:32 -0700 | [diff] [blame] | 353 | if (dirty_delay != 0) { |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 354 | xSleepFrom = xDelayTimeFrom; |
| 355 | dirty_delay = 0; |
| 356 | NVIC_EnableIRQ(EINT3_IRQn); |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 357 | |
Brian Silverman | d241148 | 2013-03-28 21:36:32 -0700 | [diff] [blame] | 358 | vTaskDelayUntil(&xSleepFrom, kBottomFallDelayTime / portTICK_RATE_MS); |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 359 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 360 | NVIC_DisableIRQ(EINT3_IRQn); |
Brian Silverman | d241148 | 2013-03-28 21:36:32 -0700 | [diff] [blame] | 361 | ++bottom_fall_delay_count; |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 362 | capture_bottom_fall_delay = encoder3_val; |
| 363 | NVIC_EnableIRQ(EINT3_IRQn); |
| 364 | } else { |
| 365 | NVIC_EnableIRQ(EINT3_IRQn); |
| 366 | vTaskDelayUntil(&xSleepFrom, 10 / portTICK_RATE_MS); |
| 367 | } |
| 368 | } |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 369 | } |
| 370 | |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 371 | volatile int8_t bottom_fall_count; |
Brian Silverman | d241148 | 2013-03-28 21:36:32 -0700 | [diff] [blame] | 372 | static void IndexerBottomFall() { |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 373 | GPIOINT->IO0IntClr |= (1 << 4); |
Brian Silverman | d241148 | 2013-03-28 21:36:32 -0700 | [diff] [blame] | 374 | ++bottom_fall_count; |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 375 | // edge counting start delayed capture |
| 376 | xDelayTimeFrom = xTaskGetTickCount(); |
| 377 | dirty_delay = 1; |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 378 | } |
| 379 | volatile int32_t capture_wrist_rise; |
| 380 | volatile int8_t wrist_rise_count; |
Brian Silverman | d241148 | 2013-03-28 21:36:32 -0700 | [diff] [blame] | 381 | static void WristHallRise() { |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 382 | GPIOINT->IO0IntClr |= (1 << 6); |
| 383 | // edge counting encoder capture |
Brian Silverman | d241148 | 2013-03-28 21:36:32 -0700 | [diff] [blame] | 384 | ++wrist_rise_count; |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 385 | capture_wrist_rise = (int32_t)QEI->QEIPOS; |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 386 | } |
| 387 | volatile int32_t capture_shooter_angle_rise; |
| 388 | volatile int8_t shooter_angle_rise_count; |
Brian Silverman | d241148 | 2013-03-28 21:36:32 -0700 | [diff] [blame] | 389 | static void ShooterHallRise() { |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 390 | GPIOINT->IO0IntClr |= (1 << 7); |
| 391 | // edge counting encoder capture |
Brian Silverman | d241148 | 2013-03-28 21:36:32 -0700 | [diff] [blame] | 392 | ++shooter_angle_rise_count; |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 393 | capture_shooter_angle_rise = encoder2_val; |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 394 | } |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 395 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 396 | // Count leading zeros. |
| 397 | // Returns 0 if bit 31 is set etc. |
Brian Silverman | ab2e676 | 2013-03-29 17:27:41 -0700 | [diff] [blame] | 398 | __attribute__((always_inline)) static __INLINE uint32_t __clz(uint32_t value) { |
| 399 | uint32_t result; |
| 400 | __asm__("clz %0, %1" : "=r" (result) : "r" (value)); |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 401 | return result; |
| 402 | } |
| 403 | inline static void IRQ_Dispatch(void) { |
Brian Silverman | d241148 | 2013-03-28 21:36:32 -0700 | [diff] [blame] | 404 | // TODO(brians): think about adding a loop here so that we can handle multiple |
| 405 | // interrupts right on top of each other faster |
Brian Silverman | ab2e676 | 2013-03-29 17:27:41 -0700 | [diff] [blame] | 406 | uint32_t index = __clz(GPIOINT->IO2IntStatR | GPIOINT->IO0IntStatR | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 407 | (GPIOINT->IO2IntStatF << 28) | (GPIOINT->IO0IntStatF << 4)); |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 408 | |
Brian Silverman | ab2e676 | 2013-03-29 17:27:41 -0700 | [diff] [blame] | 409 | typedef void (*Handler)(void); |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 410 | const static Handler table[] = { |
| 411 | Encoder5BFall, // index 0: P2.3 Fall #bit 31 //Encoder 5 B //Dio 10 |
| 412 | Encoder5AFall, // index 1: P2.2 Fall #bit 30 //Encoder 5 A //Dio 9 |
| 413 | Encoder4BFall, // index 2: P2.1 Fall #bit 29 //Encoder 4 B //Dio 8 |
| 414 | Encoder4AFall, // index 3: P2.0 Fall #bit 28 //Encoder 4 A //Dio 7 |
| 415 | NoGPIO, // index 4: NO GPIO #bit 27 |
| 416 | Encoder2AFall, // index 5: P0.22 Fall #bit 26 //Encoder 2 A |
| 417 | Encoder2BFall, // index 6: P0.21 Fall #bit 25 //Encoder 2 B |
| 418 | Encoder3AFall, // index 7: P0.20 Fall #bit 24 //Encoder 3 A |
| 419 | Encoder3BFall, // index 8: P0.19 Fall #bit 23 //Encoder 3 B |
| 420 | Encoder2ARise, // index 9: P0.22 Rise #bit 22 //Encoder 2 A |
| 421 | Encoder2BRise, // index 10: P0.21 Rise #bit 21 //Encoder 2 B |
| 422 | Encoder3ARise, // index 11: P0.20 Rise #bit 20 //Encoder 3 A |
| 423 | Encoder3BRise, // index 12: P0.19 Rise #bit 19 //Encoder 3 B |
| 424 | NoGPIO, // index 13: NO GPIO #bit 18 |
| 425 | NoGPIO, // index 14: NO GPIO #bit 17 |
| 426 | NoGPIO, // index 15: NO GPIO #bit 16 |
| 427 | NoGPIO, // index 16: NO GPIO #bit 15 |
| 428 | NoGPIO, // index 17: NO GPIO #bit 14 |
| 429 | NoGPIO, // index 18: NO GPIO #bit 13 |
| 430 | NoGPIO, // index 19: NO GPIO #bit 12 |
| 431 | NoGPIO, // index 20: NO GPIO #bit 11 |
| 432 | NoGPIO, // index 21: NO GPIO #bit 10 |
| 433 | IndexerTopFall, // index 22: P0.5 Fall #bit 9 //Indexer Top //Dio 2 |
| 434 | IndexerBottomFall, // index 23: P0.4 Fall #bit 8 //Indexer Bottom //Dio 1 |
| 435 | ShooterHallRise, // index 24: P0.7 Rise #bit 7 //Shooter Hall //Dio 4 |
| 436 | WristHallRise, // index 25: P0.6 Rise #bit 6 //Wrist Hall //Dio 3 |
| 437 | IndexerTopRise, // index 26: P0.5 Rise #bit 5 //Indexer Top //Dio 2 |
| 438 | IndexerBottomRise, // index 27: P0.4 Rise #bit 4 //Indexer Bottom //Dio 1 |
| 439 | Encoder5BRise, // index 28: P2.3 Rise #bit 3 //Encoder 5 B //Dio 10 |
| 440 | Encoder5ARise, // index 29: P2.2 Rise #bit 2 //Encoder 5 A //Dio 9 |
| 441 | Encoder4BRise, // index 30: P2.1 Rise #bit 1 //Encoder 4 B //Dio 8 |
| 442 | Encoder4ARise, // index 31: P2.0 Rise #bit 0 //Encoder 4 A //Dio 7 |
| 443 | NoGPIO // index 32: NO BITS SET #False Alarm |
| 444 | }; |
| 445 | table[index](); |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 446 | } |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 447 | void EINT3_IRQHandler(void) { |
Brian Silverman | d241148 | 2013-03-28 21:36:32 -0700 | [diff] [blame] | 448 | // Have to disable it here or else it re-fires the interrupt while the code |
| 449 | // reads to figure out which pin the interrupt is for. |
| 450 | // TODO(brians): figure out details + look for an alternative |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 451 | NVIC_DisableIRQ(EINT3_IRQn); |
| 452 | IRQ_Dispatch(); |
| 453 | NVIC_EnableIRQ(EINT3_IRQn); |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 454 | } |
Brian Silverman | d241148 | 2013-03-28 21:36:32 -0700 | [diff] [blame] | 455 | int32_t encoder_val(int chan) { |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 456 | int32_t val; |
Brian Silverman | d241148 | 2013-03-28 21:36:32 -0700 | [diff] [blame] | 457 | switch (chan) { |
| 458 | case 0: // Wrist |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 459 | return (int32_t)QEI->QEIPOS; |
Brian Silverman | d241148 | 2013-03-28 21:36:32 -0700 | [diff] [blame] | 460 | case 1: // Shooter Wheel |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 461 | NVIC_DisableIRQ(EINT1_IRQn); |
| 462 | NVIC_DisableIRQ(EINT2_IRQn); |
| 463 | val = encoder1_val; |
| 464 | NVIC_EnableIRQ(EINT2_IRQn); |
| 465 | NVIC_EnableIRQ(EINT1_IRQn); |
| 466 | return val; |
Brian Silverman | d241148 | 2013-03-28 21:36:32 -0700 | [diff] [blame] | 467 | case 2: // Shooter Angle |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 468 | NVIC_DisableIRQ(EINT3_IRQn); |
| 469 | val = encoder2_val; |
| 470 | NVIC_EnableIRQ(EINT3_IRQn); |
| 471 | return val; |
Brian Silverman | d241148 | 2013-03-28 21:36:32 -0700 | [diff] [blame] | 472 | case 3: // Indexer |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 473 | NVIC_DisableIRQ(EINT3_IRQn); |
| 474 | val = encoder3_val; |
| 475 | NVIC_EnableIRQ(EINT3_IRQn); |
| 476 | return val; |
Brian Silverman | d241148 | 2013-03-28 21:36:32 -0700 | [diff] [blame] | 477 | case 4: // Drive R |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 478 | NVIC_DisableIRQ(EINT3_IRQn); |
| 479 | val = encoder4_val; |
| 480 | NVIC_EnableIRQ(EINT3_IRQn); |
| 481 | return val; |
Brian Silverman | d241148 | 2013-03-28 21:36:32 -0700 | [diff] [blame] | 482 | case 5: // Drive L |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 483 | NVIC_DisableIRQ(EINT3_IRQn); |
| 484 | val = encoder5_val; |
| 485 | NVIC_EnableIRQ(EINT3_IRQn); |
| 486 | return val; |
| 487 | default: |
| 488 | return -1; |
| 489 | } |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 490 | } |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 491 | void fillSensorPacket(struct DataStruct *packet) { |
| 492 | packet->gyro_angle = gyro_angle; |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 493 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 494 | packet->shooter = encoder1_val; |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 495 | packet->right_drive = encoder4_val; |
| 496 | packet->left_drive = encoder5_val; |
| 497 | packet->shooter_angle = encoder2_val; |
| 498 | packet->indexer = encoder3_val; |
Brian Silverman | d241148 | 2013-03-28 21:36:32 -0700 | [diff] [blame] | 499 | |
Brian Silverman | 1289ded | 2013-03-29 21:59:51 -0700 | [diff] [blame] | 500 | NVIC_DisableIRQ(EINT1_IRQn); |
| 501 | NVIC_DisableIRQ(EINT2_IRQn); |
| 502 | |
| 503 | packet->wrist = (int32_t)QEI->QEIPOS; |
| 504 | packet->wrist_hall_effect = digital(0); |
| 505 | packet->capture_wrist_rise = capture_wrist_rise; |
| 506 | packet->wrist_rise_count = wrist_rise_count; |
| 507 | |
| 508 | NVIC_EnableIRQ(EINT1_IRQn); |
| 509 | NVIC_EnableIRQ(EINT2_IRQn); |
| 510 | |
Brian Silverman | d241148 | 2013-03-28 21:36:32 -0700 | [diff] [blame] | 511 | NVIC_DisableIRQ(EINT3_IRQn); |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 512 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 513 | packet->capture_top_rise = capture_top_rise; |
| 514 | packet->top_rise_count = top_rise_count; |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 515 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 516 | packet->capture_top_fall = capture_top_fall; |
| 517 | packet->top_fall_count = top_fall_count; |
Brian Silverman | 1289ded | 2013-03-29 21:59:51 -0700 | [diff] [blame] | 518 | packet->top_disc = digital(4); |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 519 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 520 | packet->capture_bottom_fall_delay = capture_bottom_fall_delay; |
| 521 | packet->bottom_fall_delay_count = bottom_fall_delay_count; |
| 522 | packet->bottom_fall_count = bottom_fall_count; |
Brian Silverman | 1289ded | 2013-03-29 21:59:51 -0700 | [diff] [blame] | 523 | packet->bottom_disc = digital(3); |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 524 | |
| 525 | packet->capture_shooter_angle_rise = capture_shooter_angle_rise; |
| 526 | packet->shooter_angle_rise_count = shooter_angle_rise_count; |
Brian Silverman | 1289ded | 2013-03-29 21:59:51 -0700 | [diff] [blame] | 527 | packet->angle_adjust_bottom_hall_effect = digital(2); |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 528 | |
| 529 | NVIC_EnableIRQ(EINT3_IRQn); |
| 530 | |
Brian Silverman | d241148 | 2013-03-28 21:36:32 -0700 | [diff] [blame] | 531 | packet->bottom_rise_count = bottom_rise_count; |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 532 | } |
| 533 | |
Brian Silverman | d241148 | 2013-03-28 21:36:32 -0700 | [diff] [blame] | 534 | void encoder_init(void) { |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 535 | // Setup the encoder interface. |
| 536 | SC->PCONP |= PCONP_PCQEI; |
| 537 | PINCON->PINSEL3 = ((PINCON->PINSEL3 & 0xffff3dff) | 0x00004100); |
| 538 | // Reset the count and velocity. |
| 539 | QEI->QEICON = 0x00000005; |
| 540 | QEI->QEICONF = 0x00000004; |
| 541 | // Wrap back to 0 when we wrap the int and vice versa. |
| 542 | QEI->QEIMAXPOS = 0xFFFFFFFF; |
brians | 0ab60bb | 2013-01-31 02:21:51 +0000 | [diff] [blame] | 543 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 544 | // Set up encoder 1. |
| 545 | // Make GPIOs 2.11 and 2.12 trigger EINT1 and EINT2 (respectively). |
| 546 | // PINSEL4[23:22] = {0 1} |
| 547 | // PINSEL4[25:24] = {0 1} |
| 548 | PINCON->PINSEL4 = (PINCON->PINSEL4 & ~(0x3 << 22)) | (0x1 << 22); |
| 549 | PINCON->PINSEL4 = (PINCON->PINSEL4 & ~(0x3 << 24)) | (0x1 << 24); |
| 550 | // Clear the interrupt flags for EINT1 and EINT2 (0x6 = 0b0110). |
| 551 | SC->EXTMODE = 0x6; |
| 552 | SC->EXTINT = 0x6; |
| 553 | NVIC_EnableIRQ(EINT1_IRQn); |
| 554 | NVIC_EnableIRQ(EINT2_IRQn); |
| 555 | encoder1_val = 0; |
brians | 0ab60bb | 2013-01-31 02:21:51 +0000 | [diff] [blame] | 556 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 557 | // Set up encoder 2. |
| 558 | GPIOINT->IO0IntEnF |= (1 << 22); // Set GPIO falling interrupt. |
| 559 | GPIOINT->IO0IntEnR |= (1 << 22); // Set GPIO rising interrupt. |
| 560 | GPIOINT->IO0IntEnF |= (1 << 21); // Set GPIO falling interrupt. |
| 561 | GPIOINT->IO0IntEnR |= (1 << 21); // Set GPIO rising interrupt. |
Brian Silverman | d241148 | 2013-03-28 21:36:32 -0700 | [diff] [blame] | 562 | // Make sure they're in mode 00 (the default, aka nothing special). |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 563 | PINCON->PINSEL1 &= ~(0x3 << 12); |
| 564 | PINCON->PINSEL1 &= ~(0x3 << 10); |
| 565 | encoder2_val = 0; |
brians | 0ab60bb | 2013-01-31 02:21:51 +0000 | [diff] [blame] | 566 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 567 | // Set up encoder 3. |
| 568 | GPIOINT->IO0IntEnF |= (1 << 20); // Set GPIO falling interrupt. |
| 569 | GPIOINT->IO0IntEnR |= (1 << 20); // Set GPIO rising interrupt. |
| 570 | GPIOINT->IO0IntEnF |= (1 << 19); // Set GPIO falling interrupt. |
| 571 | GPIOINT->IO0IntEnR |= (1 << 19); // Set GPIO rising interrupt. |
Brian Silverman | d241148 | 2013-03-28 21:36:32 -0700 | [diff] [blame] | 572 | // Make sure they're in mode 00 (the default, aka nothing special). |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 573 | PINCON->PINSEL1 &= ~(0x3 << 8); |
| 574 | PINCON->PINSEL1 &= ~(0x3 << 6); |
| 575 | encoder3_val = 0; |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 576 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 577 | // Set up encoder 4. |
| 578 | GPIOINT->IO2IntEnF |= (1 << 0); // Set GPIO falling interrupt. |
| 579 | GPIOINT->IO2IntEnR |= (1 << 0); // Set GPIO rising interrupt. |
| 580 | GPIOINT->IO2IntEnF |= (1 << 1); // Set GPIO falling interrupt. |
| 581 | GPIOINT->IO2IntEnR |= (1 << 1); // Set GPIO rising interrupt. |
Brian Silverman | d241148 | 2013-03-28 21:36:32 -0700 | [diff] [blame] | 582 | // Make sure they're in mode 00 (the default, aka nothing special). |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 583 | PINCON->PINSEL4 &= ~(0x3 << 0); |
| 584 | PINCON->PINSEL4 &= ~(0x3 << 2); |
| 585 | encoder4_val = 0; |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 586 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 587 | // Set up encoder 5. |
| 588 | GPIOINT->IO2IntEnF |= (1 << 2); // Set GPIO falling interrupt. |
| 589 | GPIOINT->IO2IntEnR |= (1 << 2); // Set GPIO rising interrupt. |
| 590 | GPIOINT->IO2IntEnF |= (1 << 3); // Set GPIO falling interrupt. |
| 591 | GPIOINT->IO2IntEnR |= (1 << 3); // Set GPIO rising interrupt. |
Brian Silverman | d241148 | 2013-03-28 21:36:32 -0700 | [diff] [blame] | 592 | // Make sure they're in mode 00 (the default, aka nothing special). |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 593 | PINCON->PINSEL4 &= ~(0x3 << 4); |
| 594 | PINCON->PINSEL4 &= ~(0x3 << 6); |
| 595 | encoder5_val = 0; |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 596 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 597 | // Enable interrupts from the GPIO pins. |
| 598 | NVIC_EnableIRQ(EINT3_IRQn); |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 599 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 600 | xTaskCreate(vDelayCapture, |
| 601 | (signed char *) "SENSORs", |
Brian Silverman | ab2e676 | 2013-03-29 17:27:41 -0700 | [diff] [blame] | 602 | configMINIMAL_STACK_SIZE + 100, |
| 603 | NULL /*parameters*/, |
| 604 | tskIDLE_PRIORITY + 5, |
| 605 | NULL /*return task handle*/); |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 606 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 607 | GPIOINT->IO0IntEnF |= (1 << 4); // Set GPIO falling interrupt |
| 608 | GPIOINT->IO0IntEnR |= (1 << 4); // Set GPIO rising interrupt |
| 609 | PINCON->PINSEL0 &= ~(0x3 << 8); |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 610 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 611 | GPIOINT->IO0IntEnF |= (1 << 5); // Set GPIO falling interrupt |
| 612 | GPIOINT->IO0IntEnR |= (1 << 5); // Set GPIO rising interrupt |
| 613 | PINCON->PINSEL0 &= ~(0x3 << 10); |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 614 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 615 | GPIOINT->IO0IntEnR |= (1 << 6); // Set GPIO rising interrupt |
| 616 | PINCON->PINSEL0 &= ~(0x3 << 12); |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 617 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 618 | GPIOINT->IO0IntEnR |= (1 << 7); // Set GPIO rising interrupt |
| 619 | PINCON->PINSEL0 &= ~(0x3 << 14); |
brians | 0ab60bb | 2013-01-31 02:21:51 +0000 | [diff] [blame] | 620 | } |