blob: 17903cfcf5d46064125c19491854568a9ffc2884 [file] [log] [blame]
Daniel Pettie7cb20f2013-10-20 05:00:51 +00001#include <string.h>
2
Brian Silvermanf92396c2013-09-12 20:13:13 -07003#include "fill_packet.h"
4#include "encoder.h"
5
6#include "FreeRTOS.h"
7#include "task.h"
8
9#include "digital.h"
10#include "analog.h"
Brian Silverman49876942013-10-11 17:50:26 -070011#include "gyro.h"
Brian Silvermanf92396c2013-09-12 20:13:13 -070012
13// How long (in ms) to wait after a falling edge on the bottom indexer sensor
14// before reading the indexer encoder.
15static const int kBottomFallDelayTime = 32;
Daniel Petti6300d682013-10-14 02:12:18 +000016// How long to wait for a revolution of the shooter wheel (on the third robot)
17// before said wheel is deemed "stopped". (In secs)
18static const uint8_t kWheelStopThreshold = 1;
Brian Silvermanf92396c2013-09-12 20:13:13 -070019
20#define ENC(gpio, a, b) readGPIO(gpio, a) * 2 + readGPIO(gpio, b)
21int encoder_bits(int channel) {
22 switch (channel) {
23 case 0:
24 return ENC(GPIO1, 20, 23);
25 case 1:
26 return ENC(GPIO2, 11, 12);
27 case 2:
28 return ENC(GPIO0, 21, 22);
29 case 3:
30 return ENC(GPIO0, 19, 20);
31 default:
32 return -1;
33 }
34 return -1;
35}
36#undef ENC
37
38// Uses EINT1 and EINT2 on 2.11 and 2.12.
39volatile int32_t encoder1_val;
40// On GPIO pins 0.22 and 0.21.
41volatile int32_t encoder2_val;
42// On GPIO pins 0.20 and 0.19.
43volatile int32_t encoder3_val;
44// On GPIO pins 2.0 and 2.1.
45volatile int32_t encoder4_val;
46// On GPIO pins 2.2 and 2.3.
47volatile int32_t encoder5_val;
48
Brian Silverman25aae9a2013-10-08 13:37:45 -070049// It is important to clear the various interrupt flags first thing in the ISRs.
50// It doesn't seem to work otherwise, possibly because of the reason that Brian
51// found poking around online: caches on the bus make it so that the clearing of
52// the interrupt gets to the NVIC after the ISR returns, so it runs the ISR a
53// second time. Also, by clearing them early, if a second interrupt arrives from
54// the same source it will still get handled instead of getting lost.
55
Brian Silvermanf92396c2013-09-12 20:13:13 -070056// ENC1A 2.11
57void EINT1_IRQHandler(void) {
Brian Silverman25aae9a2013-10-08 13:37:45 -070058 // Make sure to change this BEFORE clearing the interrupt like the datasheet
59 // says you have to.
Brian Silverman1623c332013-10-01 18:05:16 -070060 SC->EXTPOLAR ^= 0x2;
Brian Silvermanf92396c2013-09-12 20:13:13 -070061 SC->EXTINT = 0x2;
62 int fiopin = GPIO2->FIOPIN;
Brian Silverman25aae9a2013-10-08 13:37:45 -070063 // This looks like a weird way to XOR the 2 inputs, but it compiles down to
64 // just 2 instructions, which is hard to beat.
Brian Silvermanf92396c2013-09-12 20:13:13 -070065 if (((fiopin >> 1) ^ fiopin) & 0x800) {
66 ++encoder1_val;
67 } else {
68 --encoder1_val;
69 }
Brian Silvermanf92396c2013-09-12 20:13:13 -070070}
71// ENC1B 2.12
72void EINT2_IRQHandler(void) {
Brian Silverman1623c332013-10-01 18:05:16 -070073 SC->EXTPOLAR ^= 0x4;
Brian Silvermanf92396c2013-09-12 20:13:13 -070074 SC->EXTINT = 0x4;
75 int fiopin = GPIO2->FIOPIN;
76 if (((fiopin >> 1) ^ fiopin) & 0x800) {
77 --encoder1_val;
78 } else {
79 ++encoder1_val;
80 }
Brian Silvermanf92396c2013-09-12 20:13:13 -070081}
82
Daniel Petti6300d682013-10-14 02:12:18 +000083static inline void reset_TC(void) {
Daniel Pettie7cb20f2013-10-20 05:00:51 +000084 TIM2->TCR |= (1 << 1); // Put it into reset.
85 while (TIM2->TC != 0) { // Wait for reset.
Daniel Petti6300d682013-10-14 02:12:18 +000086 continue;
87 }
Daniel Pettie7cb20f2013-10-20 05:00:51 +000088 TIM2->TCR = 1; // Take it out of reset + make sure it's enabled.
Daniel Petti6300d682013-10-14 02:12:18 +000089}
90
Daniel Pettie7cb20f2013-10-20 05:00:51 +000091// TIM2
Daniel Pettid9c84d42013-10-15 04:51:07 +000092volatile uint32_t shooter_cycle_ticks;
Daniel Pettie7cb20f2013-10-20 05:00:51 +000093void TIMER2_IRQHandler(void) {
Daniel Petti6300d682013-10-14 02:12:18 +000094 // Apparently, this handler runs regardless of a match or capture event.
Daniel Pettie7cb20f2013-10-20 05:00:51 +000095 if (TIM2->IR & (1 << 4)) {
Daniel Petti6300d682013-10-14 02:12:18 +000096 // Capture
Daniel Pettie7cb20f2013-10-20 05:00:51 +000097 TIM2->IR = (1 << 3); // Clear the interrupt.
Daniel Petti6300d682013-10-14 02:12:18 +000098
Daniel Pettie7cb20f2013-10-20 05:00:51 +000099 shooter_cycle_ticks = TIM2->CR0;
Daniel Petti6300d682013-10-14 02:12:18 +0000100
101 reset_TC();
Daniel Pettie7cb20f2013-10-20 05:00:51 +0000102 } else if (TIM2->IR & 1) {
Daniel Petti6300d682013-10-14 02:12:18 +0000103 // Match
Daniel Pettie7cb20f2013-10-20 05:00:51 +0000104 TIM2->IR = 1; // Clear the interrupt
Daniel Petti6300d682013-10-14 02:12:18 +0000105
106 // Assume shooter is stopped.
107 shooter_cycle_ticks = 0;
108
109 // Disable timer.
Daniel Pettie7cb20f2013-10-20 05:00:51 +0000110 TIM2->TCR = 0;
Daniel Petti6300d682013-10-14 02:12:18 +0000111 }
112
113 // It will only handle one interrupt per run.
114 // If there is another interrupt pending, it won't be cleared, and the ISR
115 // will be run again to handle it.
116}
117
Brian Silverman1623c332013-10-01 18:05:16 -0700118// TODO(brians): Have this indicate some kind of error instead of just looping
119// infinitely in the ISR because it never clears it.
120static void NoGPIO(void) {}
121static void Encoder2ARise(void) {
122 GPIOINT->IO0IntClr = (1 << 22);
Brian Silvermanf92396c2013-09-12 20:13:13 -0700123 if (GPIO0->FIOPIN & (1 << 21)) {
124 ++encoder2_val;
125 } else {
126 --encoder2_val;
127 }
128}
Brian Silverman1623c332013-10-01 18:05:16 -0700129static void Encoder2AFall(void) {
130 GPIOINT->IO0IntClr = (1 << 22);
Brian Silvermanf92396c2013-09-12 20:13:13 -0700131 if (GPIO0->FIOPIN & (1 << 21)) {
132 --encoder2_val;
133 } else {
134 ++encoder2_val;
135 }
136}
Brian Silverman1623c332013-10-01 18:05:16 -0700137static void Encoder2BRise(void) {
138 GPIOINT->IO0IntClr = (1 << 21);
Brian Silvermanf92396c2013-09-12 20:13:13 -0700139 if (GPIO0->FIOPIN & (1 << 22)) {
140 --encoder2_val;
141 } else {
142 ++encoder2_val;
143 }
144}
Brian Silverman1623c332013-10-01 18:05:16 -0700145static void Encoder2BFall(void) {
146 GPIOINT->IO0IntClr = (1 << 21);
Brian Silvermanf92396c2013-09-12 20:13:13 -0700147 if (GPIO0->FIOPIN & (1 << 22)) {
148 ++encoder2_val;
149 } else {
150 --encoder2_val;
151 }
152}
153
Brian Silverman1623c332013-10-01 18:05:16 -0700154static void Encoder3ARise(void) {
155 GPIOINT->IO0IntClr = (1 << 20);
Brian Silvermanf92396c2013-09-12 20:13:13 -0700156 if (GPIO0->FIOPIN & (1 << 19)) {
157 ++encoder3_val;
158 } else {
159 --encoder3_val;
160 }
161}
Brian Silverman1623c332013-10-01 18:05:16 -0700162static void Encoder3AFall(void) {
163 GPIOINT->IO0IntClr = (1 << 20);
Brian Silvermanf92396c2013-09-12 20:13:13 -0700164 if (GPIO0->FIOPIN & (1 << 19)) {
165 --encoder3_val;
166 } else {
167 ++encoder3_val;
168 }
169}
Brian Silverman1623c332013-10-01 18:05:16 -0700170static void Encoder3BRise(void) {
171 GPIOINT->IO0IntClr = (1 << 19);
Brian Silvermanf92396c2013-09-12 20:13:13 -0700172 if (GPIO0->FIOPIN & (1 << 20)) {
173 --encoder3_val;
174 } else {
175 ++encoder3_val;
176 }
177}
Brian Silverman1623c332013-10-01 18:05:16 -0700178static void Encoder3BFall(void) {
179 GPIOINT->IO0IntClr = (1 << 19);
Brian Silvermanf92396c2013-09-12 20:13:13 -0700180 if (GPIO0->FIOPIN & (1 << 20)) {
181 ++encoder3_val;
182 } else {
183 --encoder3_val;
184 }
185}
186
Brian Silverman1623c332013-10-01 18:05:16 -0700187static void Encoder4ARise(void) {
188 GPIOINT->IO2IntClr = (1 << 0);
Brian Silvermanf92396c2013-09-12 20:13:13 -0700189 if (GPIO2->FIOPIN & (1 << 1)) {
190 ++encoder4_val;
191 } else {
192 --encoder4_val;
193 }
194}
Brian Silverman1623c332013-10-01 18:05:16 -0700195static void Encoder4AFall(void) {
196 GPIOINT->IO2IntClr = (1 << 0);
Brian Silvermanf92396c2013-09-12 20:13:13 -0700197 if (GPIO2->FIOPIN & (1 << 1)) {
198 --encoder4_val;
199 } else {
200 ++encoder4_val;
201 }
202}
Brian Silverman1623c332013-10-01 18:05:16 -0700203static void Encoder4BRise(void) {
204 GPIOINT->IO2IntClr = (1 << 1);
Brian Silvermanf92396c2013-09-12 20:13:13 -0700205 if (GPIO2->FIOPIN & (1 << 0)) {
206 --encoder4_val;
207 } else {
208 ++encoder4_val;
209 }
210}
Brian Silverman1623c332013-10-01 18:05:16 -0700211static void Encoder4BFall(void) {
212 GPIOINT->IO2IntClr = (1 << 1);
Brian Silvermanf92396c2013-09-12 20:13:13 -0700213 if (GPIO2->FIOPIN & (1 << 0)) {
214 ++encoder4_val;
215 } else {
216 --encoder4_val;
217 }
218}
219
Brian Silverman1623c332013-10-01 18:05:16 -0700220static void Encoder5ARise(void) {
221 GPIOINT->IO2IntClr = (1 << 2);
Brian Silvermanf92396c2013-09-12 20:13:13 -0700222 if (GPIO2->FIOPIN & (1 << 3)) {
223 ++encoder5_val;
224 } else {
225 --encoder5_val;
226 }
227}
Brian Silverman1623c332013-10-01 18:05:16 -0700228static void Encoder5AFall(void) {
229 GPIOINT->IO2IntClr = (1 << 2);
Brian Silvermanf92396c2013-09-12 20:13:13 -0700230 if (GPIO2->FIOPIN & (1 << 3)) {
231 --encoder5_val;
232 } else {
233 ++encoder5_val;
234 }
235}
Brian Silverman1623c332013-10-01 18:05:16 -0700236static void Encoder5BRise(void) {
237 GPIOINT->IO2IntClr = (1 << 3);
Brian Silvermanf92396c2013-09-12 20:13:13 -0700238 if (GPIO2->FIOPIN & (1 << 2)) {
239 --encoder5_val;
240 } else {
241 ++encoder5_val;
242 }
243}
Brian Silverman1623c332013-10-01 18:05:16 -0700244static void Encoder5BFall(void) {
245 GPIOINT->IO2IntClr = (1 << 3);
Brian Silvermanf92396c2013-09-12 20:13:13 -0700246 if (GPIO2->FIOPIN & (1 << 2)) {
247 ++encoder5_val;
248 } else {
249 --encoder5_val;
250 }
251}
252
253volatile int32_t capture_top_rise;
254volatile int8_t top_rise_count;
Brian Silverman1623c332013-10-01 18:05:16 -0700255static void IndexerTopRise(void) {
256 GPIOINT->IO0IntClr = (1 << 5);
Brian Silvermanf92396c2013-09-12 20:13:13 -0700257 // edge counting encoder capture
258 ++top_rise_count;
259 capture_top_rise = encoder3_val;
260}
261volatile int32_t capture_top_fall;
262volatile int8_t top_fall_count;
Brian Silverman1623c332013-10-01 18:05:16 -0700263static void IndexerTopFall(void) {
264 GPIOINT->IO0IntClr = (1 << 5);
Brian Silvermanf92396c2013-09-12 20:13:13 -0700265 // edge counting encoder capture
266 ++top_fall_count;
267 capture_top_fall = encoder3_val;
268}
269volatile int8_t bottom_rise_count;
Brian Silverman1623c332013-10-01 18:05:16 -0700270static void IndexerBottomRise(void) {
271 GPIOINT->IO0IntClr = (1 << 4);
Brian Silvermanf92396c2013-09-12 20:13:13 -0700272 // edge counting
273 ++bottom_rise_count;
274}
275volatile int32_t capture_bottom_fall_delay;
276volatile int8_t bottom_fall_delay_count;
Brian Silvermanf92396c2013-09-12 20:13:13 -0700277portTickType xDelayTimeFrom;
278static portTASK_FUNCTION(vDelayCapture, pvParameters)
279{
280 portTickType xSleepFrom = xTaskGetTickCount();
281
282 for (;;) {
Brian Silverman25aae9a2013-10-08 13:37:45 -0700283 // Atomically (wrt the ISR) switch xDelayTimeFrom to 0 and store its old
284 // value to use later.
Brian Silvermanf92396c2013-09-12 20:13:13 -0700285 NVIC_DisableIRQ(EINT3_IRQn);
Brian Silverman25aae9a2013-10-08 13:37:45 -0700286 portTickType new_time = xDelayTimeFrom;
287 xDelayTimeFrom = 0;
288 NVIC_EnableIRQ(EINT3_IRQn);
289
290 if (new_time != 0) {
291 xSleepFrom = new_time;
Brian Silvermanf92396c2013-09-12 20:13:13 -0700292
293 vTaskDelayUntil(&xSleepFrom, kBottomFallDelayTime / portTICK_RATE_MS);
294
Brian Silverman25aae9a2013-10-08 13:37:45 -0700295 // Make sure that the USB ISR doesn't look at inconsistent values.
Brian Silverman1623c332013-10-01 18:05:16 -0700296 NVIC_DisableIRQ(USB_IRQn);
Brian Silvermanf92396c2013-09-12 20:13:13 -0700297 capture_bottom_fall_delay = encoder3_val;
Brian Silverman1623c332013-10-01 18:05:16 -0700298 ++bottom_fall_delay_count;
299 NVIC_EnableIRQ(USB_IRQn);
Brian Silvermanf92396c2013-09-12 20:13:13 -0700300 } else {
Brian Silverman25aae9a2013-10-08 13:37:45 -0700301 // Wait 10ms and then check again.
Brian Silvermanf92396c2013-09-12 20:13:13 -0700302 vTaskDelayUntil(&xSleepFrom, 10 / portTICK_RATE_MS);
303 }
304 }
305}
306
307volatile int8_t bottom_fall_count;
Brian Silverman1623c332013-10-01 18:05:16 -0700308static void IndexerBottomFall(void) {
309 GPIOINT->IO0IntClr = (1 << 4);
Brian Silvermanf92396c2013-09-12 20:13:13 -0700310 ++bottom_fall_count;
311 // edge counting start delayed capture
312 xDelayTimeFrom = xTaskGetTickCount();
Brian Silvermanf92396c2013-09-12 20:13:13 -0700313}
314volatile int32_t capture_wrist_rise;
315volatile int8_t wrist_rise_count;
Brian Silverman1623c332013-10-01 18:05:16 -0700316static void WristHallRise(void) {
317 GPIOINT->IO0IntClr = (1 << 6);
Brian Silvermanf92396c2013-09-12 20:13:13 -0700318 // edge counting encoder capture
319 ++wrist_rise_count;
320 capture_wrist_rise = (int32_t)QEI->QEIPOS;
321}
322volatile int32_t capture_shooter_angle_rise;
323volatile int8_t shooter_angle_rise_count;
Brian Silverman1623c332013-10-01 18:05:16 -0700324static void ShooterHallRise(void) {
325 GPIOINT->IO0IntClr = (1 << 7);
Brian Silvermanf92396c2013-09-12 20:13:13 -0700326 // edge counting encoder capture
327 ++shooter_angle_rise_count;
328 capture_shooter_angle_rise = encoder2_val;
329}
Daniel Pettie7cb20f2013-10-20 05:00:51 +0000330
331// Third robot shooter.
Daniel Petti6300d682013-10-14 02:12:18 +0000332static void ShooterPhotoFall(void) {
333 GPIOINT->IO0IntClr = (1 << 23);
334 // We reset TC to make sure we don't get a crap
335 // value from CR0 when the capture interrupt occurs
Daniel Pettie7cb20f2013-10-20 05:00:51 +0000336 // if the shooter is just starting up again, and so
337 // that the match interrupt thing works right.
Daniel Petti6300d682013-10-14 02:12:18 +0000338 reset_TC();
339}
Brian Silvermanf92396c2013-09-12 20:13:13 -0700340
Daniel Pettie7cb20f2013-10-20 05:00:51 +0000341typedef void (*Handler)(void);
342// Contains default pointers for ISR functions.
343// (These can be used without modifications on the comp/practice bots.)
344Handler ISRTable[] = {
Brian Silvermanf92396c2013-09-12 20:13:13 -0700345 Encoder5BFall, // index 0: P2.3 Fall #bit 31 //Encoder 5 B //Dio 10
346 Encoder5AFall, // index 1: P2.2 Fall #bit 30 //Encoder 5 A //Dio 9
347 Encoder4BFall, // index 2: P2.1 Fall #bit 29 //Encoder 4 B //Dio 8
348 Encoder4AFall, // index 3: P2.0 Fall #bit 28 //Encoder 4 A //Dio 7
Daniel Pettie7cb20f2013-10-20 05:00:51 +0000349 NoGPIO, // index 4: NO GPIO #bit 27
Brian Silvermanf92396c2013-09-12 20:13:13 -0700350 Encoder2AFall, // index 5: P0.22 Fall #bit 26 //Encoder 2 A
351 Encoder2BFall, // index 6: P0.21 Fall #bit 25 //Encoder 2 B
352 Encoder3AFall, // index 7: P0.20 Fall #bit 24 //Encoder 3 A
353 Encoder3BFall, // index 8: P0.19 Fall #bit 23 //Encoder 3 B
354 Encoder2ARise, // index 9: P0.22 Rise #bit 22 //Encoder 2 A
355 Encoder2BRise, // index 10: P0.21 Rise #bit 21 //Encoder 2 B
356 Encoder3ARise, // index 11: P0.20 Rise #bit 20 //Encoder 3 A
357 Encoder3BRise, // index 12: P0.19 Rise #bit 19 //Encoder 3 B
358 NoGPIO, // index 13: NO GPIO #bit 18
359 NoGPIO, // index 14: NO GPIO #bit 17
360 NoGPIO, // index 15: NO GPIO #bit 16
361 NoGPIO, // index 16: NO GPIO #bit 15
362 NoGPIO, // index 17: NO GPIO #bit 14
363 NoGPIO, // index 18: NO GPIO #bit 13
364 NoGPIO, // index 19: NO GPIO #bit 12
365 ShooterHallRise, // index 20: P0.7 Fall #bit 11 //Shooter Hall //Dio 4
366 WristHallRise, // index 21: P0.6 Fall #bit 10 //Wrist Hall //Dio 3
367 IndexerTopRise, // index 22: P0.5 Fall #bit 9 //Indexer Top //Dio 2
368 IndexerBottomRise, // index 23: P0.4 Fall #bit 8 //Indexer Bottom //Dio 1
369 NoGPIO, // index 24: NO GPIO #bit 7
370 NoGPIO, // index 25: NO GPIO #bit 6
371 IndexerTopFall, // index 26: P0.5 Rise #bit 5 //Indexer Top //Dio 2
372 IndexerBottomFall, // index 27: P0.4 Rise #bit 4 //Indexer Bottom //Dio 1
373 Encoder5BRise, // index 28: P2.3 Rise #bit 3 //Encoder 5 B //Dio 10
374 Encoder5ARise, // index 29: P2.2 Rise #bit 2 //Encoder 5 A //Dio 9
375 Encoder4BRise, // index 30: P2.1 Rise #bit 1 //Encoder 4 B //Dio 8
376 Encoder4ARise, // index 31: P2.0 Rise #bit 0 //Encoder 4 A //Dio 7
377 NoGPIO // index 32: NO BITS SET #False Alarm
Daniel Pettie7cb20f2013-10-20 05:00:51 +0000378};
379
380// Count leading zeros.
381// Returns 0 if bit 31 is set etc.
382__attribute__((always_inline)) static __INLINE uint32_t __clz(uint32_t value) {
383 uint32_t result;
384 __asm__("clz %0, %1" : "=r" (result) : "r" (value));
385 return result;
386}
387inline static void IRQ_Dispatch(void) {
388 // There is no need to add a loop here to handle multiple interrupts at the
389 // same time because the processor has tail chaining of interrupts which we
390 // can't really beat with our own loop.
391 // It would actually be bad because a loop here would block EINT1/2 for longer
392 // lengths of time.
393
394 uint32_t index = __clz(GPIOINT->IO2IntStatR | GPIOINT->IO0IntStatR |
395 (GPIOINT->IO2IntStatF << 28) | (GPIOINT->IO0IntStatF << 4));
396
397 ISRTable[index]();
Brian Silvermanf92396c2013-09-12 20:13:13 -0700398}
399void EINT3_IRQHandler(void) {
Brian Silvermanf92396c2013-09-12 20:13:13 -0700400 IRQ_Dispatch();
Brian Silvermanf92396c2013-09-12 20:13:13 -0700401}
Daniel Pettie7cb20f2013-10-20 05:00:51 +0000402
Brian Silvermanf92396c2013-09-12 20:13:13 -0700403int32_t encoder_val(int chan) {
404 int32_t val;
405 switch (chan) {
406 case 0: // Wrist
407 return (int32_t)QEI->QEIPOS;
408 case 1: // Shooter Wheel
409 NVIC_DisableIRQ(EINT1_IRQn);
410 NVIC_DisableIRQ(EINT2_IRQn);
411 val = encoder1_val;
412 NVIC_EnableIRQ(EINT2_IRQn);
413 NVIC_EnableIRQ(EINT1_IRQn);
414 return val;
415 case 2: // Shooter Angle
416 NVIC_DisableIRQ(EINT3_IRQn);
417 val = encoder2_val;
418 NVIC_EnableIRQ(EINT3_IRQn);
419 return val;
420 case 3: // Indexer
421 NVIC_DisableIRQ(EINT3_IRQn);
422 val = encoder3_val;
423 NVIC_EnableIRQ(EINT3_IRQn);
424 return val;
425 case 4: // Drive R
426 NVIC_DisableIRQ(EINT3_IRQn);
427 val = encoder4_val;
428 NVIC_EnableIRQ(EINT3_IRQn);
429 return val;
430 case 5: // Drive L
431 NVIC_DisableIRQ(EINT3_IRQn);
432 val = encoder5_val;
433 NVIC_EnableIRQ(EINT3_IRQn);
434 return val;
435 default:
436 return -1;
437 }
438}
439
440void encoder_init(void) {
441 // Setup the encoder interface.
442 SC->PCONP |= PCONP_PCQEI;
443 PINCON->PINSEL3 = ((PINCON->PINSEL3 & 0xffff3dff) | 0x00004100);
444 // Reset the count and velocity.
445 QEI->QEICON = 0x00000005;
446 QEI->QEICONF = 0x00000004;
447 // Wrap back to 0 when we wrap the int and vice versa.
448 QEI->QEIMAXPOS = 0xFFFFFFFF;
Daniel Pettid9c84d42013-10-15 04:51:07 +0000449
Brian Silvermanf92396c2013-09-12 20:13:13 -0700450 // Set up encoder 4.
451 GPIOINT->IO2IntEnF |= (1 << 0); // Set GPIO falling interrupt.
452 GPIOINT->IO2IntEnR |= (1 << 0); // Set GPIO rising interrupt.
453 GPIOINT->IO2IntEnF |= (1 << 1); // Set GPIO falling interrupt.
454 GPIOINT->IO2IntEnR |= (1 << 1); // Set GPIO rising interrupt.
455 // Make sure they're in mode 00 (the default, aka nothing special).
456 PINCON->PINSEL4 &= ~(0x3 << 0);
457 PINCON->PINSEL4 &= ~(0x3 << 2);
458 encoder4_val = 0;
459
460 // Set up encoder 5.
461 GPIOINT->IO2IntEnF |= (1 << 2); // Set GPIO falling interrupt.
462 GPIOINT->IO2IntEnR |= (1 << 2); // Set GPIO rising interrupt.
463 GPIOINT->IO2IntEnF |= (1 << 3); // Set GPIO falling interrupt.
464 GPIOINT->IO2IntEnR |= (1 << 3); // Set GPIO rising interrupt.
465 // Make sure they're in mode 00 (the default, aka nothing special).
466 PINCON->PINSEL4 &= ~(0x3 << 4);
467 PINCON->PINSEL4 &= ~(0x3 << 6);
468 encoder5_val = 0;
469
470 // Enable interrupts from the GPIO pins.
471 NVIC_EnableIRQ(EINT3_IRQn);
472
473 if (is_bot3) {
Daniel Pettie7cb20f2013-10-20 05:00:51 +0000474 // Modify robot handler table for third robot.
475 ISRTable[23] = ShooterPhotoFall;
476
Daniel Petti6300d682013-10-14 02:12:18 +0000477 // Set up timer for bot3 photosensor.
Daniel Pettie7cb20f2013-10-20 05:00:51 +0000478 // Make sure timer two is powered.
479 SC->PCONP |= (1 << 22);
Daniel Petti6300d682013-10-14 02:12:18 +0000480 // We don't need all the precision the CCLK can provide.
481 // We'll use CCLK/8. (12.5 mhz).
Daniel Pettie7cb20f2013-10-20 05:00:51 +0000482 SC->PCLKSEL1 |= (0x3 << 12);
Daniel Petti6300d682013-10-14 02:12:18 +0000483 // Use timer prescale to get that freq down to 500 hz.
Daniel Pettie7cb20f2013-10-20 05:00:51 +0000484 TIM2->PR = 25000;
485 // Select capture 2.0 function on pin 0.4.
486 PINCON->PINSEL0 |= (0x3 << 8);
Daniel Petti6300d682013-10-14 02:12:18 +0000487 // Set timer to capture and interrupt on rising edge.
Daniel Pettie7cb20f2013-10-20 05:00:51 +0000488 TIM2->CCR = 0x5;
Daniel Petti6300d682013-10-14 02:12:18 +0000489 // Set up match interrupt.
Daniel Pettie7cb20f2013-10-20 05:00:51 +0000490 TIM2->MR0 = kWheelStopThreshold * 500;
491 TIM2->MCR = 1;
Daniel Petti6300d682013-10-14 02:12:18 +0000492 // Enable timer IRQ, and make it lower priority than the encoders.
493 NVIC_SetPriority(TIMER3_IRQn, 1);
494 NVIC_EnableIRQ(TIMER3_IRQn);
495 // Set up GPIO interrupt on other edge.
Daniel Petti6300d682013-10-14 02:12:18 +0000496 GPIOINT->IO0IntEnF |= (1 << 23);
Daniel Pettid9c84d42013-10-15 04:51:07 +0000497
Brian Silvermanf92396c2013-09-12 20:13:13 -0700498 } else { // is main robot
Daniel Pettid9c84d42013-10-15 04:51:07 +0000499 // Set up encoder 1.
500 // Make GPIOs 2.11 and 2.12 trigger EINT1 and EINT2 (respectively).
501 // PINSEL4[23:22] = {0 1}
502 // PINSEL4[25:24] = {0 1}
503 PINCON->PINSEL4 = (PINCON->PINSEL4 & ~(0x3 << 22)) | (0x1 << 22);
504 PINCON->PINSEL4 = (PINCON->PINSEL4 & ~(0x3 << 24)) | (0x1 << 24);
505 // Clear the interrupt flags for EINT1 and EINT2 (0x6 = 0b0110).
506 SC->EXTMODE = 0x6;
507 SC->EXTINT = 0x6;
508 NVIC_EnableIRQ(EINT1_IRQn);
509 NVIC_EnableIRQ(EINT2_IRQn);
510 encoder1_val = 0;
511
512 // Set up encoder 2.
513 GPIOINT->IO0IntEnF |= (1 << 22); // Set GPIO falling interrupt.
514 GPIOINT->IO0IntEnR |= (1 << 22); // Set GPIO rising interrupt.
515 GPIOINT->IO0IntEnF |= (1 << 21); // Set GPIO falling interrupt.
516 GPIOINT->IO0IntEnR |= (1 << 21); // Set GPIO rising interrupt.
517 // Make sure they're in mode 00 (the default, aka nothing special).
518 PINCON->PINSEL1 &= ~(0x3 << 12);
519 PINCON->PINSEL1 &= ~(0x3 << 10);
520 encoder2_val = 0;
521
522 // Set up encoder 3.
523 GPIOINT->IO0IntEnF |= (1 << 20); // Set GPIO falling interrupt.
524 GPIOINT->IO0IntEnR |= (1 << 20); // Set GPIO rising interrupt.
525 GPIOINT->IO0IntEnF |= (1 << 19); // Set GPIO falling interrupt.
526 GPIOINT->IO0IntEnR |= (1 << 19); // Set GPIO rising interrupt.
527 // Make sure they're in mode 00 (the default, aka nothing special).
528 PINCON->PINSEL1 &= ~(0x3 << 8);
529 PINCON->PINSEL1 &= ~(0x3 << 6);
530 encoder3_val = 0;
531
Brian Silvermanf92396c2013-09-12 20:13:13 -0700532 xTaskCreate(vDelayCapture,
533 (signed char *) "SENSORs",
534 configMINIMAL_STACK_SIZE + 100,
535 NULL /*parameters*/,
536 tskIDLE_PRIORITY + 5,
537 NULL /*return task handle*/);
538
539 GPIOINT->IO0IntEnF |= (1 << 4); // Set GPIO falling interrupt
540 GPIOINT->IO0IntEnR |= (1 << 4); // Set GPIO rising interrupt
541 PINCON->PINSEL0 &= ~(0x3 << 8);
542
543 GPIOINT->IO0IntEnF |= (1 << 5); // Set GPIO falling interrupt
544 GPIOINT->IO0IntEnR |= (1 << 5); // Set GPIO rising interrupt
545 PINCON->PINSEL0 &= ~(0x3 << 10);
546
547 GPIOINT->IO0IntEnF |= (1 << 6);
548 PINCON->PINSEL0 &= ~(0x3 << 12);
549
550 GPIOINT->IO0IntEnF |= (1 << 7);
551 PINCON->PINSEL0 &= ~(0x3 << 14);
552 }
553}
554
555void fillSensorPacket(struct DataStruct *packet) {
Brian Silvermand36b7d32013-10-24 15:56:47 -0700556 if (gyro_output.initialized) {
557 packet->gyro_angle = gyro_output.angle;
558 packet->old_gyro_reading = gyro_output.last_reading_bad;
559 packet->bad_gyro = gyro_output.gyro_bad;
560 } else {
561 packet->gyro_angle = 0;
562 packet->old_gyro_reading = 1;
563 packet->bad_gyro = 0;
564 }
Brian Silvermanf92396c2013-09-12 20:13:13 -0700565
566 packet->dip_switch0 = dip_switch(0);
567 packet->dip_switch1 = dip_switch(1);
568 packet->dip_switch2 = dip_switch(2);
569 packet->dip_switch3 = dip_switch(3);
570
Brian Silverman25aae9a2013-10-08 13:37:45 -0700571 // We disable EINT3 to avoid sending back inconsistent values. All of the
572 // aligned reads from the variables are atomic, so disabling it isn't
573 // necessary for just reading encoder values. We re-enable it periodically
574 // because disabling and enabling is cheap (2 instructions) and we really rely
575 // on low interrupt latencies.
576
Daniel Pettid9c84d42013-10-15 04:51:07 +0000577 packet->main.left_drive = encoder5_val;
578 packet->main.right_drive = encoder4_val;
579
Brian Silvermanf92396c2013-09-12 20:13:13 -0700580 if (is_bot3) {
581 packet->robot_id = 1;
Daniel Pettid9c84d42013-10-15 04:51:07 +0000582
583 packet->bot3.shooter_cycle_ticks = shooter_cycle_ticks;
Brian Silvermanf92396c2013-09-12 20:13:13 -0700584 } else { // is main robot
585 packet->robot_id = 0;
586
587 packet->main.shooter = encoder1_val;
Brian Silvermanf92396c2013-09-12 20:13:13 -0700588 packet->main.indexer = encoder3_val;
589
Brian Silverman25aae9a2013-10-08 13:37:45 -0700590 NVIC_DisableIRQ(EINT3_IRQn);
Brian Silvermanf92396c2013-09-12 20:13:13 -0700591
592 packet->main.wrist = (int32_t)QEI->QEIPOS;
593 packet->main.wrist_hall_effect = !digital(3);
594 packet->main.capture_wrist_rise = capture_wrist_rise;
595 packet->main.wrist_rise_count = wrist_rise_count;
596
Brian Silverman25aae9a2013-10-08 13:37:45 -0700597 NVIC_EnableIRQ(EINT3_IRQn);
Brian Silvermanf92396c2013-09-12 20:13:13 -0700598 NVIC_DisableIRQ(EINT3_IRQn);
599
600 packet->main.capture_top_rise = capture_top_rise;
601 packet->main.top_rise_count = top_rise_count;
Brian Silvermanf92396c2013-09-12 20:13:13 -0700602 packet->main.capture_top_fall = capture_top_fall;
603 packet->main.top_fall_count = top_fall_count;
604 packet->main.top_disc = !digital(2);
605
Brian Silverman25aae9a2013-10-08 13:37:45 -0700606 NVIC_EnableIRQ(EINT3_IRQn);
607 NVIC_DisableIRQ(EINT3_IRQn);
608
Brian Silvermanf92396c2013-09-12 20:13:13 -0700609 packet->main.capture_bottom_fall_delay = capture_bottom_fall_delay;
610 packet->main.bottom_fall_delay_count = bottom_fall_delay_count;
611 packet->main.bottom_fall_count = bottom_fall_count;
612 packet->main.bottom_disc = !digital(1);
613
Brian Silverman25aae9a2013-10-08 13:37:45 -0700614 NVIC_EnableIRQ(EINT3_IRQn);
615 NVIC_DisableIRQ(EINT3_IRQn);
616
Brian Silverman1623c332013-10-01 18:05:16 -0700617 packet->main.loader_top = !digital(5);
618 packet->main.loader_bottom = !digital(6);
619
Brian Silverman25aae9a2013-10-08 13:37:45 -0700620 NVIC_EnableIRQ(EINT3_IRQn);
621 NVIC_DisableIRQ(EINT3_IRQn);
622
623 packet->main.shooter_angle = encoder2_val;
Brian Silvermanf92396c2013-09-12 20:13:13 -0700624 packet->main.capture_shooter_angle_rise = capture_shooter_angle_rise;
625 packet->main.shooter_angle_rise_count = shooter_angle_rise_count;
626 packet->main.angle_adjust_bottom_hall_effect = !digital(4);
627
628 NVIC_EnableIRQ(EINT3_IRQn);
629
630 packet->main.bottom_rise_count = bottom_rise_count;
631 }
632}