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Brian Silvermanb5b46ca2016-03-13 01:14:17 -05001#include "frc971/wpilib/dma.h"
Brian Silverman2aa83d72015-01-24 18:03:11 -05002
Austin Schuh58d8cdf2015-02-15 21:04:42 -08003#include <string.h>
4
Brian Silverman2aa83d72015-01-24 18:03:11 -05005#include <algorithm>
Brian Silvermand49fd782015-01-30 16:43:17 -05006#include <type_traits>
7
Parker Schuhd3b7a8872018-02-19 16:42:27 -08008#include "frc971/wpilib/ahal/AnalogInput.h"
9#include "frc971/wpilib/ahal/DigitalSource.h"
10#include "frc971/wpilib/ahal/Encoder.h"
Austin Schuhf6b94632019-02-02 22:11:27 -080011#include "hal/HAL.h"
Brian Silvermand49fd782015-01-30 16:43:17 -050012
13// Interface to the roboRIO FPGA's DMA features.
Brian Silverman2aa83d72015-01-24 18:03:11 -050014
15// Like tEncoder::tOutput with the bitfields reversed.
16typedef union {
17 struct {
Parker Schuhd3b7a8872018-02-19 16:42:27 -080018 unsigned Direction : 1;
19 signed Value : 31;
Brian Silverman2aa83d72015-01-24 18:03:11 -050020 };
21 struct {
Parker Schuhd3b7a8872018-02-19 16:42:27 -080022 unsigned value : 32;
Brian Silverman2aa83d72015-01-24 18:03:11 -050023 };
24} t1Output;
25
Brian Silvermane48dbc12017-02-04 20:06:29 -080026static const int32_t kNumHeaders = 10;
Brian Silverman2aa83d72015-01-24 18:03:11 -050027
Austin Schuh91c75562015-12-20 22:23:10 -080028static constexpr ssize_t kChannelSize[20] = {2, 2, 4, 4, 2, 2, 4, 4, 3, 3,
29 2, 1, 4, 4, 4, 4, 4, 4, 4, 4};
Brian Silvermane48dbc12017-02-04 20:06:29 -080030
Brian Silverman2aa83d72015-01-24 18:03:11 -050031enum DMAOffsetConstants {
32 kEnable_AI0_Low = 0,
33 kEnable_AI0_High = 1,
34 kEnable_AIAveraged0_Low = 2,
35 kEnable_AIAveraged0_High = 3,
36 kEnable_AI1_Low = 4,
37 kEnable_AI1_High = 5,
38 kEnable_AIAveraged1_Low = 6,
39 kEnable_AIAveraged1_High = 7,
40 kEnable_Accumulator0 = 8,
41 kEnable_Accumulator1 = 9,
42 kEnable_DI = 10,
43 kEnable_AnalogTriggers = 11,
44 kEnable_Counters_Low = 12,
45 kEnable_Counters_High = 13,
46 kEnable_CounterTimers_Low = 14,
47 kEnable_CounterTimers_High = 15,
Austin Schuh91c75562015-12-20 22:23:10 -080048 kEnable_Encoders_Low = 16,
49 kEnable_Encoders_High = 17,
50 kEnable_EncoderTimers_Low = 18,
51 kEnable_EncoderTimers_High = 19,
Brian Silverman2aa83d72015-01-24 18:03:11 -050052};
53
54DMA::DMA() {
55 tRioStatusCode status = 0;
56 tdma_config_ = tDMA::create(&status);
Austin Schuh58d8cdf2015-02-15 21:04:42 -080057 tdma_config_->writeConfig_ExternalClock(false, &status);
Brian Silvermane48dbc12017-02-04 20:06:29 -080058 wpi_setErrorWithContext(status, HAL_GetErrorMessage(status));
Brian Silverman2aa83d72015-01-24 18:03:11 -050059 if (status != 0) {
60 return;
61 }
62 SetRate(1);
63 SetPause(false);
64}
65
66DMA::~DMA() {
67 tRioStatusCode status = 0;
68
69 manager_->stop(&status);
70 delete tdma_config_;
71}
72
73void DMA::SetPause(bool pause) {
74 tRioStatusCode status = 0;
75 tdma_config_->writeConfig_Pause(pause, &status);
Brian Silvermane48dbc12017-02-04 20:06:29 -080076 wpi_setErrorWithContext(status, HAL_GetErrorMessage(status));
Brian Silverman2aa83d72015-01-24 18:03:11 -050077}
78
79void DMA::SetRate(uint32_t cycles) {
80 if (cycles < 1) {
81 cycles = 1;
82 }
83 tRioStatusCode status = 0;
84 tdma_config_->writeRate(cycles, &status);
Brian Silvermane48dbc12017-02-04 20:06:29 -080085 wpi_setErrorWithContext(status, HAL_GetErrorMessage(status));
Brian Silverman2aa83d72015-01-24 18:03:11 -050086}
87
Parker Schuhd3b7a8872018-02-19 16:42:27 -080088void DMA::Add(frc::Encoder *encoder) {
Brian Silverman2aa83d72015-01-24 18:03:11 -050089 tRioStatusCode status = 0;
90
91 if (manager_) {
92 wpi_setErrorWithContext(NiFpga_Status_InvalidParameter,
Parker Schuhd3b7a8872018-02-19 16:42:27 -080093 "DMA::Add() only works before DMA::Start()");
Brian Silverman2aa83d72015-01-24 18:03:11 -050094 return;
95 }
Austin Schuh91c75562015-12-20 22:23:10 -080096 const int index = encoder->GetFPGAIndex();
97
Austin Schuh91c75562015-12-20 22:23:10 -080098 if (index < 4) {
99 // TODO(austin): Encoder uses a Counter for 1x or 2x; quad for 4x...
100 tdma_config_->writeConfig_Enable_Encoders_Low(true, &status);
101 } else if (index < 8) {
102 // TODO(austin): Encoder uses a Counter for 1x or 2x; quad for 4x...
103 tdma_config_->writeConfig_Enable_Encoders_High(true, &status);
104 } else {
105 wpi_setErrorWithContext(
106 NiFpga_Status_InvalidParameter,
107 "FPGA encoder index is not in the 4 that get logged.");
108 return;
109 }
Brian Silverman2aa83d72015-01-24 18:03:11 -0500110
Brian Silvermane48dbc12017-02-04 20:06:29 -0800111 wpi_setErrorWithContext(status, HAL_GetErrorMessage(status));
Brian Silverman2aa83d72015-01-24 18:03:11 -0500112}
113
Parker Schuhd3b7a8872018-02-19 16:42:27 -0800114void DMA::Add(frc::DigitalSource * /*input*/) {
Brian Silverman2aa83d72015-01-24 18:03:11 -0500115 tRioStatusCode status = 0;
116
117 if (manager_) {
118 wpi_setErrorWithContext(NiFpga_Status_InvalidParameter,
Parker Schuhd3b7a8872018-02-19 16:42:27 -0800119 "DMA::Add() only works before DMA::Start()");
Brian Silverman2aa83d72015-01-24 18:03:11 -0500120 return;
121 }
122
123 tdma_config_->writeConfig_Enable_DI(true, &status);
Brian Silvermane48dbc12017-02-04 20:06:29 -0800124 wpi_setErrorWithContext(status, HAL_GetErrorMessage(status));
Brian Silverman2aa83d72015-01-24 18:03:11 -0500125}
126
Parker Schuhd3b7a8872018-02-19 16:42:27 -0800127void DMA::Add(frc::AnalogInput *input) {
Brian Silvermand49fd782015-01-30 16:43:17 -0500128 tRioStatusCode status = 0;
129
130 if (manager_) {
131 wpi_setErrorWithContext(NiFpga_Status_InvalidParameter,
Parker Schuhd3b7a8872018-02-19 16:42:27 -0800132 "DMA::Add() only works before DMA::Start()");
Brian Silvermand49fd782015-01-30 16:43:17 -0500133 return;
134 }
135
Brian Silvermand49fd782015-01-30 16:43:17 -0500136 if (input->GetChannel() <= 3) {
137 tdma_config_->writeConfig_Enable_AI0_Low(true, &status);
138 } else {
139 tdma_config_->writeConfig_Enable_AI0_High(true, &status);
140 }
Brian Silvermane48dbc12017-02-04 20:06:29 -0800141 wpi_setErrorWithContext(status, HAL_GetErrorMessage(status));
Brian Silvermand49fd782015-01-30 16:43:17 -0500142}
143
Parker Schuhd3b7a8872018-02-19 16:42:27 -0800144void DMA::SetExternalTrigger(frc::DigitalSource *input, bool rising,
145 bool falling) {
Brian Silverman2aa83d72015-01-24 18:03:11 -0500146 tRioStatusCode status = 0;
147
148 if (manager_) {
Parker Schuhd3b7a8872018-02-19 16:42:27 -0800149 wpi_setErrorWithContext(
150 NiFpga_Status_InvalidParameter,
Brian Silverman2aa83d72015-01-24 18:03:11 -0500151 "DMA::SetExternalTrigger() only works before DMA::Start()");
152 return;
153 }
154
155 auto index =
156 ::std::find(trigger_channels_.begin(), trigger_channels_.end(), false);
157 if (index == trigger_channels_.end()) {
158 wpi_setErrorWithContext(NiFpga_Status_InvalidParameter,
Austin Schuh58d8cdf2015-02-15 21:04:42 -0800159 "DMA: No channels left");
Brian Silverman2aa83d72015-01-24 18:03:11 -0500160 return;
161 }
162 *index = true;
163
Austin Schuhb19fddb2015-11-22 22:25:29 -0800164 const int channel_index = ::std::distance(trigger_channels_.begin(), index);
Brian Silverman2aa83d72015-01-24 18:03:11 -0500165
Austin Schuh58d8cdf2015-02-15 21:04:42 -0800166 const bool is_external_clock =
167 tdma_config_->readConfig_ExternalClock(&status);
168 if (status == 0) {
169 if (!is_external_clock) {
170 tdma_config_->writeConfig_ExternalClock(true, &status);
Brian Silvermane48dbc12017-02-04 20:06:29 -0800171 wpi_setErrorWithContext(status, HAL_GetErrorMessage(status));
Austin Schuh58d8cdf2015-02-15 21:04:42 -0800172 if (status != 0) {
173 return;
174 }
175 }
176 } else {
Brian Silvermane48dbc12017-02-04 20:06:29 -0800177 wpi_setErrorWithContext(status, HAL_GetErrorMessage(status));
Brian Silverman2aa83d72015-01-24 18:03:11 -0500178 return;
179 }
180
Austin Schuh3b5b69b2015-10-31 18:55:47 -0700181 nFPGA::nRoboRIO_FPGANamespace::tDMA::tExternalTriggers new_trigger;
Austin Schuh58d8cdf2015-02-15 21:04:42 -0800182
183 new_trigger.FallingEdge = falling;
184 new_trigger.RisingEdge = rising;
Austin Schuh58d8cdf2015-02-15 21:04:42 -0800185 new_trigger.ExternalClockSource_AnalogTrigger = false;
Austin Schuh91c75562015-12-20 22:23:10 -0800186 unsigned char module = 0;
Austin Schuh94f51e92017-10-30 19:25:32 -0700187 uint32_t channel = input->GetChannel();
Austin Schuh91c75562015-12-20 22:23:10 -0800188 if (channel >= kNumHeaders) {
189 module = 1;
190 channel -= kNumHeaders;
191 } else {
192 module = 0;
193 }
194
195 new_trigger.ExternalClockSource_Module = module;
196 new_trigger.ExternalClockSource_Channel = channel;
Austin Schuh58d8cdf2015-02-15 21:04:42 -0800197
Parker Schuhd3b7a8872018-02-19 16:42:27 -0800198 // Configures the trigger to be external, not off the FPGA clock.
Austin Schuh91c75562015-12-20 22:23:10 -0800199 tdma_config_->writeExternalTriggers(channel_index / 4, channel_index % 4,
200 new_trigger, &status);
201 if (status != 0) {
Brian Silvermane48dbc12017-02-04 20:06:29 -0800202 wpi_setErrorWithContext(status, HAL_GetErrorMessage(status));
Austin Schuh91c75562015-12-20 22:23:10 -0800203 return;
204 }
Brian Silverman2aa83d72015-01-24 18:03:11 -0500205}
206
207DMA::ReadStatus DMA::Read(DMASample *sample, uint32_t timeout_ms,
Brian Silvermand49fd782015-01-30 16:43:17 -0500208 size_t *remaining_out) {
Brian Silverman2aa83d72015-01-24 18:03:11 -0500209 tRioStatusCode status = 0;
210 size_t remainingBytes = 0;
Brian Silvermand49fd782015-01-30 16:43:17 -0500211 *remaining_out = 0;
Brian Silverman2aa83d72015-01-24 18:03:11 -0500212
213 if (!manager_.get()) {
214 wpi_setErrorWithContext(NiFpga_Status_InvalidParameter,
Parker Schuhd3b7a8872018-02-19 16:42:27 -0800215 "DMA::Read() only works after DMA::Start()");
Brian Silverman2aa83d72015-01-24 18:03:11 -0500216 return STATUS_ERROR;
217 }
218
Brian Silvermand49fd782015-01-30 16:43:17 -0500219 sample->dma_ = this;
Brian Silverman2aa83d72015-01-24 18:03:11 -0500220 manager_->read(sample->read_buffer_, capture_size_, timeout_ms,
221 &remainingBytes, &status);
Austin Schuh94f51e92017-10-30 19:25:32 -0700222 sample->CalculateTimestamp();
Brian Silverman2aa83d72015-01-24 18:03:11 -0500223
Brian Silverman2aa83d72015-01-24 18:03:11 -0500224 // TODO(jerry): Do this only if status == 0?
Brian Silvermand49fd782015-01-30 16:43:17 -0500225 *remaining_out = remainingBytes / capture_size_;
Brian Silverman2aa83d72015-01-24 18:03:11 -0500226
Brian Silverman2aa83d72015-01-24 18:03:11 -0500227 // TODO(austin): Check that *remainingBytes % capture_size_ == 0 and deal
228 // with it if it isn't. Probably meant that we overflowed?
229 if (status == 0) {
230 return STATUS_OK;
231 } else if (status == NiFpga_Status_FifoTimeout) {
232 return STATUS_TIMEOUT;
233 } else {
Brian Silvermane48dbc12017-02-04 20:06:29 -0800234 wpi_setErrorWithContext(status, HAL_GetErrorMessage(status));
Brian Silverman2aa83d72015-01-24 18:03:11 -0500235 return STATUS_ERROR;
236 }
237}
238
Brian Silvermand49fd782015-01-30 16:43:17 -0500239const char *DMA::NameOfReadStatus(ReadStatus s) {
240 switch (s) {
Parker Schuhd3b7a8872018-02-19 16:42:27 -0800241 case STATUS_OK:
242 return "OK";
243 case STATUS_TIMEOUT:
244 return "TIMEOUT";
245 case STATUS_ERROR:
246 return "ERROR";
247 default:
248 return "(bad ReadStatus code)";
Brian Silvermand49fd782015-01-30 16:43:17 -0500249 }
250}
251
Brian Silverman2aa83d72015-01-24 18:03:11 -0500252void DMA::Start(size_t queue_depth) {
253 tRioStatusCode status = 0;
254 tconfig_ = tdma_config_->readConfig(&status);
Brian Silvermane48dbc12017-02-04 20:06:29 -0800255 wpi_setErrorWithContext(status, HAL_GetErrorMessage(status));
Brian Silverman2aa83d72015-01-24 18:03:11 -0500256 if (status != 0) {
257 return;
258 }
259
260 {
261 size_t accum_size = 0;
262#define SET_SIZE(bit) \
263 if (tconfig_.bit) { \
264 channel_offsets_[k##bit] = accum_size; \
265 accum_size += kChannelSize[k##bit]; \
266 } else { \
267 channel_offsets_[k##bit] = -1; \
268 }
269
270 SET_SIZE(Enable_AI0_Low);
271 SET_SIZE(Enable_AI0_High);
272 SET_SIZE(Enable_AIAveraged0_Low);
273 SET_SIZE(Enable_AIAveraged0_High);
274 SET_SIZE(Enable_AI1_Low);
275 SET_SIZE(Enable_AI1_High);
276 SET_SIZE(Enable_AIAveraged1_Low);
277 SET_SIZE(Enable_AIAveraged1_High);
278 SET_SIZE(Enable_Accumulator0);
279 SET_SIZE(Enable_Accumulator1);
280 SET_SIZE(Enable_DI);
281 SET_SIZE(Enable_AnalogTriggers);
282 SET_SIZE(Enable_Counters_Low);
283 SET_SIZE(Enable_Counters_High);
284 SET_SIZE(Enable_CounterTimers_Low);
285 SET_SIZE(Enable_CounterTimers_High);
Austin Schuh91c75562015-12-20 22:23:10 -0800286 SET_SIZE(Enable_Encoders_Low);
287 SET_SIZE(Enable_Encoders_High);
288 SET_SIZE(Enable_EncoderTimers_Low);
289 SET_SIZE(Enable_EncoderTimers_High);
Brian Silverman2aa83d72015-01-24 18:03:11 -0500290#undef SET_SIZE
291 capture_size_ = accum_size + 1;
292 }
293
Austin Schuh58d8cdf2015-02-15 21:04:42 -0800294 manager_.reset(
Austin Schuh94f51e92017-10-30 19:25:32 -0700295 new nFPGA::tDMAManager(1, queue_depth * capture_size_, &status));
Austin Schuh58d8cdf2015-02-15 21:04:42 -0800296
Brian Silvermane48dbc12017-02-04 20:06:29 -0800297 wpi_setErrorWithContext(status, HAL_GetErrorMessage(status));
Brian Silverman2aa83d72015-01-24 18:03:11 -0500298 if (status != 0) {
299 return;
300 }
301 // Start, stop, start to clear the buffer.
302 manager_->start(&status);
Brian Silvermane48dbc12017-02-04 20:06:29 -0800303 wpi_setErrorWithContext(status, HAL_GetErrorMessage(status));
Brian Silverman2aa83d72015-01-24 18:03:11 -0500304 if (status != 0) {
305 return;
306 }
307 manager_->stop(&status);
Brian Silvermane48dbc12017-02-04 20:06:29 -0800308 wpi_setErrorWithContext(status, HAL_GetErrorMessage(status));
Brian Silverman2aa83d72015-01-24 18:03:11 -0500309 if (status != 0) {
310 return;
311 }
312 manager_->start(&status);
Brian Silvermane48dbc12017-02-04 20:06:29 -0800313 wpi_setErrorWithContext(status, HAL_GetErrorMessage(status));
Brian Silverman2aa83d72015-01-24 18:03:11 -0500314 if (status != 0) {
315 return;
316 }
317}
318
Brian Silvermand49fd782015-01-30 16:43:17 -0500319static_assert(::std::is_pod<DMASample>::value, "DMASample needs to be POD");
320
Austin Schuh94f51e92017-10-30 19:25:32 -0700321ssize_t DMASample::offset(int index) const {
322 return dma_->channel_offsets_[index];
323}
Brian Silverman2aa83d72015-01-24 18:03:11 -0500324
Austin Schuh94f51e92017-10-30 19:25:32 -0700325void DMASample::CalculateTimestamp() {
326 uint32_t lower_sample = read_buffer_[dma_->capture_size_ - 1];
327#if WPILIB2018
328 int32_t status = 0;
329 fpga_timestamp_ = HAL_ExpandFPGATime(lower_sample, &status);
330 assert(status == 0);
331#else
332 fpga_timestamp_ = lower_sample;
333#endif
334}
335
336uint64_t DMASample::GetTime() const {
337 return fpga_timestamp_;
Austin Schuh8f314a92015-11-22 21:35:40 -0800338}
339
Brian Silverman2aa83d72015-01-24 18:03:11 -0500340double DMASample::GetTimestamp() const {
Austin Schuh8f314a92015-11-22 21:35:40 -0800341 return static_cast<double>(GetTime()) * 0.000001;
Brian Silverman2aa83d72015-01-24 18:03:11 -0500342}
343
Parker Schuhd3b7a8872018-02-19 16:42:27 -0800344bool DMASample::Get(frc::DigitalSource *input) const {
Brian Silverman2aa83d72015-01-24 18:03:11 -0500345 if (offset(kEnable_DI) == -1) {
Austin Schuh91c75562015-12-20 22:23:10 -0800346 wpi_setStaticErrorWithContext(
347 dma_, NiFpga_Status_ResourceNotFound,
Brian Silvermane48dbc12017-02-04 20:06:29 -0800348 HAL_GetErrorMessage(NiFpga_Status_ResourceNotFound));
Brian Silverman2aa83d72015-01-24 18:03:11 -0500349 return false;
350 }
Austin Schuh94f51e92017-10-30 19:25:32 -0700351 const uint32_t channel = input->GetChannel();
Brian Silvermane48dbc12017-02-04 20:06:29 -0800352 if (channel < kNumHeaders) {
353 return (read_buffer_[offset(kEnable_DI)] >> channel) & 0x1;
Brian Silverman2aa83d72015-01-24 18:03:11 -0500354 } else {
Brian Silvermane48dbc12017-02-04 20:06:29 -0800355 return (read_buffer_[offset(kEnable_DI)] >> (channel + 6)) & 0x1;
Brian Silverman2aa83d72015-01-24 18:03:11 -0500356 }
357}
358
Parker Schuhd3b7a8872018-02-19 16:42:27 -0800359int32_t DMASample::GetRaw(frc::Encoder *input) const {
Austin Schuh91c75562015-12-20 22:23:10 -0800360 int index = input->GetFPGAIndex();
361 uint32_t dmaWord = 0;
Austin Schuh91c75562015-12-20 22:23:10 -0800362 if (index < 4) {
363 if (offset(kEnable_Encoders_Low) == -1) {
364 wpi_setStaticErrorWithContext(
365 dma_, NiFpga_Status_ResourceNotFound,
Brian Silvermane48dbc12017-02-04 20:06:29 -0800366 HAL_GetErrorMessage(NiFpga_Status_ResourceNotFound));
Austin Schuh91c75562015-12-20 22:23:10 -0800367 return -1;
368 }
369 dmaWord = read_buffer_[offset(kEnable_Encoders_Low) + index];
370 } else if (index < 8) {
371 if (offset(kEnable_Encoders_High) == -1) {
372 wpi_setStaticErrorWithContext(
373 dma_, NiFpga_Status_ResourceNotFound,
Brian Silvermane48dbc12017-02-04 20:06:29 -0800374 HAL_GetErrorMessage(NiFpga_Status_ResourceNotFound));
Austin Schuh91c75562015-12-20 22:23:10 -0800375 return -1;
376 }
377 dmaWord = read_buffer_[offset(kEnable_Encoders_High) + (index - 4)];
378 } else {
379 wpi_setStaticErrorWithContext(
380 dma_, NiFpga_Status_ResourceNotFound,
Brian Silvermane48dbc12017-02-04 20:06:29 -0800381 HAL_GetErrorMessage(NiFpga_Status_ResourceNotFound));
Austin Schuh91c75562015-12-20 22:23:10 -0800382 return 0;
Austin Schuh58d8cdf2015-02-15 21:04:42 -0800383 }
384
Brian Silverman2aa83d72015-01-24 18:03:11 -0500385 int32_t result = 0;
386
Austin Schuhb19fddb2015-11-22 22:25:29 -0800387 // Extract the 31-bit signed tEncoder::tOutput Value using a struct with the
388 // reverse packed field order of tOutput. This gets Value from the high
389 // order 31 bits of output on little-endian ARM using gcc. This works
390 // even though C/C++ doesn't guarantee bitfield order.
391 t1Output output;
Brian Silverman2aa83d72015-01-24 18:03:11 -0500392
Austin Schuhb19fddb2015-11-22 22:25:29 -0800393 output.value = dmaWord;
394 result = output.Value;
Brian Silverman2aa83d72015-01-24 18:03:11 -0500395
396 return result;
397}
398
Parker Schuhd3b7a8872018-02-19 16:42:27 -0800399int32_t DMASample::Get(frc::Encoder *input) const {
Brian Silverman2aa83d72015-01-24 18:03:11 -0500400 int32_t raw = GetRaw(input);
401
Brian Silvermand49fd782015-01-30 16:43:17 -0500402 return raw / input->GetEncodingScale();
403}
404
Parker Schuhd3b7a8872018-02-19 16:42:27 -0800405uint16_t DMASample::GetValue(frc::AnalogInput *input) const {
Austin Schuh91c75562015-12-20 22:23:10 -0800406 uint32_t channel = input->GetChannel();
407 uint32_t dmaWord;
408 if (channel < 4) {
409 if (offset(kEnable_AI0_Low) == -1) {
410 wpi_setStaticErrorWithContext(
411 dma_, NiFpga_Status_ResourceNotFound,
Brian Silvermane48dbc12017-02-04 20:06:29 -0800412 HAL_GetErrorMessage(NiFpga_Status_ResourceNotFound));
Austin Schuh91c75562015-12-20 22:23:10 -0800413 return 0xffff;
414 }
415 dmaWord = read_buffer_[offset(kEnable_AI0_Low) + channel / 2];
416 } else if (channel < 8) {
417 if (offset(kEnable_AI0_High) == -1) {
418 wpi_setStaticErrorWithContext(
419 dma_, NiFpga_Status_ResourceNotFound,
Brian Silvermane48dbc12017-02-04 20:06:29 -0800420 HAL_GetErrorMessage(NiFpga_Status_ResourceNotFound));
Austin Schuh91c75562015-12-20 22:23:10 -0800421 return 0xffff;
422 }
423 dmaWord = read_buffer_[offset(kEnable_AI0_High) + (channel - 4) / 2];
424 } else {
425 wpi_setStaticErrorWithContext(
426 dma_, NiFpga_Status_ResourceNotFound,
Brian Silvermane48dbc12017-02-04 20:06:29 -0800427 HAL_GetErrorMessage(NiFpga_Status_ResourceNotFound));
Austin Schuh58d8cdf2015-02-15 21:04:42 -0800428 return 0xffff;
Brian Silvermand49fd782015-01-30 16:43:17 -0500429 }
Austin Schuhc6cc4102015-02-15 23:19:53 -0800430 if (channel % 2) {
Austin Schuh58d8cdf2015-02-15 21:04:42 -0800431 return (dmaWord >> 16) & 0xffff;
432 } else {
Austin Schuh91c75562015-12-20 22:23:10 -0800433 return dmaWord & 0xffff;
Austin Schuh58d8cdf2015-02-15 21:04:42 -0800434 }
Brian Silvermand49fd782015-01-30 16:43:17 -0500435 return static_cast<int16_t>(dmaWord);
436}
437
Parker Schuhd3b7a8872018-02-19 16:42:27 -0800438float DMASample::GetVoltage(frc::AnalogInput *input) const {
Austin Schuh58d8cdf2015-02-15 21:04:42 -0800439 uint16_t value = GetValue(input);
440 if (value == 0xffff) return 0.0;
Brian Silvermand49fd782015-01-30 16:43:17 -0500441 uint32_t lsb_weight = input->GetLSBWeight();
442 int32_t offset = input->GetOffset();
443 float voltage = lsb_weight * 1.0e-9 * value - offset * 1.0e-9;
444 return voltage;
Brian Silverman2aa83d72015-01-24 18:03:11 -0500445}