brians | 0ab60bb | 2013-01-31 02:21:51 +0000 | [diff] [blame] | 1 | // **************************************************************************** |
| 2 | // CopyLeft qwerk Robotics unINC. 2010 All Rights Reserved. |
| 3 | // **************************************************************************** |
| 4 | |
| 5 | // **************************************************************************** |
| 6 | // **************** IO Pin Setup |
| 7 | // **************************************************************************** |
| 8 | |
| 9 | #include "FreeRTOS.h" |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 10 | /* Scheduler includes. */ |
| 11 | #include "FreeRTOS.h" |
| 12 | #include "queue.h" |
| 13 | #include "task.h" |
| 14 | |
| 15 | #include "analog.h" |
brians | 0ab60bb | 2013-01-31 02:21:51 +0000 | [diff] [blame] | 16 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 17 | void analog_init(void) { |
| 18 | // b[1:0] CAN RD1 p0.0 |
| 19 | // b[3:2] CAN TD1 p0.1 |
| 20 | //PINCON->PINSEL0 = 0x00000005; |
brians | 0ab60bb | 2013-01-31 02:21:51 +0000 | [diff] [blame] | 21 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 22 | // b[29:28] USB_DMIN p0.30 |
| 23 | // b[27:26] USB_DPLUS p0.29 |
| 24 | // b[21:20] AD0.3 p0.26 |
| 25 | // b[19:18] AD0.2 p0.25 |
| 26 | // PINCON->PINSEL1 = 0x14140000; |
brians | 0ab60bb | 2013-01-31 02:21:51 +0000 | [diff] [blame] | 27 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 28 | // PINCON->PINSEL2 = 0x0; |
brians | 0ab60bb | 2013-01-31 02:21:51 +0000 | [diff] [blame] | 29 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 30 | // b[31:30] AD0.5 p1.31 |
| 31 | // b[29:28] V_BUS p1.30 |
| 32 | // b[21:20] MCOB1 p1.26 |
| 33 | // b[19:18] MCOA1 p1.25 |
| 34 | // b[15:14] MCI1 p1.23 |
| 35 | // b[13:12] MCOB0 p1.22 |
| 36 | // b[09:08] MCI0 p1.20 |
| 37 | // b[07:06] MCOA0 p1.19 |
| 38 | // b[05:04] USB_UP_LED p1.18 |
| 39 | //PINCON->PINSEL3 = 0xE0145150; |
| 40 | SC->PCONP |= PCONP_PCAD; |
brians | 0ab60bb | 2013-01-31 02:21:51 +0000 | [diff] [blame] | 41 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 42 | // Enable AD0.0, AD0.1, AD0.2, AD0.3 |
| 43 | PINCON->PINSEL1 &= 0xFFC03FFF; |
| 44 | PINCON->PINSEL1 |= 0x00D54000; |
| 45 | ADC->ADCR = 0x00200500; |
brians | 0ab60bb | 2013-01-31 02:21:51 +0000 | [diff] [blame] | 46 | } |
| 47 | |
| 48 | // **************************************************************************** |
| 49 | // **************** ADC Functions |
| 50 | // **************************************************************************** |
| 51 | |
| 52 | |
| 53 | // **************** macros |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 54 | // starts conversion [26:24] = 001 |
brians | 0ab60bb | 2013-01-31 02:21:51 +0000 | [diff] [blame] | 55 | |
| 56 | // **************** functions |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 57 | int analog(int channel) { |
| 58 | ADC->ADCR = ((ADC->ADCR & 0xF8FFFF00) | (0x01000000 | (1 << channel))); |
brians | 0ab60bb | 2013-01-31 02:21:51 +0000 | [diff] [blame] | 59 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 60 | // Poll until it is done. |
| 61 | while(!(ADC->ADGDR & 0x80000000)); |
brians | 0ab60bb | 2013-01-31 02:21:51 +0000 | [diff] [blame] | 62 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 63 | return ((ADC->ADGDR & 0x0000FFF0) >> 4); |
brians | 0ab60bb | 2013-01-31 02:21:51 +0000 | [diff] [blame] | 64 | } |
| 65 | // GPIO1 P0.4 |
| 66 | // GPIO2 P0.5 |
| 67 | // GPIO3 P0.6 |
| 68 | // GPIO4 P0.7 |
| 69 | // GPIO5 P0.8 |
| 70 | // GPIO6 P0.9 |
| 71 | // GPIO7 P2.0 |
| 72 | // GPIO8 P2.1 |
| 73 | // GPIO9 P2.2 |
| 74 | // GPIO10 P2.3 |
| 75 | // GPIO11 P2.4 |
| 76 | // GPIO12 P2.5 |
| 77 | |
| 78 | // DIP0 P1.29 |
| 79 | // DIP1 P2.13 |
| 80 | // DIP2 P0.11 |
| 81 | // DIP3 P0.10 |
| 82 | #define readGPIO(gpio,chan) ((((gpio)->FIOPIN) >> (chan)) & 1) |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 83 | inline int readGPIO_inline(int major, int minor) { |
| 84 | switch (major) { |
| 85 | case 0: |
| 86 | return readGPIO(GPIO0, minor); |
| 87 | case 1: |
| 88 | return readGPIO(GPIO1, minor); |
| 89 | case 2: |
| 90 | return readGPIO(GPIO2, minor); |
| 91 | default: |
| 92 | return -1; |
| 93 | } |
brians | 0ab60bb | 2013-01-31 02:21:51 +0000 | [diff] [blame] | 94 | } |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 95 | int digital(int channel) { |
| 96 | if (channel < 1) { |
| 97 | return -1; |
| 98 | } else if (channel < 7) { |
| 99 | int chan = channel + 3; |
| 100 | return readGPIO(GPIO0,chan); |
| 101 | } else if (channel < 13) { |
| 102 | int chan = channel - 7; |
| 103 | return readGPIO(GPIO2,chan); |
| 104 | } |
| 105 | return -1; |
brians | 0ab60bb | 2013-01-31 02:21:51 +0000 | [diff] [blame] | 106 | } |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 107 | int dip(int channel) { |
| 108 | switch (channel) { |
| 109 | case 0: |
| 110 | return readGPIO(GPIO1, 29); |
| 111 | case 1: |
| 112 | return readGPIO(GPIO2, 13); |
| 113 | case 2: |
| 114 | return readGPIO(GPIO0, 11); |
| 115 | case 3: |
| 116 | return readGPIO(GPIO0, 10); |
| 117 | default: |
| 118 | return -1; |
brians | 0ab60bb | 2013-01-31 02:21:51 +0000 | [diff] [blame] | 119 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 120 | } |
brians | 0ab60bb | 2013-01-31 02:21:51 +0000 | [diff] [blame] | 121 | } |
| 122 | //ENC0A 1.20 |
| 123 | //ENC0B 1.23 |
| 124 | //ENC1A 2.11 |
| 125 | //ENC1B 2.12 |
| 126 | //ENC2A 0.21 |
| 127 | //ENC2B 0.22 |
| 128 | //ENC3A 0.19 |
| 129 | //ENC3B 0.20 |
| 130 | |
| 131 | #define ENC(gpio,a,b) readGPIO(gpio,a) * 2 + readGPIO(gpio,b) |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 132 | int encoder_bits(int channel) { |
| 133 | switch (channel) { |
| 134 | case 0: |
| 135 | return ENC(GPIO1, 20, 23); |
| 136 | case 1: |
| 137 | return ENC(GPIO2, 11, 12); |
| 138 | case 2: |
| 139 | return ENC(GPIO0, 21, 22); |
| 140 | case 3: |
| 141 | return ENC(GPIO0, 19, 20); |
| 142 | default: |
| 143 | return -1; |
| 144 | } |
| 145 | return -1; |
brians | 0ab60bb | 2013-01-31 02:21:51 +0000 | [diff] [blame] | 146 | } |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 147 | #undef ENC |
brians | 0ab60bb | 2013-01-31 02:21:51 +0000 | [diff] [blame] | 148 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 149 | // Uses 2 EINT1 and EINT2 on 2.11 and 2.12. |
brians | 0ab60bb | 2013-01-31 02:21:51 +0000 | [diff] [blame] | 150 | volatile int32_t encoder1_val; |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 151 | // On GPIO pins 0.22 and 0.21. |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 152 | volatile int32_t encoder2_val; |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 153 | // On GPIO pins 0.20 and 0.19. |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 154 | volatile int32_t encoder3_val; |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 155 | // On GPIO pins 2.0 and 2.1. |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 156 | volatile int32_t encoder4_val; |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 157 | // On GPIO pins 2.2 and 2.3. |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 158 | volatile int32_t encoder5_val; |
| 159 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 160 | // ENC1A 2.11 |
| 161 | void EINT1_IRQHandler(void) { |
| 162 | SC->EXTINT = 0x2; |
| 163 | int stored_val = encoder1_val; |
| 164 | int fiopin = GPIO2->FIOPIN; |
| 165 | if (((fiopin >> 1) ^ fiopin) & 0x800) { |
| 166 | ++stored_val; |
| 167 | } else { |
| 168 | --stored_val; |
| 169 | } |
| 170 | encoder1_val = stored_val; |
| 171 | SC->EXTPOLAR ^= 0x2; |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 172 | } |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 173 | // ENC1B 2.12 |
| 174 | void EINT2_IRQHandler(void) { |
| 175 | SC->EXTINT = 0x4; |
| 176 | int stored_val = encoder1_val; |
| 177 | int fiopin = GPIO2->FIOPIN; |
| 178 | if (((fiopin >> 1) ^ fiopin) & 0x800) { |
| 179 | --stored_val; |
| 180 | } else { |
| 181 | ++stored_val; |
| 182 | } |
| 183 | encoder1_val = stored_val; |
| 184 | SC->EXTPOLAR ^= 0x4; |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 185 | } |
| 186 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 187 | // GPIO Interrupt handlers |
| 188 | void NoGPIO() {} |
| 189 | void Encoder2ARise() { |
| 190 | GPIOINT->IO0IntClr |= (1 << 22); |
| 191 | if (GPIO0->FIOPIN & (1 << 21)) { |
| 192 | ++encoder2_val; |
| 193 | } else { |
| 194 | --encoder2_val; |
| 195 | } |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 196 | } |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 197 | void Encoder2AFall() { |
| 198 | GPIOINT->IO0IntClr |= (1 << 22); |
| 199 | if (GPIO0->FIOPIN & (1 << 21)) { |
| 200 | --encoder2_val; |
| 201 | } else { |
| 202 | ++encoder2_val; |
| 203 | } |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 204 | } |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 205 | void Encoder2BRise() { |
| 206 | GPIOINT->IO0IntClr |= (1 << 21); |
| 207 | if (GPIO0->FIOPIN & (1 << 22)) { |
| 208 | --encoder2_val; |
| 209 | } else { |
| 210 | ++encoder2_val; |
| 211 | } |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 212 | } |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 213 | void Encoder2BFall() { |
| 214 | GPIOINT->IO0IntClr |= (1 << 21); |
| 215 | if (GPIO0->FIOPIN & (1 << 22)) { |
| 216 | ++encoder2_val; |
| 217 | } else { |
| 218 | --encoder2_val; |
| 219 | } |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 220 | } |
| 221 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 222 | void Encoder3ARise() { |
| 223 | GPIOINT->IO0IntClr |= (1 << 20); |
| 224 | if (GPIO0->FIOPIN & (1 << 19)) { |
| 225 | ++encoder3_val; |
| 226 | } else { |
| 227 | --encoder3_val; |
| 228 | } |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 229 | } |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 230 | void Encoder3AFall() { |
| 231 | GPIOINT->IO0IntClr |= (1 << 20); |
| 232 | if (GPIO0->FIOPIN & (1 << 19)) { |
| 233 | --encoder3_val; |
| 234 | } else { |
| 235 | ++encoder3_val; |
| 236 | } |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 237 | } |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 238 | void Encoder3BRise() { |
| 239 | GPIOINT->IO0IntClr |= (1 << 19); |
| 240 | if (GPIO0->FIOPIN & (1 << 20)) { |
| 241 | --encoder3_val; |
| 242 | } else { |
| 243 | ++encoder3_val; |
| 244 | } |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 245 | } |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 246 | void Encoder3BFall() { |
| 247 | GPIOINT->IO0IntClr |= (1 << 19); |
| 248 | if (GPIO0->FIOPIN & (1 << 20)) { |
| 249 | ++encoder3_val; |
| 250 | } else { |
| 251 | --encoder3_val; |
| 252 | } |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 253 | } |
| 254 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 255 | void Encoder4ARise() { |
| 256 | GPIOINT->IO2IntClr |= (1 << 0); |
| 257 | if (GPIO2->FIOPIN & (1 << 1)) { |
| 258 | ++encoder4_val; |
| 259 | } else { |
| 260 | --encoder4_val; |
| 261 | } |
| 262 | } |
| 263 | void Encoder4AFall() { |
| 264 | GPIOINT->IO2IntClr |= (1 << 0); |
| 265 | if (GPIO2->FIOPIN & (1 << 1)) { |
| 266 | --encoder4_val; |
| 267 | } else { |
| 268 | ++encoder4_val; |
| 269 | } |
| 270 | } |
| 271 | void Encoder4BRise() { |
| 272 | GPIOINT->IO2IntClr |= (1 << 1); |
| 273 | if (GPIO2->FIOPIN & (1 << 0)) { |
| 274 | --encoder4_val; |
| 275 | } else { |
| 276 | ++encoder4_val; |
| 277 | } |
| 278 | } |
| 279 | void Encoder4BFall() { |
| 280 | GPIOINT->IO2IntClr |= (1 << 1); |
| 281 | if (GPIO2->FIOPIN & (1 << 0)) { |
| 282 | ++encoder4_val; |
| 283 | } else { |
| 284 | --encoder4_val; |
| 285 | } |
| 286 | } |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 287 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 288 | void Encoder5ARise() { |
| 289 | GPIOINT->IO2IntClr |= (1 << 2); |
| 290 | if (GPIO2->FIOPIN & (1 << 3)) { |
| 291 | ++encoder5_val; |
| 292 | } else { |
| 293 | --encoder5_val; |
| 294 | } |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 295 | } |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 296 | void Encoder5AFall() { |
| 297 | GPIOINT->IO2IntClr |= (1 << 2); |
| 298 | if (GPIO2->FIOPIN & (1 << 3)) { |
| 299 | --encoder5_val; |
| 300 | } else { |
| 301 | ++encoder5_val; |
| 302 | } |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 303 | } |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 304 | void Encoder5BRise() { |
| 305 | GPIOINT->IO2IntClr |= (1 << 3); |
| 306 | if (GPIO2->FIOPIN & (1 << 2)) { |
| 307 | --encoder5_val; |
| 308 | } else { |
| 309 | ++encoder5_val; |
| 310 | } |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 311 | } |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 312 | void Encoder5BFall() { |
| 313 | GPIOINT->IO2IntClr |= (1 << 3); |
| 314 | if (GPIO2->FIOPIN & (1 << 2)) { |
| 315 | ++encoder5_val; |
| 316 | } else { |
| 317 | --encoder5_val; |
| 318 | } |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 319 | } |
| 320 | |
| 321 | volatile int32_t capture_top_rise; |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 322 | volatile int8_t top_rise_count; |
| 323 | void IndexerTopRise() { |
| 324 | GPIOINT->IO0IntClr |= (1 << 5); |
| 325 | // edge counting encoder capture |
| 326 | ++top_rise_count; |
| 327 | capture_top_rise = encoder3_val; |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 328 | } |
| 329 | volatile int32_t capture_top_fall; |
| 330 | volatile int8_t top_fall_count; |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 331 | void IndexerTopFall() { |
| 332 | GPIOINT->IO0IntClr |= (1 << 5); |
| 333 | // edge counting encoder capture |
| 334 | ++top_fall_count; |
| 335 | capture_top_fall = encoder3_val; |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 336 | } |
| 337 | volatile int8_t bottom_rise_count; |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 338 | void IndexerBottomRise() { |
| 339 | GPIOINT->IO0IntClr |= (1 << 4); |
| 340 | // edge counting |
| 341 | ++bottom_rise_count; |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 342 | } |
| 343 | volatile int32_t capture_bottom_fall_delay; |
| 344 | volatile int8_t bottom_fall_delay_count; |
| 345 | volatile int32_t dirty_delay; |
| 346 | portTickType xDelayTimeFrom; |
| 347 | static portTASK_FUNCTION(vDelayCapture, pvParameters) |
| 348 | { |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 349 | portTickType xSleepFrom; |
| 350 | xSleepFrom = xTaskGetTickCount(); |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 351 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 352 | for(;;) { |
| 353 | NVIC_DisableIRQ(EINT3_IRQn); |
| 354 | if (dirty_delay) { |
| 355 | xSleepFrom = xDelayTimeFrom; |
| 356 | dirty_delay = 0; |
| 357 | NVIC_EnableIRQ(EINT3_IRQn); |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 358 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 359 | vTaskDelayUntil(&xSleepFrom, 32 / portTICK_RATE_MS); |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 360 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 361 | NVIC_DisableIRQ(EINT3_IRQn); |
| 362 | bottom_fall_delay_count ++; |
| 363 | capture_bottom_fall_delay = encoder3_val; |
| 364 | NVIC_EnableIRQ(EINT3_IRQn); |
| 365 | } else { |
| 366 | NVIC_EnableIRQ(EINT3_IRQn); |
| 367 | vTaskDelayUntil(&xSleepFrom, 10 / portTICK_RATE_MS); |
| 368 | } |
| 369 | } |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 370 | } |
| 371 | |
| 372 | |
| 373 | volatile int8_t bottom_fall_count; |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 374 | void IndexerBottomFall() { |
| 375 | GPIOINT->IO0IntClr |= (1 << 4); |
| 376 | bottom_fall_count ++; |
| 377 | // edge counting start delayed capture |
| 378 | xDelayTimeFrom = xTaskGetTickCount(); |
| 379 | dirty_delay = 1; |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 380 | } |
| 381 | volatile int32_t capture_wrist_rise; |
| 382 | volatile int8_t wrist_rise_count; |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 383 | void WristHallRise() { |
| 384 | GPIOINT->IO0IntClr |= (1 << 6); |
| 385 | // edge counting encoder capture |
| 386 | wrist_rise_count ++; |
| 387 | capture_wrist_rise = (int32_t)QEI->QEIPOS; |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 388 | } |
| 389 | volatile int32_t capture_shooter_angle_rise; |
| 390 | volatile int8_t shooter_angle_rise_count; |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 391 | void ShooterHallRise() { |
| 392 | GPIOINT->IO0IntClr |= (1 << 7); |
| 393 | // edge counting encoder capture |
| 394 | shooter_angle_rise_count ++; |
| 395 | capture_shooter_angle_rise = encoder2_val; |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 396 | } |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 397 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 398 | // Count leading zeros. |
| 399 | // Returns 0 if bit 31 is set etc. |
| 400 | __attribute__((always_inline)) static __INLINE uint8_t __clz(uint32_t value) { |
| 401 | uint8_t result; |
| 402 | __ASM volatile ("clz %0, %1" : "=r" (result) : "r" (value)); |
| 403 | return result; |
| 404 | } |
| 405 | inline static void IRQ_Dispatch(void) { |
| 406 | uint8_t index = __clz(GPIOINT->IO2IntStatR | GPIOINT->IO0IntStatR | |
| 407 | (GPIOINT->IO2IntStatF << 28) | (GPIOINT->IO0IntStatF << 4)); |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 408 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 409 | typedef void (*Handler)(void); |
| 410 | const static Handler table[] = { |
| 411 | Encoder5BFall, // index 0: P2.3 Fall #bit 31 //Encoder 5 B //Dio 10 |
| 412 | Encoder5AFall, // index 1: P2.2 Fall #bit 30 //Encoder 5 A //Dio 9 |
| 413 | Encoder4BFall, // index 2: P2.1 Fall #bit 29 //Encoder 4 B //Dio 8 |
| 414 | Encoder4AFall, // index 3: P2.0 Fall #bit 28 //Encoder 4 A //Dio 7 |
| 415 | NoGPIO, // index 4: NO GPIO #bit 27 |
| 416 | Encoder2AFall, // index 5: P0.22 Fall #bit 26 //Encoder 2 A |
| 417 | Encoder2BFall, // index 6: P0.21 Fall #bit 25 //Encoder 2 B |
| 418 | Encoder3AFall, // index 7: P0.20 Fall #bit 24 //Encoder 3 A |
| 419 | Encoder3BFall, // index 8: P0.19 Fall #bit 23 //Encoder 3 B |
| 420 | Encoder2ARise, // index 9: P0.22 Rise #bit 22 //Encoder 2 A |
| 421 | Encoder2BRise, // index 10: P0.21 Rise #bit 21 //Encoder 2 B |
| 422 | Encoder3ARise, // index 11: P0.20 Rise #bit 20 //Encoder 3 A |
| 423 | Encoder3BRise, // index 12: P0.19 Rise #bit 19 //Encoder 3 B |
| 424 | NoGPIO, // index 13: NO GPIO #bit 18 |
| 425 | NoGPIO, // index 14: NO GPIO #bit 17 |
| 426 | NoGPIO, // index 15: NO GPIO #bit 16 |
| 427 | NoGPIO, // index 16: NO GPIO #bit 15 |
| 428 | NoGPIO, // index 17: NO GPIO #bit 14 |
| 429 | NoGPIO, // index 18: NO GPIO #bit 13 |
| 430 | NoGPIO, // index 19: NO GPIO #bit 12 |
| 431 | NoGPIO, // index 20: NO GPIO #bit 11 |
| 432 | NoGPIO, // index 21: NO GPIO #bit 10 |
| 433 | IndexerTopFall, // index 22: P0.5 Fall #bit 9 //Indexer Top //Dio 2 |
| 434 | IndexerBottomFall, // index 23: P0.4 Fall #bit 8 //Indexer Bottom //Dio 1 |
| 435 | ShooterHallRise, // index 24: P0.7 Rise #bit 7 //Shooter Hall //Dio 4 |
| 436 | WristHallRise, // index 25: P0.6 Rise #bit 6 //Wrist Hall //Dio 3 |
| 437 | IndexerTopRise, // index 26: P0.5 Rise #bit 5 //Indexer Top //Dio 2 |
| 438 | IndexerBottomRise, // index 27: P0.4 Rise #bit 4 //Indexer Bottom //Dio 1 |
| 439 | Encoder5BRise, // index 28: P2.3 Rise #bit 3 //Encoder 5 B //Dio 10 |
| 440 | Encoder5ARise, // index 29: P2.2 Rise #bit 2 //Encoder 5 A //Dio 9 |
| 441 | Encoder4BRise, // index 30: P2.1 Rise #bit 1 //Encoder 4 B //Dio 8 |
| 442 | Encoder4ARise, // index 31: P2.0 Rise #bit 0 //Encoder 4 A //Dio 7 |
| 443 | NoGPIO // index 32: NO BITS SET #False Alarm |
| 444 | }; |
| 445 | table[index](); |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 446 | |
| 447 | /* |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 448 | switch(index) { |
| 449 | case 0: //P2.3 Fall #bit 31 //Encoder 5 B //Dio 10 |
| 450 | Encoder5BFall(); |
| 451 | return; |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 452 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 453 | case 1: //P2.2 Fall #bit 30 //Encoder 5 A //Dio 9 |
| 454 | Encoder5AFall(); |
| 455 | return; |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 456 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 457 | case 2: //P2.1 Fall #bit 29 //Encoder 4 B //Dio 8 |
| 458 | Encoder4BFall(); |
| 459 | return; |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 460 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 461 | case 3: //P2.0 Fall #bit 28 //Encoder 4 A //Dio 7 |
| 462 | Encoder4AFall(); |
| 463 | return; |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 464 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 465 | case 4: //NO GPIO #bit 27 |
| 466 | NoGPIO(); |
| 467 | return; |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 468 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 469 | case 5: //P0.22 Fall #bit 26 //Encoder 2 A |
| 470 | Encoder2AFall(); |
| 471 | return; |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 472 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 473 | case 6: //P0.21 Fall #bit 25 //Encoder 2 B |
| 474 | Encoder2BFall(); |
| 475 | return; |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 476 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 477 | case 7: //P0.20 Fall #bit 24 //Encoder 3 A |
| 478 | Encoder3AFall(); |
| 479 | return; |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 480 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 481 | case 8: //P0.19 Fall #bit 23 //Encoder 3 B |
| 482 | Encoder3BFall(); |
| 483 | return; |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 484 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 485 | case 9: //P0.22 Rise #bit 22 //Encoder 2 A |
| 486 | Encoder2ARise(); |
| 487 | return; |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 488 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 489 | case 10: //P0.21 Rise #bit 21 //Encoder 2 B |
| 490 | Encoder2BRise(); |
| 491 | return; |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 492 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 493 | case 11: //P0.20 Rise #bit 20 //Encoder 3 A |
| 494 | Encoder3ARise(); |
| 495 | return; |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 496 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 497 | case 12: //P0.19 Rise #bit 19 //Encoder 3 B |
| 498 | Encoder3BRise(); |
| 499 | return; |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 500 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 501 | case 13: //NO GPIO #bit 18 |
| 502 | NoGPIO(); |
| 503 | return; |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 504 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 505 | case 14: //NO GPIO #bit 17 |
| 506 | NoGPIO(); |
| 507 | return; |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 508 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 509 | case 15: //NO GPIO #bit 16 |
| 510 | NoGPIO(); |
| 511 | return; |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 512 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 513 | case 16: //NO GPIO #bit 15 |
| 514 | NoGPIO(); |
| 515 | return; |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 516 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 517 | case 17: //NO GPIO #bit 14 |
| 518 | NoGPIO(); |
| 519 | return; |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 520 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 521 | case 18: //NO GPIO #bit 13 |
| 522 | NoGPIO(); |
| 523 | return; |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 524 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 525 | case 19: //NO GPIO #bit 12 |
| 526 | NoGPIO(); |
| 527 | return; |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 528 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 529 | case 20: //NO GPIO #bit 11 |
| 530 | NoGPIO(); |
| 531 | return; |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 532 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 533 | case 21: //NO GPIO #bit 10 |
| 534 | NoGPIO(); |
| 535 | return; |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 536 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 537 | case 22: //P0.3 Fall #bit 9 //Indexer Top //Dio 2 |
| 538 | IndexerTopFall(); |
| 539 | return; |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 540 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 541 | case 23: //P0.4 Fall #bit 8 //Indexer Bottom //Dio 1 |
| 542 | IndexerBottomFall(); |
| 543 | return; |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 544 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 545 | case 24: //P0.7 Rise #bit 7 //Shooter Hall //Dio 4 |
| 546 | ShooterHallRise(); |
| 547 | return; |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 548 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 549 | case 25: //P0.6 Rise #bit 6 //Wrist Hall //Dio 3 |
| 550 | WristHallRise(); |
| 551 | return; |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 552 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 553 | case 26: //P0.5 Rise #bit 5 //Indexer Top //Dio 2 |
| 554 | IndexerTopRise(); |
| 555 | return; |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 556 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 557 | case 27: //P0.4 Rise #bit 4 //Indexer Bottom //Dio 1 |
| 558 | IndexerBottomRise(); |
| 559 | return; |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 560 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 561 | case 28: //P2.3 Rise #bit 3 //Encoder 5 B //Dio 10 |
| 562 | Encoder5BRise(); |
| 563 | return; |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 564 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 565 | case 29: //P2.2 Rise #bit 2 //Encoder 5 A //Dio 9 |
| 566 | Encoder5ARise(); |
| 567 | return; |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 568 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 569 | case 30: //P2.1 Rise #bit 1 //Encoder 4 B //Dio 8 |
| 570 | Encoder4BRise(); |
| 571 | return; |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 572 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 573 | case 31: //P2.0 Rise #bit 0 //Encoder 4 A //Dio 7 |
| 574 | Encoder4ARise(); |
| 575 | return; |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 576 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 577 | case 32: //NO BITS SET #False Alarm |
| 578 | NoGPIO(); |
| 579 | return; |
| 580 | } |
| 581 | */ |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 582 | } |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 583 | void EINT3_IRQHandler(void) { |
| 584 | NVIC_DisableIRQ(EINT3_IRQn); |
| 585 | IRQ_Dispatch(); |
| 586 | NVIC_EnableIRQ(EINT3_IRQn); |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 587 | } |
| 588 | int32_t encoder_val(int chan) |
| 589 | { |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 590 | int32_t val; |
| 591 | switch(chan) { |
| 592 | case 0: //Wrist |
| 593 | return (int32_t)QEI->QEIPOS; |
| 594 | case 1: //Shooter Wheel |
| 595 | NVIC_DisableIRQ(EINT1_IRQn); |
| 596 | NVIC_DisableIRQ(EINT2_IRQn); |
| 597 | val = encoder1_val; |
| 598 | NVIC_EnableIRQ(EINT2_IRQn); |
| 599 | NVIC_EnableIRQ(EINT1_IRQn); |
| 600 | return val; |
| 601 | case 2: //Shooter Angle |
| 602 | NVIC_DisableIRQ(EINT3_IRQn); |
| 603 | val = encoder2_val; |
| 604 | NVIC_EnableIRQ(EINT3_IRQn); |
| 605 | return val; |
| 606 | case 3: //Indexer |
| 607 | NVIC_DisableIRQ(EINT3_IRQn); |
| 608 | val = encoder3_val; |
| 609 | NVIC_EnableIRQ(EINT3_IRQn); |
| 610 | return val; |
| 611 | case 4: //Drive R |
| 612 | NVIC_DisableIRQ(EINT3_IRQn); |
| 613 | val = encoder4_val; |
| 614 | NVIC_EnableIRQ(EINT3_IRQn); |
| 615 | return val; |
| 616 | case 5: //Drive L |
| 617 | NVIC_DisableIRQ(EINT3_IRQn); |
| 618 | val = encoder5_val; |
| 619 | NVIC_EnableIRQ(EINT3_IRQn); |
| 620 | return val; |
| 621 | default: |
| 622 | return -1; |
| 623 | } |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 624 | } |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 625 | void fillSensorPacket(struct DataStruct *packet) { |
| 626 | packet->gyro_angle = gyro_angle; |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 627 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 628 | NVIC_DisableIRQ(EINT1_IRQn); |
| 629 | NVIC_DisableIRQ(EINT2_IRQn); |
| 630 | packet->shooter = encoder1_val; |
| 631 | NVIC_EnableIRQ(EINT2_IRQn); |
| 632 | NVIC_EnableIRQ(EINT1_IRQn); |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 633 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 634 | NVIC_DisableIRQ(EINT3_IRQn); |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 635 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 636 | packet->right_drive = encoder4_val; |
| 637 | packet->left_drive = encoder5_val; |
| 638 | packet->shooter_angle = encoder2_val; |
| 639 | packet->indexer = encoder3_val; |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 640 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 641 | packet->capture_top_rise = capture_top_rise; |
| 642 | packet->top_rise_count = top_rise_count; |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 643 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 644 | packet->capture_top_fall = capture_top_fall; |
| 645 | packet->top_fall_count = top_fall_count; |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 646 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 647 | packet->bottom_rise_count = bottom_rise_count; |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 648 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 649 | packet->capture_bottom_fall_delay = capture_bottom_fall_delay; |
| 650 | packet->bottom_fall_delay_count = bottom_fall_delay_count; |
| 651 | packet->bottom_fall_count = bottom_fall_count; |
| 652 | |
| 653 | packet->capture_wrist_rise = capture_wrist_rise; |
| 654 | packet->wrist_rise_count = wrist_rise_count; |
| 655 | |
| 656 | packet->capture_shooter_angle_rise = capture_shooter_angle_rise; |
| 657 | packet->shooter_angle_rise_count = shooter_angle_rise_count; |
| 658 | |
| 659 | NVIC_EnableIRQ(EINT3_IRQn); |
| 660 | |
| 661 | packet->wrist = (int32_t)QEI->QEIPOS; |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 662 | } |
| 663 | |
brians | 0ab60bb | 2013-01-31 02:21:51 +0000 | [diff] [blame] | 664 | void encoder_init(void) |
| 665 | { |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 666 | // Setup the encoder interface. |
| 667 | SC->PCONP |= PCONP_PCQEI; |
| 668 | PINCON->PINSEL3 = ((PINCON->PINSEL3 & 0xffff3dff) | 0x00004100); |
| 669 | // Reset the count and velocity. |
| 670 | QEI->QEICON = 0x00000005; |
| 671 | QEI->QEICONF = 0x00000004; |
| 672 | // Wrap back to 0 when we wrap the int and vice versa. |
| 673 | QEI->QEIMAXPOS = 0xFFFFFFFF; |
brians | 0ab60bb | 2013-01-31 02:21:51 +0000 | [diff] [blame] | 674 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 675 | // Set up encoder 1. |
| 676 | // Make GPIOs 2.11 and 2.12 trigger EINT1 and EINT2 (respectively). |
| 677 | // PINSEL4[23:22] = {0 1} |
| 678 | // PINSEL4[25:24] = {0 1} |
| 679 | PINCON->PINSEL4 = (PINCON->PINSEL4 & ~(0x3 << 22)) | (0x1 << 22); |
| 680 | PINCON->PINSEL4 = (PINCON->PINSEL4 & ~(0x3 << 24)) | (0x1 << 24); |
| 681 | // Clear the interrupt flags for EINT1 and EINT2 (0x6 = 0b0110). |
| 682 | SC->EXTMODE = 0x6; |
| 683 | SC->EXTINT = 0x6; |
| 684 | NVIC_EnableIRQ(EINT1_IRQn); |
| 685 | NVIC_EnableIRQ(EINT2_IRQn); |
| 686 | encoder1_val = 0; |
brians | 0ab60bb | 2013-01-31 02:21:51 +0000 | [diff] [blame] | 687 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 688 | // Set up encoder 2. |
| 689 | GPIOINT->IO0IntEnF |= (1 << 22); // Set GPIO falling interrupt. |
| 690 | GPIOINT->IO0IntEnR |= (1 << 22); // Set GPIO rising interrupt. |
| 691 | GPIOINT->IO0IntEnF |= (1 << 21); // Set GPIO falling interrupt. |
| 692 | GPIOINT->IO0IntEnR |= (1 << 21); // Set GPIO rising interrupt. |
| 693 | PINCON->PINSEL1 &= ~(0x3 << 12); |
| 694 | PINCON->PINSEL1 &= ~(0x3 << 10); |
| 695 | encoder2_val = 0; |
brians | 0ab60bb | 2013-01-31 02:21:51 +0000 | [diff] [blame] | 696 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 697 | // Set up encoder 3. |
| 698 | GPIOINT->IO0IntEnF |= (1 << 20); // Set GPIO falling interrupt. |
| 699 | GPIOINT->IO0IntEnR |= (1 << 20); // Set GPIO rising interrupt. |
| 700 | GPIOINT->IO0IntEnF |= (1 << 19); // Set GPIO falling interrupt. |
| 701 | GPIOINT->IO0IntEnR |= (1 << 19); // Set GPIO rising interrupt. |
| 702 | PINCON->PINSEL1 &= ~(0x3 << 8); |
| 703 | PINCON->PINSEL1 &= ~(0x3 << 6); |
| 704 | encoder3_val = 0; |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 705 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 706 | // Set up encoder 4. |
| 707 | GPIOINT->IO2IntEnF |= (1 << 0); // Set GPIO falling interrupt. |
| 708 | GPIOINT->IO2IntEnR |= (1 << 0); // Set GPIO rising interrupt. |
| 709 | GPIOINT->IO2IntEnF |= (1 << 1); // Set GPIO falling interrupt. |
| 710 | GPIOINT->IO2IntEnR |= (1 << 1); // Set GPIO rising interrupt. |
| 711 | PINCON->PINSEL4 &= ~(0x3 << 0); |
| 712 | PINCON->PINSEL4 &= ~(0x3 << 2); |
| 713 | encoder4_val = 0; |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 714 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 715 | // Set up encoder 5. |
| 716 | GPIOINT->IO2IntEnF |= (1 << 2); // Set GPIO falling interrupt. |
| 717 | GPIOINT->IO2IntEnR |= (1 << 2); // Set GPIO rising interrupt. |
| 718 | GPIOINT->IO2IntEnF |= (1 << 3); // Set GPIO falling interrupt. |
| 719 | GPIOINT->IO2IntEnR |= (1 << 3); // Set GPIO rising interrupt. |
| 720 | PINCON->PINSEL4 &= ~(0x3 << 4); |
| 721 | PINCON->PINSEL4 &= ~(0x3 << 6); |
| 722 | encoder5_val = 0; |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 723 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 724 | // Enable interrupts from the GPIO pins. |
| 725 | NVIC_EnableIRQ(EINT3_IRQn); |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 726 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 727 | xTaskCreate(vDelayCapture, |
| 728 | (signed char *) "SENSORs", |
| 729 | configMINIMAL_STACK_SIZE + 100, |
| 730 | NULL /*parameters*/, |
| 731 | tskIDLE_PRIORITY + 5, |
| 732 | NULL /*return task handle*/); |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 733 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 734 | GPIOINT->IO0IntEnF |= (1 << 4); // Set GPIO falling interrupt |
| 735 | GPIOINT->IO0IntEnR |= (1 << 4); // Set GPIO rising interrupt |
| 736 | PINCON->PINSEL0 &= ~(0x3 << 8); |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 737 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 738 | GPIOINT->IO0IntEnF |= (1 << 5); // Set GPIO falling interrupt |
| 739 | GPIOINT->IO0IntEnR |= (1 << 5); // Set GPIO rising interrupt |
| 740 | PINCON->PINSEL0 &= ~(0x3 << 10); |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 741 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 742 | GPIOINT->IO0IntEnR |= (1 << 6); // Set GPIO rising interrupt |
| 743 | PINCON->PINSEL0 &= ~(0x3 << 12); |
Austin Schuh | 63d0e9b | 2013-03-27 04:43:14 +0000 | [diff] [blame] | 744 | |
Brian Silverman | 6ad00b8 | 2013-03-27 19:02:38 -0700 | [diff] [blame] | 745 | GPIOINT->IO0IntEnR |= (1 << 7); // Set GPIO rising interrupt |
| 746 | PINCON->PINSEL0 &= ~(0x3 << 14); |
brians | 0ab60bb | 2013-01-31 02:21:51 +0000 | [diff] [blame] | 747 | } |