blob: b46a8b4b9a8a6ce7cf080b62ba8d4a423f663357 [file] [log] [blame]
Brian Silverman8d3816a2017-07-03 18:52:15 -07001#include "motors/peripheral/can.h"
2
3#include <stddef.h>
4#include <string.h>
5
6#include "motors/core/kinetis.h"
7#include "motors/util.h"
8
9#include <stdio.h>
10#include <inttypes.h>
11
12// General note: this peripheral is really weird about accessing its memory. It
13// goes much farther than normal memory-mapped device semantics. In particular,
14// it "locks" various regions of memory under complicated conditions. Because of
15// this, all the code in here touching the device memory is fairly paranoid
16// about how it does that.
17
18// The number of message buffers we're actually going to use. The chip only has
19// 16. Using fewer means less for the CAN module (and CPU) to go through looking
20// for actual data.
21// 0 is for sending and 1 is for receiving commands.
Brian Silverman7c7170e2018-01-13 17:41:21 -080022#define NUMBER_MESSAGE_BUFFERS 4
Brian Silverman8d3816a2017-07-03 18:52:15 -070023
24#if NUMBER_MESSAGE_BUFFERS > 16
25#error Only have 16 message buffers on this part.
26#endif
27
28// TODO(Brian): Do something about CAN errors and warnings (enable interrupts?).
29
Brian Silverman54dd2fe2018-03-16 23:44:31 -070030static uint32_t prio_id_for_id(uint32_t can_id) {
31 if (can_id & CAN_EFF_FLAG) {
32 return can_id & ~CAN_EFF_FLAG;
33 } else {
34 return can_id << 18;
35 }
36}
Brian Silverman8d3816a2017-07-03 18:52:15 -070037
Brian Silverman54dd2fe2018-03-16 23:44:31 -070038void can_init(uint32_t id0, uint32_t id1) {
Brian Silverman8d3816a2017-07-03 18:52:15 -070039 SIM_SCGC6 |= SIM_SCGC6_FLEXCAN0;
40
41 // Put it into freeze mode and wait for it to actually do that.
42 // Don't OR these bits in because it starts in module-disable mode, which
43 // isn't what we want. It will ignore the attempt to change some of the bits
44 // because it's not in freeze mode, but whatever.
45 CAN0_MCR = CAN_MCR_FRZ | CAN_MCR_HALT;
46 while (!(CAN0_MCR & CAN_MCR_FRZACK)) {}
47
48 // Initializing this before touching the mailboxes because the reference
49 // manual slightly implies you have to, and the registers and RAM on this
50 // thing are weird (get locked sometimes) so it actually might matter.
51 CAN0_MCR =
52 CAN_MCR_FRZ | CAN_MCR_HALT /* Stay in freeze mode. */ |
53 CAN_MCR_SRXDIS /* Don't want to see our own frames at all. */ |
54 CAN_MCR_IRMQ /* Use individual masks for each filter. */ |
55 CAN_MCR_LPRIOEN /* Let us prioritize TX mailboxes. */ |
56 (0 << 8) /* No need to pack IDs tightly, so it's easier not to. */ |
57 (NUMBER_MESSAGE_BUFFERS - 1);
58
59 // Initialize all the buffers and RX filters we're enabling.
60
61 // Just in case this does anything...
Brian Silverman7c7170e2018-01-13 17:41:21 -080062 CAN0_RXIMRS[2] = 0;
63 CAN0_MESSAGES[2].prio_id = 0;
64 CAN0_MESSAGES[2].control_timestamp =
65 CAN_MB_CONTROL_INSERT_CODE(CAN_MB_CODE_TX_INACTIVE);
66
67 CAN0_RXIMRS[3] = 0;
68 CAN0_MESSAGES[3].prio_id = 0;
69 CAN0_MESSAGES[3].control_timestamp =
70 CAN_MB_CONTROL_INSERT_CODE(CAN_MB_CODE_TX_INACTIVE);
71
72 CAN0_RXIMRS[0] = (1 << 31) /* Want to filter out RTRs. */ |
73 (0 << 30) /* Want to only get standard frames. */ |
74 (0x1FFC0000) /* Filter on the id. */;
Brian Silverman54dd2fe2018-03-16 23:44:31 -070075 CAN0_MESSAGES[0].prio_id = prio_id_for_id(id0);
Brian Silverman8d3816a2017-07-03 18:52:15 -070076 CAN0_MESSAGES[0].control_timestamp =
Brian Silverman7c7170e2018-01-13 17:41:21 -080077 CAN_MB_CONTROL_INSERT_CODE(CAN_MB_CODE_RX_EMPTY);
Brian Silverman8d3816a2017-07-03 18:52:15 -070078
79 CAN0_RXIMRS[1] = (1 << 31) /* Want to filter out RTRs. */ |
Brian Silverman7c7170e2018-01-13 17:41:21 -080080 (0 << 30) /* Want to only get standard frames. */ |
81 (0x1FFC0000) /* Filter on the id. */;
Brian Silverman54dd2fe2018-03-16 23:44:31 -070082 CAN0_MESSAGES[1].prio_id = prio_id_for_id(id1);
Brian Silverman8d3816a2017-07-03 18:52:15 -070083 CAN0_MESSAGES[1].control_timestamp =
Brian Silverman7c7170e2018-01-13 17:41:21 -080084 CAN_MB_CONTROL_INSERT_CODE(CAN_MB_CODE_RX_EMPTY);
Brian Silverman8d3816a2017-07-03 18:52:15 -070085
86 // Using the oscillator clock directly because it's a reasonable frequency and
87 // more stable than the PLL-based peripheral clock, which matters.
88 // We're going with a sample point fraction of 0.875 because that's what
89 // SocketCAN defaults to.
90 CAN0_CTRL1 = CAN_CTRL1_PRESDIV(
91 1) /* Divide the crystal frequency by 2 to get 8 MHz. */ |
92 CAN_CTRL1_RJW(0) /* RJW/SJW of 1, which is most common. */ |
93 CAN_CTRL1_PSEG1(7) /* 8 time quanta before sampling. */ |
94 CAN_CTRL1_PSEG2(1) /* 2 time quanta after sampling. */ |
95 CAN_CTRL1_SMP /* Use triple sampling. */ |
96 CAN_CTRL1_PROPSEG(4) /* 5 time quanta before sampling. */;
Brian Silvermanfb1af122018-03-25 20:58:58 -040097 // TASD calculation:
98 // 25 - (fcanclk * (maxmb + 3 - (rfen * 8) - (rfen * rffn * 2)) * 2) /
99 // (fsys * (1 + (pseg1 + 1) + (pseg2 + 1) + (propseg + 1)) * (presdiv + 1))
100 // fcanclk = 8000000
101 // maxmb = NUMBER_MESSAGE_BUFFERS-1 = 3
102 // Answer is still 25 with maxmb = 15.
103 // rfen = 0
104 // rffn = whatever
105 // fsys = 60000000
106 // pseg1 = 7
107 // pseg2 = 1
108 // propseg = 4
109 // presdiv = 1
110 // answer = 25
111 // The TRM off-handedly mentions 24. In practice, using 25 results in weird
112 // and broken behavior, so just use 24. Linux looks like it just leaves this
113 // at 0.
114 CAN0_CTRL2 = CAN_CTRL2_TASD(24) | CAN_CTRL2_EACEN /* Match on IDE and RTR. */;
Brian Silverman8d3816a2017-07-03 18:52:15 -0700115
Brian Silverman8d3816a2017-07-03 18:52:15 -0700116 // Now take it out of freeze mode.
117 CAN0_MCR &= ~CAN_MCR_HALT;
Brian Silverman8d3816a2017-07-03 18:52:15 -0700118}
119
Brian Silverman54dd2fe2018-03-16 23:44:31 -0700120static void can_process_rx(volatile CanMessageBuffer *buffer,
121 unsigned char *data_out, int *length_out) {
Brian Silverman8d3816a2017-07-03 18:52:15 -0700122 // Wait until the buffer is marked as not being busy. The reference manual
123 // says to do this, although it's unclear how we could get an interrupt
124 // asserted while it's still busy. Maybe if the interrupt was slow and now
125 // it's being overwritten?
126 uint32_t control_timestamp;
127 do {
128 control_timestamp = buffer->control_timestamp;
129 } while (control_timestamp & CAN_MB_CONTROL_CODE_BUSY_MASK);
130 // The message buffer is now locked, so it won't be modified by the hardware.
131
132 const uint32_t prio_id = buffer->prio_id;
133 // Making sure to access the data 32 bits at a time, copy it out. It's
134 // ambiguous whether you're allowed to access the individual bytes, and this
135 // memory is weird enough to not make sense risking it. Also, it's only 2
136 // cycles, which is pretty hard to beat by doing anything with the length...
137 // Also, surprise!: the hardware stores the data big-endian.
138 uint32_t data[2];
139 data[0] = __builtin_bswap32(buffer->data[0]);
140 data[1] = __builtin_bswap32(buffer->data[1]);
141
142 // Yes, it might actually matter that we clear the interrupt flag before
143 // unlocking it...
144 CAN0_IFLAG1 = 1 << (buffer - CAN0_MESSAGES);
145
146 // Now read the timer to unlock the message buffer. Want to do this ASAP
147 // rather than waiting until we get to processing the next buffer, plus we
148 // might want to write to the next one, which results in weird, bad things.
149 {
150 uint16_t dummy = CAN0_TIMER;
151 (void)dummy;
152 }
153
154 // The message buffer is now unlocked and "serviced", but its control word
155 // code is still CAN_MB_CODE_RX_FULL. However, said code will stay
156 // CAN_MB_CODE_RX_FULL the next time a message is received into it (the code
157 // won't change to CAN_MB_CODE_RX_OVERRUN because it has been "serviced").
158 // Yes, really...
159
160 memcpy(data_out, data, 8);
161 *length_out = CAN_MB_CONTROL_EXTRACT_DLC(control_timestamp);
162 (void)prio_id;
163}
164
Brian Silverman110205a2018-01-15 14:33:50 -0800165int can_send(uint32_t can_id, const unsigned char *data, unsigned int length,
166 unsigned int mailbox) {
167 volatile CanMessageBuffer *const message_buffer = &CAN0_MESSAGES[mailbox];
Brian Silverman8d3816a2017-07-03 18:52:15 -0700168
Brian Silverman110205a2018-01-15 14:33:50 -0800169 // Just inactivate the mailbox to start with. Checking if it's done being
170 // transmitted doesn't seem to work like the reference manual describes, so
171 // just take the brute force approach.
172 message_buffer->control_timestamp =
173 CAN_MB_CONTROL_INSERT_CODE(CAN_MB_CODE_TX_INACTIVE);
Brian Silverman8d3816a2017-07-03 18:52:15 -0700174
175 // Yes, it might actually matter that we clear the interrupt flag before
176 // doing stuff...
Brian Silverman110205a2018-01-15 14:33:50 -0800177 CAN0_IFLAG1 = 1 << mailbox;
178
Brian Silverman54dd2fe2018-03-16 23:44:31 -0700179 message_buffer->prio_id = prio_id_for_id(can_id);
Brian Silverman8d3816a2017-07-03 18:52:15 -0700180 // Copy only the bytes from data that we're supposed to onto the stack, and
181 // then move it into the message buffer 32 bits at a time (because it might
182 // get unhappy about writing individual bytes). Plus, we have to byte-swap
183 // each 32-bit word because this hardware is weird...
184 {
185 uint32_t data_words[2] = {0, 0};
186 for (uint8_t *dest = (uint8_t *)&data_words[0];
187 dest - (uint8_t *)&data_words[0] < (ptrdiff_t)length; ++dest) {
188 *dest = *data;
189 ++data;
190 }
191 message_buffer->data[0] = __builtin_bswap32(data_words[0]);
192 message_buffer->data[1] = __builtin_bswap32(data_words[1]);
193 }
Brian Silverman54dd2fe2018-03-16 23:44:31 -0700194 uint32_t control_timestamp = CAN_MB_CONTROL_INSERT_DLC(length) |
195 CAN_MB_CONTROL_INSERT_CODE(CAN_MB_CODE_TX_DATA);
196 if (can_id & CAN_EFF_FLAG) {
197 control_timestamp |= CAN_MB_CONTROL_IDE | CAN_MB_CONTROL_SRR;
198 }
199 message_buffer->control_timestamp = control_timestamp;
Brian Silverman8d3816a2017-07-03 18:52:15 -0700200 return 0;
201}
202
Brian Silverman54dd2fe2018-03-16 23:44:31 -0700203void can_receive(unsigned char *data, int *length, int mailbox) {
Brian Silverman8d3816a2017-07-03 18:52:15 -0700204 if (0) {
205 static int i = 0;
Brian Silverman19ea60f2018-01-03 21:43:15 -0800206 if (i++ == 10000) {
Brian Silverman8d3816a2017-07-03 18:52:15 -0700207 printf("IFLAG1=%" PRIx32 " ESR=%" PRIx32 " ESR1=%" PRIx32 "\n",
208 CAN0_IFLAG1, CAN0_ECR, CAN0_ESR1);
209 i = 0;
210 }
211 }
Brian Silverman7c7170e2018-01-13 17:41:21 -0800212 if ((CAN0_IFLAG1 & (1 << mailbox)) == 0) {
Brian Silverman8d3816a2017-07-03 18:52:15 -0700213 *length = -1;
214 return;
215 }
Brian Silverman54dd2fe2018-03-16 23:44:31 -0700216 can_process_rx(&CAN0_MESSAGES[mailbox], data, length);
Brian Silverman8d3816a2017-07-03 18:52:15 -0700217}