Austin Schuh | 41baf20 | 2022-01-01 14:33:40 -0800 | [diff] [blame^] | 1 | /* |
| 2 | * The MIT License (MIT) |
| 3 | * |
| 4 | * Copyright (c) 2018, hathach (tinyusb.org) |
| 5 | * |
| 6 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
| 7 | * of this software and associated documentation files (the "Software"), to deal |
| 8 | * in the Software without restriction, including without limitation the rights |
| 9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell |
| 10 | * copies of the Software, and to permit persons to whom the Software is |
| 11 | * furnished to do so, subject to the following conditions: |
| 12 | * |
| 13 | * The above copyright notice and this permission notice shall be included in |
| 14 | * all copies or substantial portions of the Software. |
| 15 | * |
| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE |
| 19 | * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| 21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
| 22 | * THE SOFTWARE. |
| 23 | * |
| 24 | * This file is part of the TinyUSB stack. |
| 25 | */ |
| 26 | |
| 27 | #include "bsp/board.h" |
| 28 | #include "board.h" |
| 29 | #include "fsl_device_registers.h" |
| 30 | #include "fsl_gpio.h" |
| 31 | #include "fsl_power.h" |
| 32 | #include "fsl_iocon.h" |
| 33 | #include "fsl_usart.h" |
| 34 | #include "fsl_sctimer.h" |
| 35 | #include "sct_neopixel.h" |
| 36 | |
| 37 | //--------------------------------------------------------------------+ |
| 38 | // MACRO TYPEDEF CONSTANT ENUM |
| 39 | //--------------------------------------------------------------------+ |
| 40 | |
| 41 | // IOCON pin mux |
| 42 | #define IOCON_PIO_DIGITAL_EN 0x0100u // Enables digital function |
| 43 | #define IOCON_PIO_FUNC0 0x00u // Selects pin function 0 |
| 44 | #define IOCON_PIO_FUNC1 0x01u // Selects pin function 1 |
| 45 | #define IOCON_PIO_FUNC4 0x04u // Selects pin function 4 |
| 46 | #define IOCON_PIO_FUNC7 0x07u // Selects pin function 7 |
| 47 | #define IOCON_PIO_INV_DI 0x00u // Input function is not inverted |
| 48 | #define IOCON_PIO_MODE_INACT 0x00u // No addition pin function |
| 49 | #define IOCON_PIO_OPENDRAIN_DI 0x00u // Open drain is disabled |
| 50 | #define IOCON_PIO_SLEW_STANDARD 0x00u // Standard mode, output slew rate control is enabled |
| 51 | |
| 52 | #define IOCON_PIO_DIG_FUNC0_EN (IOCON_PIO_DIGITAL_EN | IOCON_PIO_FUNC0) // Digital pin function 0 enabled |
| 53 | #define IOCON_PIO_DIG_FUNC1_EN (IOCON_PIO_DIGITAL_EN | IOCON_PIO_FUNC1) // Digital pin function 1 enabled |
| 54 | #define IOCON_PIO_DIG_FUNC4_EN (IOCON_PIO_DIGITAL_EN | IOCON_PIO_FUNC4) // Digital pin function 2 enabled |
| 55 | #define IOCON_PIO_DIG_FUNC7_EN (IOCON_PIO_DIGITAL_EN | IOCON_PIO_FUNC7) // Digital pin function 2 enabled |
| 56 | |
| 57 | //--------------------------------------------------------------------+ |
| 58 | // Forward USB interrupt events to TinyUSB IRQ Handler |
| 59 | //--------------------------------------------------------------------+ |
| 60 | void USB0_IRQHandler(void) |
| 61 | { |
| 62 | tud_int_handler(0); |
| 63 | } |
| 64 | |
| 65 | void USB1_IRQHandler(void) |
| 66 | { |
| 67 | tud_int_handler(1); |
| 68 | } |
| 69 | |
| 70 | /**************************************************************** |
| 71 | name: BOARD_BootClockFROHF96M |
| 72 | outputs: |
| 73 | - {id: SYSTICK_clock.outFreq, value: 96 MHz} |
| 74 | - {id: System_clock.outFreq, value: 96 MHz} |
| 75 | settings: |
| 76 | - {id: SYSCON.MAINCLKSELA.sel, value: SYSCON.fro_hf} |
| 77 | sources: |
| 78 | - {id: SYSCON.fro_hf.outFreq, value: 96 MHz} |
| 79 | ******************************************************************/ |
| 80 | void BootClockFROHF96M(void) |
| 81 | { |
| 82 | /*!< Set up the clock sources */ |
| 83 | /*!< Set up FRO */ |
| 84 | POWER_DisablePD(kPDRUNCFG_PD_FRO192M); /*!< Ensure FRO is on */ |
| 85 | CLOCK_SetupFROClocking(12000000U); /*!< Set up FRO to the 12 MHz, just for sure */ |
| 86 | CLOCK_AttachClk(kFRO12M_to_MAIN_CLK); /*!< Switch to FRO 12MHz first to ensure we can change voltage without |
| 87 | accidentally being below the voltage for current speed */ |
| 88 | |
| 89 | CLOCK_SetupFROClocking(96000000U); /*!< Set up high frequency FRO output to selected frequency */ |
| 90 | |
| 91 | POWER_SetVoltageForFreq(96000000U); /*!< Set voltage for the one of the fastest clock outputs: System clock output */ |
| 92 | CLOCK_SetFLASHAccessCyclesForFreq(96000000U); /*!< Set FLASH wait states for core */ |
| 93 | |
| 94 | /*!< Set up dividers */ |
| 95 | CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false); /*!< Set AHBCLKDIV divider to value 1 */ |
| 96 | |
| 97 | /*!< Set up clock selectors - Attach clocks to the peripheries */ |
| 98 | CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK); /*!< Switch MAIN_CLK to FRO_HF */ |
| 99 | |
| 100 | /*!< Set SystemCoreClock variable. */ |
| 101 | SystemCoreClock = 96000000U; |
| 102 | } |
| 103 | |
| 104 | void board_init(void) |
| 105 | { |
| 106 | // Enable IOCON clock |
| 107 | CLOCK_EnableClock(kCLOCK_Iocon); |
| 108 | |
| 109 | // Init 96 MHz clock |
| 110 | BootClockFROHF96M(); |
| 111 | |
| 112 | // 1ms tick timer |
| 113 | SysTick_Config(SystemCoreClock / 1000); |
| 114 | |
| 115 | #if CFG_TUSB_OS == OPT_OS_FREERTOS |
| 116 | // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) |
| 117 | NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY ); |
| 118 | #endif |
| 119 | |
| 120 | // Init all GPIO ports |
| 121 | GPIO_PortInit(GPIO, 0); |
| 122 | GPIO_PortInit(GPIO, 1); |
| 123 | |
| 124 | // LED |
| 125 | IOCON_PinMuxSet(IOCON, LED_PORT, LED_PIN, IOCON_PIO_DIG_FUNC0_EN); |
| 126 | gpio_pin_config_t const led_config = { kGPIO_DigitalOutput, 1}; |
| 127 | GPIO_PinInit(GPIO, LED_PORT, LED_PIN, &led_config); |
| 128 | |
| 129 | board_led_write(0); |
| 130 | |
| 131 | #ifdef NEOPIXEL_PIN |
| 132 | // Neopixel |
| 133 | static uint32_t pixelData[NEOPIXEL_NUMBER]; |
| 134 | IOCON_PinMuxSet(IOCON, NEOPIXEL_PORT, NEOPIXEL_PIN, IOCON_PIO_DIG_FUNC4_EN); |
| 135 | |
| 136 | sctpix_init(NEOPIXEL_TYPE); |
| 137 | sctpix_addCh(NEOPIXEL_CH, pixelData, NEOPIXEL_NUMBER); |
| 138 | sctpix_setPixel(NEOPIXEL_CH, 0, 0x100010); |
| 139 | sctpix_setPixel(NEOPIXEL_CH, 1, 0x100010); |
| 140 | sctpix_show(); |
| 141 | #endif |
| 142 | |
| 143 | // Button |
| 144 | IOCON_PinMuxSet(IOCON, BUTTON_PORT, BUTTON_PIN, IOCON_PIO_DIG_FUNC0_EN); |
| 145 | gpio_pin_config_t const button_config = { kGPIO_DigitalInput, 0}; |
| 146 | GPIO_PinInit(GPIO, BUTTON_PORT, BUTTON_PIN, &button_config); |
| 147 | |
| 148 | #ifdef UART_DEV |
| 149 | // UART |
| 150 | IOCON_PinMuxSet(IOCON, UART_RX_PINMUX); |
| 151 | IOCON_PinMuxSet(IOCON, UART_TX_PINMUX); |
| 152 | |
| 153 | // Enable UART when debug log is on |
| 154 | CLOCK_AttachClk(kFRO12M_to_FLEXCOMM0); |
| 155 | usart_config_t uart_config; |
| 156 | USART_GetDefaultConfig(&uart_config); |
| 157 | uart_config.baudRate_Bps = CFG_BOARD_UART_BAUDRATE; |
| 158 | uart_config.enableTx = true; |
| 159 | uart_config.enableRx = true; |
| 160 | USART_Init(UART_DEV, &uart_config, 12000000); |
| 161 | #endif |
| 162 | |
| 163 | // USB VBUS |
| 164 | /* PORT0 PIN22 configured as USB0_VBUS */ |
| 165 | IOCON_PinMuxSet(IOCON, 0U, 22U, IOCON_PIO_DIG_FUNC7_EN); |
| 166 | |
| 167 | #if CFG_TUSB_RHPORT0_MODE & OPT_MODE_DEVICE |
| 168 | // Port0 is Full Speed |
| 169 | |
| 170 | /* Turn on USB0 Phy */ |
| 171 | POWER_DisablePD(kPDRUNCFG_PD_USB0_PHY); |
| 172 | |
| 173 | /* reset the IP to make sure it's in reset state. */ |
| 174 | RESET_PeripheralReset(kUSB0D_RST_SHIFT_RSTn); |
| 175 | RESET_PeripheralReset(kUSB0HSL_RST_SHIFT_RSTn); |
| 176 | RESET_PeripheralReset(kUSB0HMR_RST_SHIFT_RSTn); |
| 177 | |
| 178 | // Enable USB Clock Adjustments to trim the FRO for the full speed controller |
| 179 | ANACTRL->FRO192M_CTRL |= ANACTRL_FRO192M_CTRL_USBCLKADJ_MASK; |
| 180 | CLOCK_SetClkDiv(kCLOCK_DivUsb0Clk, 1, false); |
| 181 | CLOCK_AttachClk(kFRO_HF_to_USB0_CLK); |
| 182 | |
| 183 | /*According to reference mannual, device mode setting has to be set by access usb host register */ |
| 184 | CLOCK_EnableClock(kCLOCK_Usbhsl0); // enable usb0 host clock |
| 185 | USBFSH->PORTMODE |= USBFSH_PORTMODE_DEV_ENABLE_MASK; |
| 186 | CLOCK_DisableClock(kCLOCK_Usbhsl0); // disable usb0 host clock |
| 187 | |
| 188 | /* enable USB Device clock */ |
| 189 | CLOCK_EnableUsbfs0DeviceClock(kCLOCK_UsbfsSrcFro, CLOCK_GetFreq(kCLOCK_FroHf)); |
| 190 | #endif |
| 191 | |
| 192 | #if CFG_TUSB_RHPORT1_MODE & OPT_MODE_DEVICE |
| 193 | // Port1 is High Speed |
| 194 | |
| 195 | /* Turn on USB1 Phy */ |
| 196 | POWER_DisablePD(kPDRUNCFG_PD_USB1_PHY); |
| 197 | |
| 198 | /* reset the IP to make sure it's in reset state. */ |
| 199 | RESET_PeripheralReset(kUSB1H_RST_SHIFT_RSTn); |
| 200 | RESET_PeripheralReset(kUSB1D_RST_SHIFT_RSTn); |
| 201 | RESET_PeripheralReset(kUSB1_RST_SHIFT_RSTn); |
| 202 | RESET_PeripheralReset(kUSB1RAM_RST_SHIFT_RSTn); |
| 203 | |
| 204 | /* According to reference mannual, device mode setting has to be set by access usb host register */ |
| 205 | CLOCK_EnableClock(kCLOCK_Usbh1); // enable usb0 host clock |
| 206 | |
| 207 | USBHSH->PORTMODE = USBHSH_PORTMODE_SW_PDCOM_MASK; // Put PHY powerdown under software control |
| 208 | USBHSH->PORTMODE |= USBHSH_PORTMODE_DEV_ENABLE_MASK; |
| 209 | |
| 210 | CLOCK_DisableClock(kCLOCK_Usbh1); // disable usb0 host clock |
| 211 | |
| 212 | /* enable USB Device clock */ |
| 213 | CLOCK_EnableUsbhs0PhyPllClock(kCLOCK_UsbPhySrcExt, XTAL0_CLK_HZ); |
| 214 | CLOCK_EnableUsbhs0DeviceClock(kCLOCK_UsbSrcUnused, 0U); |
| 215 | CLOCK_EnableClock(kCLOCK_UsbRam1); |
| 216 | |
| 217 | // Enable PHY support for Low speed device + LS via FS Hub |
| 218 | USBPHY->CTRL |= USBPHY_CTRL_SET_ENUTMILEVEL2_MASK | USBPHY_CTRL_SET_ENUTMILEVEL3_MASK; |
| 219 | |
| 220 | // Enable all power for normal operation |
| 221 | USBPHY->PWD = 0; |
| 222 | |
| 223 | USBPHY->CTRL_SET = USBPHY_CTRL_SET_ENAUTOCLR_CLKGATE_MASK; |
| 224 | USBPHY->CTRL_SET = USBPHY_CTRL_SET_ENAUTOCLR_PHY_PWD_MASK; |
| 225 | |
| 226 | // TX Timing |
| 227 | // uint32_t phytx = USBPHY->TX; |
| 228 | // phytx &= ~(USBPHY_TX_D_CAL_MASK | USBPHY_TX_TXCAL45DM_MASK | USBPHY_TX_TXCAL45DP_MASK); |
| 229 | // phytx |= USBPHY_TX_D_CAL(0x0C) | USBPHY_TX_TXCAL45DP(0x06) | USBPHY_TX_TXCAL45DM(0x06); |
| 230 | // USBPHY->TX = phytx; |
| 231 | #endif |
| 232 | } |
| 233 | |
| 234 | //--------------------------------------------------------------------+ |
| 235 | // Board porting API |
| 236 | //--------------------------------------------------------------------+ |
| 237 | |
| 238 | void board_led_write(bool state) |
| 239 | { |
| 240 | GPIO_PinWrite(GPIO, LED_PORT, LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON)); |
| 241 | |
| 242 | #ifdef NEOPIXEL_PIN |
| 243 | if (state) { |
| 244 | sctpix_setPixel(NEOPIXEL_CH, 0, 0x100000); |
| 245 | sctpix_setPixel(NEOPIXEL_CH, 1, 0x101010); |
| 246 | } else { |
| 247 | sctpix_setPixel(NEOPIXEL_CH, 0, 0x001000); |
| 248 | sctpix_setPixel(NEOPIXEL_CH, 1, 0x000010); |
| 249 | } |
| 250 | sctpix_show(); |
| 251 | #endif |
| 252 | } |
| 253 | |
| 254 | uint32_t board_button_read(void) |
| 255 | { |
| 256 | // active low |
| 257 | return BUTTON_STATE_ACTIVE == GPIO_PinRead(GPIO, BUTTON_PORT, BUTTON_PIN); |
| 258 | } |
| 259 | |
| 260 | int board_uart_read(uint8_t* buf, int len) |
| 261 | { |
| 262 | (void) buf; (void) len; |
| 263 | return 0; |
| 264 | } |
| 265 | |
| 266 | int board_uart_write(void const * buf, int len) |
| 267 | { |
| 268 | USART_WriteBlocking(UART_DEV, (uint8_t const *) buf, len); |
| 269 | return len; |
| 270 | } |
| 271 | |
| 272 | #if CFG_TUSB_OS == OPT_OS_NONE |
| 273 | volatile uint32_t system_ticks = 0; |
| 274 | void SysTick_Handler(void) |
| 275 | { |
| 276 | system_ticks++; |
| 277 | } |
| 278 | |
| 279 | uint32_t board_millis(void) |
| 280 | { |
| 281 | return system_ticks; |
| 282 | } |
| 283 | #endif |