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Austin Schuh745610d2015-09-06 18:19:50 -07001// -*- Mode: C++; c-basic-offset: 2; indent-tabs-mode: nil -*-
2// Copyright (c) 2004, Google Inc.
3// All rights reserved.
4//
5// Redistribution and use in source and binary forms, with or without
6// modification, are permitted provided that the following conditions are
7// met:
8//
9// * Redistributions of source code must retain the above copyright
10// notice, this list of conditions and the following disclaimer.
11// * Redistributions in binary form must reproduce the above
12// copyright notice, this list of conditions and the following disclaimer
13// in the documentation and/or other materials provided with the
14// distribution.
15// * Neither the name of Google Inc. nor the names of its
16// contributors may be used to endorse or promote products derived from
17// this software without specific prior written permission.
18//
19// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
20// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
21// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
22// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
23// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
24// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
25// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
26// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
27// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
28// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
29// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30
31// ----------------------------------------------------------------------
32// CycleClock
33// A CycleClock tells you the current time in Cycles. The "time"
34// is actually time since power-on. This is like time() but doesn't
35// involve a system call and is much more precise.
36//
37// NOTE: Not all cpu/platform/kernel combinations guarantee that this
38// clock increments at a constant rate or is synchronized across all logical
39// cpus in a system.
40//
41// Also, in some out of order CPU implementations, the CycleClock is not
42// serializing. So if you're trying to count at cycles granularity, your
43// data might be inaccurate due to out of order instruction execution.
44// ----------------------------------------------------------------------
45
46#ifndef GOOGLE_BASE_CYCLECLOCK_H_
47#define GOOGLE_BASE_CYCLECLOCK_H_
48
49#include "base/basictypes.h" // make sure we get the def for int64
50#include "base/arm_instruction_set_select.h"
51// base/sysinfo.h is really big and we don't want to include it unless
52// it is necessary.
53#if defined(__arm__) || defined(__mips__) || defined(__aarch64__)
54# include "base/sysinfo.h"
55#endif
56#if defined(__MACH__) && defined(__APPLE__)
57# include <mach/mach_time.h>
58#endif
59// For MSVC, we want to use '_asm rdtsc' when possible (since it works
60// with even ancient MSVC compilers), and when not possible the
61// __rdtsc intrinsic, declared in <intrin.h>. Unfortunately, in some
62// environments, <windows.h> and <intrin.h> have conflicting
63// declarations of some other intrinsics, breaking compilation.
64// Therefore, we simply declare __rdtsc ourselves. See also
65// http://connect.microsoft.com/VisualStudio/feedback/details/262047
66#if defined(_MSC_VER) && !defined(_M_IX86)
67extern "C" uint64 __rdtsc();
68#pragma intrinsic(__rdtsc)
69#endif
70#if defined(ARMV3) || defined(__mips__) || defined(__aarch64__)
71#include <sys/time.h>
72#endif
73
74// NOTE: only i386 and x86_64 have been well tested.
75// PPC, sparc, alpha, and ia64 are based on
76// http://peter.kuscsik.com/wordpress/?p=14
77// with modifications by m3b. See also
78// https://setisvn.ssl.berkeley.edu/svn/lib/fftw-3.0.1/kernel/cycle.h
79struct CycleClock {
80 // This should return the number of cycles since power-on. Thread-safe.
81 static inline int64 Now() {
82#if defined(__MACH__) && defined(__APPLE__)
83 // this goes at the top because we need ALL Macs, regardless of
84 // architecture, to return the number of "mach time units" that
85 // have passed since startup. See sysinfo.cc where
86 // InitializeSystemInfo() sets the supposed cpu clock frequency of
87 // macs to the number of mach time units per second, not actual
88 // CPU clock frequency (which can change in the face of CPU
89 // frequency scaling). Also note that when the Mac sleeps, this
90 // counter pauses; it does not continue counting, nor does it
91 // reset to zero.
92 return mach_absolute_time();
93#elif defined(__i386__)
94 int64 ret;
95 __asm__ volatile ("rdtsc" : "=A" (ret) );
96 return ret;
97#elif defined(__x86_64__) || defined(__amd64__)
98 uint64 low, high;
99 __asm__ volatile ("rdtsc" : "=a" (low), "=d" (high));
100 return (high << 32) | low;
101#elif defined(__powerpc64__) || defined(__ppc64__)
102 uint64 tb;
103 __asm__ volatile (\
104 "mfspr %0, 268"
105 : "=r" (tb));
106 return tb;
107#elif defined(__powerpc__) || defined(__ppc__)
108 // This returns a time-base, which is not always precisely a cycle-count.
109 uint32 tbu, tbl, tmp;
110 __asm__ volatile (\
111 "0:\n"
112 "mftbu %0\n"
113 "mftbl %1\n"
114 "mftbu %2\n"
115 "cmpw %0, %2\n"
116 "bne- 0b"
117 : "=r" (tbu), "=r" (tbl), "=r" (tmp));
118 return (((uint64) tbu << 32) | tbl);
119#elif defined(__sparc__)
120 int64 tick;
121 asm(".byte 0x83, 0x41, 0x00, 0x00");
122 asm("mov %%g1, %0" : "=r" (tick));
123 return tick;
124#elif defined(__ia64__)
125 int64 itc;
126 asm("mov %0 = ar.itc" : "=r" (itc));
127 return itc;
128#elif defined(_MSC_VER) && defined(_M_IX86)
129 // Older MSVC compilers (like 7.x) don't seem to support the
130 // __rdtsc intrinsic properly, so I prefer to use _asm instead
131 // when I know it will work. Otherwise, I'll use __rdtsc and hope
132 // the code is being compiled with a non-ancient compiler.
133 _asm rdtsc
134#elif defined(_MSC_VER)
135 return __rdtsc();
136#elif defined(ARMV3) || defined(__aarch64__)
137#if defined(ARMV7) // V7 is the earliest arch that has a standard cyclecount
138 uint32 pmccntr;
139 uint32 pmuseren;
140 uint32 pmcntenset;
141 // Read the user mode perf monitor counter access permissions.
142 asm volatile ("mrc p15, 0, %0, c9, c14, 0" : "=r" (pmuseren));
143 if (pmuseren & 1) { // Allows reading perfmon counters for user mode code.
144 asm volatile ("mrc p15, 0, %0, c9, c12, 1" : "=r" (pmcntenset));
145 if (pmcntenset & 0x80000000ul) { // Is it counting?
146 asm volatile ("mrc p15, 0, %0, c9, c13, 0" : "=r" (pmccntr));
147 // The counter is set up to count every 64th cycle
148 return static_cast<int64>(pmccntr) * 64; // Should optimize to << 6
149 }
150 }
151#endif
152 struct timeval tv;
153 gettimeofday(&tv, NULL);
154 return static_cast<int64>((tv.tv_sec + tv.tv_usec * 0.000001)
155 * CyclesPerSecond());
156#elif defined(__mips__)
157 // mips apparently only allows rdtsc for superusers, so we fall
158 // back to gettimeofday. It's possible clock_gettime would be better.
159 struct timeval tv;
160 gettimeofday(&tv, NULL);
161 return static_cast<int64>((tv.tv_sec + tv.tv_usec * 0.000001)
162 * CyclesPerSecond());
163#else
164// The soft failover to a generic implementation is automatic only for ARM.
165// For other platforms the developer is expected to make an attempt to create
166// a fast implementation and use generic version if nothing better is available.
167#error You need to define CycleTimer for your O/S and CPU
168#endif
169 }
170};
171
172
173#endif // GOOGLE_BASE_CYCLECLOCK_H_