jerrym | f157933 | 2013-02-07 01:56:28 +0000 | [diff] [blame] | 1 | /*
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| 2 | * FPGA Interface C API 2.0 header file.
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| 3 | *
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| 4 | * Copyright (c) 2011,
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| 5 | * National Instruments Corporation.
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| 6 | * All rights reserved.
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| 7 | */
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| 8 |
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| 9 | #ifndef __NiFpga_h__
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| 10 | #define __NiFpga_h__
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| 11 |
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| 12 | /*
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| 13 | * Determine platform details.
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| 14 | */
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| 15 | #if defined(_M_IX86) \
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| 16 | || defined(_M_X64) \
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| 17 | || defined(i386) \
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| 18 | || defined(__i386__) \
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| 19 | || defined(__amd64__) \
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| 20 | || defined(__amd64) \
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| 21 | || defined(__x86_64__) \
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| 22 | || defined(__x86_64) \
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| 23 | || defined(__i386) \
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| 24 | || defined(_X86_) \
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| 25 | || defined(__THW_INTEL__) \
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| 26 | || defined(__I86__) \
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| 27 | || defined(__INTEL__) \
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| 28 | || defined(__X86__) \
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| 29 | || defined(__386__) \
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| 30 | || defined(__I86__) \
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| 31 | || defined(M_I386) \
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| 32 | || defined(M_I86) \
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| 33 | || defined(_M_I386) \
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| 34 | || defined(_M_I86)
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| 35 | #if defined(_WIN32) \
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| 36 | || defined(_WIN64) \
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| 37 | || defined(__WIN32__) \
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| 38 | || defined(__TOS_WIN__) \
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| 39 | || defined(__WINDOWS__) \
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| 40 | || defined(_WINDOWS) \
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| 41 | || defined(__WINDOWS_386__) \
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| 42 | || defined(__CYGWIN__)
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| 43 | /* Either Windows or Phar Lap ETS. */
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| 44 | #define NiFpga_Windows 1
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| 45 | #elif defined(__linux) \
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| 46 | || defined(__linux__) \
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| 47 | || defined(__gnu_linux__) \
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| 48 | || defined(linux)
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| 49 | #define NiFpga_Linux 1
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| 50 | #else
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| 51 | #error Unsupported OS.
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| 52 | #endif
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| 53 | #elif defined(__powerpc) \
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| 54 | || defined(__powerpc__) \
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| 55 | || defined(__POWERPC__) \
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| 56 | || defined(__ppc__) \
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| 57 | || defined(__PPC) \
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| 58 | || defined(_M_PPC) \
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| 59 | || defined(_ARCH_PPC) \
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| 60 | || defined(__PPC__) \
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| 61 | || defined(__ppc)
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| 62 | #if defined(__vxworks)
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| 63 | #define NiFpga_VxWorks 1
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| 64 | #else
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| 65 | #error Unsupported OS.
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| 66 | #endif
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| 67 | #else
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| 68 | #error Unsupported architecture.
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| 69 | #endif
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| 70 |
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| 71 | /*
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| 72 | * Determine compiler.
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| 73 | */
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| 74 | #if defined(_MSC_VER)
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| 75 | #define NiFpga_Msvc 1
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| 76 | #elif defined(__GNUC__)
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| 77 | #define NiFpga_Gcc 1
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| 78 | #elif defined(_CVI_) && !defined(_TPC_)
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| 79 | #define NiFpga_Cvi 1
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| 80 | /* Enables CVI Library Protection Errors. */
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| 81 | #pragma EnableLibraryRuntimeChecking
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| 82 | #else
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| 83 | /* Unknown compiler. */
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| 84 | #endif
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| 85 |
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| 86 | /*
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| 87 | * Determine compliance with different C/C++ language standards.
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| 88 | */
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| 89 | #if defined(__cplusplus)
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| 90 | #define NiFpga_Cpp 1
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| 91 | #if __cplusplus >= 199707L
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| 92 | #define NiFpga_Cpp98 1
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| 93 | #endif
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| 94 | #endif
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| 95 | #if defined(__STDC__)
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| 96 | #define NiFpga_C89 1
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| 97 | #if defined(__STDC_VERSION__)
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| 98 | #define NiFpga_C90 1
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| 99 | #if __STDC_VERSION__ >= 199409L
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| 100 | #define NiFpga_C94 1
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| 101 | #if __STDC_VERSION__ >= 199901L
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| 102 | #define NiFpga_C99 1
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| 103 | #endif
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| 104 | #endif
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| 105 | #endif
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| 106 | #endif
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| 107 |
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| 108 | /*
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| 109 | * Determine ability to inline functions.
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| 110 | */
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| 111 | #if NiFpga_Cpp || NiFpga_C99
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| 112 | /* The inline keyword exists in C++ and C99. */
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| 113 | #define NiFpga_Inline inline
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| 114 | #elif NiFpga_Msvc
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| 115 | /* Visual C++ (at least since 6.0) also supports an alternate keyword. */
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| 116 | #define NiFpga_Inline __inline
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| 117 | #elif NiFpga_Gcc
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| 118 | /* GCC (at least since 2.95.2) also supports an alternate keyword. */
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| 119 | #define NiFpga_Inline __inline__
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| 120 | #elif !defined(NiFpga_Inline)
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| 121 | /*
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| 122 | * Disable inlining if inline support is unknown. To manually enable
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| 123 | * inlining, #define the following macro before #including NiFpga.h:
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| 124 | *
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| 125 | * #define NiFpga_Inline inline
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| 126 | */
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| 127 | #define NiFpga_Inline
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| 128 | #endif
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| 129 |
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| 130 | /*
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| 131 | * Define exact-width integer types, if they have not already been defined.
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| 132 | */
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| 133 | #if NiFpga_ExactWidthIntegerTypesDefined \
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| 134 | || defined(_STDINT) \
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| 135 | || defined(_STDINT_H) \
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| 136 | || defined(_STDINT_H_) \
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| 137 | || defined(_INTTYPES_H) \
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| 138 | || defined(_INTTYPES_H_) \
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| 139 | || defined(_SYS_STDINT_H) \
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| 140 | || defined(_SYS_STDINT_H_) \
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| 141 | || defined(_SYS_INTTYPES_H) \
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| 142 | || defined(_SYS_INTTYPES_H_) \
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| 143 | || defined(_STDINT_H_INCLUDED) \
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| 144 | || defined(BOOST_CSTDINT_HPP) \
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| 145 | || defined(_MSC_STDINT_H_) \
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| 146 | || defined(_PSTDINT_H_INCLUDED)
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| 147 | /* Assume that exact-width integer types have already been defined. */
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| 148 | #elif NiFpga_VxWorks
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| 149 | #include <vxWorks.h>
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| 150 | #elif NiFpga_C99 \
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| 151 | || NiFpga_Gcc /* GCC (at least since 3.0) has a stdint.h. */ \
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| 152 | || defined(HAVE_STDINT_H)
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| 153 | /* Assume that stdint.h can be included. */
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| 154 | #include <stdint.h>
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| 155 | #elif NiFpga_Msvc \
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| 156 | || NiFpga_Cvi
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| 157 | /* Manually define exact-width integer types. */
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| 158 | typedef signed char int8_t;
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| 159 | typedef unsigned char uint8_t;
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| 160 | typedef short int16_t;
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| 161 | typedef unsigned short uint16_t;
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| 162 | typedef int int32_t;
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| 163 | typedef unsigned int uint32_t;
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| 164 | typedef __int64 int64_t;
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| 165 | typedef unsigned __int64 uint64_t;
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| 166 | #else
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| 167 | /*
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| 168 | * Exact-width integer types must be defined by the user, and the following
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| 169 | * macro must be #defined, before #including NiFpga.h:
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| 170 | *
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| 171 | * #define NiFpga_ExactWidthIntegerTypesDefined 1
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| 172 | */
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| 173 | #error Exact-width integer types must be defined by the user. See comment.
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| 174 | #endif
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| 175 |
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| 176 | /* Included for definition of size_t. */
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| 177 | #include <stddef.h>
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| 178 |
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| 179 | #if NiFpga_Cpp
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| 180 | extern "C" {
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| 181 | #endif
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| 182 |
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| 183 | /**
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| 184 | * A boolean value; either NiFpga_False or NiFpga_True.
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| 185 | */
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| 186 | typedef uint8_t NiFpga_Bool;
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| 187 |
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| 188 | /**
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| 189 | * Represents a false condition.
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| 190 | */
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| 191 | static const NiFpga_Bool NiFpga_False = 0;
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| 192 |
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| 193 | /**
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| 194 | * Represents a true condition.
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| 195 | */
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| 196 | static const NiFpga_Bool NiFpga_True = 1;
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| 197 |
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| 198 | /**
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| 199 | * Represents the resulting status of a function call through its return value.
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| 200 | * 0 is success, negative values are errors, and positive values are warnings.
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| 201 | */
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| 202 | typedef int32_t NiFpga_Status;
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| 203 |
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| 204 | /**
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| 205 | * No errors or warnings.
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| 206 | */
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| 207 | static const NiFpga_Status NiFpga_Status_Success = 0;
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| 208 |
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| 209 | /**
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| 210 | * The timeout expired before the FIFO operation could complete.
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| 211 | */
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| 212 | static const NiFpga_Status NiFpga_Status_FifoTimeout = -50400;
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| 213 |
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| 214 | /**
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| 215 | * A memory allocation failed. Try again after rebooting.
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| 216 | */
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| 217 | static const NiFpga_Status NiFpga_Status_MemoryFull = -52000;
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| 218 |
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| 219 | /**
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| 220 | * An unexpected software error occurred.
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| 221 | */
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| 222 | static const NiFpga_Status NiFpga_Status_SoftwareFault = -52003;
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| 223 |
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| 224 | /**
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| 225 | * A parameter to a function was not valid. This could be a NULL pointer, a bad
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| 226 | * value, etc.
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| 227 | */
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| 228 | static const NiFpga_Status NiFpga_Status_InvalidParameter = -52005;
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| 229 |
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| 230 | /**
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| 231 | * A required resource was not found. The NiFpga.* library, the RIO resource,
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| 232 | * or some other resource may be missing, or the NiFpga.* library may not be
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| 233 | * the required minimum version.
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| 234 | */
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| 235 | static const NiFpga_Status NiFpga_Status_ResourceNotFound = -52006;
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| 236 |
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| 237 | /**
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| 238 | * A required resource was not properly initialized. This could occur if
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| 239 | * NiFpga_Initialize was not called or a required NiFpga_IrqContext was not
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| 240 | * reserved.
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| 241 | */
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| 242 | static const NiFpga_Status NiFpga_Status_ResourceNotInitialized = -52010;
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| 243 |
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| 244 | /**
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| 245 | * The FPGA is already running.
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| 246 | */
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| 247 | static const NiFpga_Status NiFpga_Status_FpgaAlreadyRunning = -61003;
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| 248 |
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| 249 | /**
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| 250 | * The bitfile was not compiled for the specified resource's device type.
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| 251 | */
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| 252 | static const NiFpga_Status NiFpga_Status_DeviceTypeMismatch = -61024;
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| 253 |
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| 254 | /**
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| 255 | * An error was detected in the communication between the host computer and the
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| 256 | * FPGA target.
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| 257 | */
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| 258 | static const NiFpga_Status NiFpga_Status_CommunicationTimeout = -61046;
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| 259 |
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| 260 | /**
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| 261 | * The timeout expired before any of the IRQs were asserted.
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| 262 | */
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| 263 | static const NiFpga_Status NiFpga_Status_IrqTimeout = -61060;
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| 264 |
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| 265 | /**
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| 266 | * The specified bitfile is invalid or corrupt.
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| 267 | */
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| 268 | static const NiFpga_Status NiFpga_Status_CorruptBitfile = -61070;
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| 269 |
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| 270 | /**
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| 271 | * The FIFO depth is invalid. It was either 0, greater than the amount of
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| 272 | * available memory in the host computer, or greater than the maximum size
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| 273 | * allowed by the hardware.
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| 274 | */
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| 275 | static const NiFpga_Status NiFpga_Status_BadDepth = -61072;
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| 276 |
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| 277 | /**
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| 278 | * The number of FIFO elements is invalid. Either the number is greater than
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| 279 | * the depth of the host memory DMA FIFO, or more elements were requested for
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| 280 | * release than had been acquired.
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| 281 | */
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| 282 | static const NiFpga_Status NiFpga_Status_BadReadWriteCount = -61073;
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| 283 |
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| 284 | /**
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| 285 | * A hardware clocking error occurred. A derived clock lost lock with its base
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| 286 | * clock during the execution of the LabVIEW FPGA VI. If any base clocks with
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| 287 | * derived clocks are referencing an external source, make sure that the
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| 288 | * external source is connected and within the supported frequency, jitter,
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| 289 | * accuracy, duty cycle, and voltage specifications. Also verify that the
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| 290 | * characteristics of the base clock match the configuration specified in the
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| 291 | * FPGA Base Clock Properties. If all base clocks with derived clocks are
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| 292 | * generated from free-running, on-board sources, please contact National
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| 293 | * Instruments technical support at ni.com/support.
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| 294 | */
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| 295 | static const NiFpga_Status NiFpga_Status_ClockLostLock = -61083;
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| 296 |
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| 297 | /**
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| 298 | * Operation could not be performed because the FPGA is busy. Stop all the
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| 299 | * activities on the FPGA before requesting this operation.
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| 300 | */
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| 301 | static const NiFpga_Status NiFpga_Status_FpgaBusy = -61141;
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| 302 |
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| 303 | /**
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| 304 | * Operation could not be performed because the FPGA is busy operating in FPGA
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| 305 | * Interface C API mode. Stop all the activities on the FPGA before requesting
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| 306 | * this operation.
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| 307 | */
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| 308 | static const NiFpga_Status NiFpga_Status_FpgaBusyFpgaInterfaceCApi = -61200;
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| 309 |
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| 310 | /**
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| 311 | * The chassis is in Scan Interface programming mode. In order to run FPGA VIs,
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| 312 | * you must go to the chassis properties page, select FPGA programming mode,
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| 313 | * and deploy settings.
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| 314 | */
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| 315 | static const NiFpga_Status NiFpga_Status_FpgaBusyScanInterface = -61201;
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| 316 |
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| 317 | /**
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| 318 | * Operation could not be performed because the FPGA is busy operating in FPGA
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| 319 | * Interface mode. Stop all the activities on the FPGA before requesting this
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| 320 | * operation.
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| 321 | */
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| 322 | static const NiFpga_Status NiFpga_Status_FpgaBusyFpgaInterface = -61202;
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| 323 |
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| 324 | /**
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| 325 | * Operation could not be performed because the FPGA is busy operating in
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| 326 | * Interactive mode. Stop all the activities on the FPGA before requesting this
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| 327 | * operation.
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| 328 | */
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| 329 | static const NiFpga_Status NiFpga_Status_FpgaBusyInteractive = -61203;
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| 330 |
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| 331 | /**
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| 332 | * Operation could not be performed because the FPGA is busy operating in
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| 333 | * Emulation mode. Stop all the activities on the FPGA before requesting this
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| 334 | * operation.
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| 335 | */
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| 336 | static const NiFpga_Status NiFpga_Status_FpgaBusyEmulation = -61204;
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| 337 |
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| 338 | /**
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| 339 | * An unexpected internal error occurred.
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| 340 | */
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| 341 | static const NiFpga_Status NiFpga_Status_InternalError = -61499;
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| 342 |
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| 343 | /**
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| 344 | * Access to the remote system was denied. Use MAX to check the Remote Device
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| 345 | * Access settings under Software>>NI-RIO>>NI-RIO Settings on the remote system.
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| 346 | */
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| 347 | static const NiFpga_Status NiFpga_Status_AccessDenied = -63033;
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| 348 |
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| 349 | /**
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| 350 | * A connection could not be established to the specified remote device. Ensure
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| 351 | * that the device is on and accessible over the network, that NI-RIO software
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| 352 | * is installed, and that the RIO server is running and properly configured.
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| 353 | */
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| 354 | static const NiFpga_Status NiFpga_Status_RpcConnectionError = -63040;
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| 355 |
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| 356 | /**
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| 357 | * The RPC session is invalid. The target may have reset or been rebooted. Check
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| 358 | * the network connection and retry the operation.
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| 359 | */
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| 360 | static const NiFpga_Status NiFpga_Status_RpcSessionError = -63043;
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| 361 |
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| 362 | /**
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| 363 | * A Read FIFO or Write FIFO function was called while the host had acquired
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| 364 | * elements of the FIFO. Release all acquired elements before reading or
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| 365 | * writing.
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| 366 | */
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| 367 | static const NiFpga_Status NiFpga_Status_FifoElementsCurrentlyAcquired = -63083;
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| 368 |
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| 369 | /**
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| 370 | * The bitfile could not be read.
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| 371 | */
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| 372 | static const NiFpga_Status NiFpga_Status_BitfileReadError = -63101;
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| 373 |
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| 374 | /**
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| 375 | * The specified signature does not match the signature of the bitfile. If the
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| 376 | * bitfile has been recompiled, regenerate the C API and rebuild the
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| 377 | * application.
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| 378 | */
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| 379 | static const NiFpga_Status NiFpga_Status_SignatureMismatch = -63106;
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| 380 |
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| 381 | /**
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| 382 | * Either the supplied resource name is invalid as a RIO resource name, or the
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| 383 | * device was not found. Use MAX to find the proper resource name for the
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| 384 | * intended device.
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| 385 | */
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| 386 | static const NiFpga_Status NiFpga_Status_InvalidResourceName = -63192;
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| 387 |
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| 388 | /**
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| 389 | * The requested feature is not supported.
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| 390 | */
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| 391 | static const NiFpga_Status NiFpga_Status_FeatureNotSupported = -63193;
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| 392 |
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| 393 | /**
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| 394 | * The NI-RIO software on the remote system is not compatible with the local
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| 395 | * NI-RIO software. Upgrade the NI-RIO software on the remote system.
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| 396 | */
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| 397 | static const NiFpga_Status NiFpga_Status_VersionMismatch = -63194;
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| 398 |
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| 399 | /**
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| 400 | * The session is invalid or has been closed.
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| 401 | */
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| 402 | static const NiFpga_Status NiFpga_Status_InvalidSession = -63195;
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| 403 |
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| 404 | /**
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| 405 | * The maximum number of open FPGA sessions has been reached. Close some open
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| 406 | * sessions.
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| 407 | */
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| 408 | static const NiFpga_Status NiFpga_Status_OutOfHandles = -63198;
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| 409 |
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| 410 | /**
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| 411 | * Tests whether a status is an error.
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| 412 | *
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| 413 | * @param status status to check for an error
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| 414 | * @return whether the status was an error
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| 415 | */
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| 416 | static NiFpga_Inline NiFpga_Bool NiFpga_IsError(const NiFpga_Status status)
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| 417 | {
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| 418 | return status < NiFpga_Status_Success;
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| 419 | }
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| 420 |
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| 421 | /**
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| 422 | * Tests whether a status is not an error. Success and warnings are not errors.
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| 423 | *
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| 424 | * @param status status to check for an error
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| 425 | * @return whether the status was a success or warning
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| 426 | */
|
| 427 | static NiFpga_Inline NiFpga_Bool NiFpga_IsNotError(const NiFpga_Status status)
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| 428 | {
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| 429 | return status >= NiFpga_Status_Success;
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| 430 | }
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| 431 |
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| 432 | /**
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| 433 | * Conditionally sets the status to a new value. The previous status is
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| 434 | * preserved unless the new status is more of an error, which means that
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| 435 | * warnings and errors overwrite successes, and errors overwrite warnings. New
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| 436 | * errors do not overwrite older errors, and new warnings do not overwrite
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| 437 | * older warnings.
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| 438 | *
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| 439 | * @param status status to conditionally set
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| 440 | * @param newStatus new status value that may be set
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| 441 | * @return the resulting status
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| 442 | */
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| 443 | static NiFpga_Inline NiFpga_Status NiFpga_MergeStatus(
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| 444 | NiFpga_Status* const status,
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| 445 | const NiFpga_Status newStatus)
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| 446 | {
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| 447 | if (!status)
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| 448 | {
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| 449 | return NiFpga_Status_InvalidParameter;
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| 450 | }
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| 451 | if (NiFpga_IsNotError(*status)
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| 452 | && (*status == NiFpga_Status_Success || NiFpga_IsError(newStatus)))
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| 453 | {
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| 454 | *status = newStatus;
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| 455 | }
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| 456 | return *status;
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| 457 | }
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| 458 |
|
| 459 | /**
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| 460 | * This macro evaluates the expression only if the status is not an error. The
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| 461 | * expression must evaluate to an NiFpga_Status, such as a call to any NiFpga_*
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| 462 | * function, because the status will be set to the returned status if the
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| 463 | * expression is evaluated.
|
| 464 | *
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| 465 | * You can use this macro to mimic status chaining in LabVIEW, where the status
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| 466 | * does not have to be explicitly checked after each call. Such code may look
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| 467 | * like the following example.
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| 468 | *
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| 469 | * NiFpga_Status status = NiFpga_Status_Success;
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| 470 | * NiFpga_IfIsNotError(status, NiFpga_WriteU32(...));
|
| 471 | * NiFpga_IfIsNotError(status, NiFpga_WriteU32(...));
|
| 472 | * NiFpga_IfIsNotError(status, NiFpga_WriteU32(...));
|
| 473 | *
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| 474 | * @param status status to check for an error
|
| 475 | * @param expression expression to call if the incoming status is not an error
|
| 476 | */
|
| 477 | #define NiFpga_IfIsNotError(status, expression) \
|
| 478 | if (NiFpga_IsNotError(status)) \
|
| 479 | { \
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| 480 | NiFpga_MergeStatus(&status, (expression)); \
|
| 481 | }
|
| 482 |
|
| 483 | /**
|
| 484 | * You must call this function before all other function calls. This function
|
| 485 | * loads the NiFpga library so that all the other functions will work. If this
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| 486 | * function succeeds, you must call NiFpga_Finalize after all other function
|
| 487 | * calls.
|
| 488 | *
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| 489 | * @warning This function is not thread safe.
|
| 490 | *
|
| 491 | * @return result of the call
|
| 492 | */
|
| 493 | NiFpga_Status NiFpga_Initialize(void);
|
| 494 |
|
| 495 | /**
|
| 496 | * You must call this function after all other function calls if
|
| 497 | * NiFpga_Initialize succeeds. This function unloads the NiFpga library.
|
| 498 | *
|
| 499 | * @warning This function is not thread safe.
|
| 500 | *
|
| 501 | * @return result of the call
|
| 502 | */
|
| 503 | NiFpga_Status NiFpga_Finalize(void);
|
| 504 |
|
| 505 | /**
|
| 506 | * A handle to an FPGA session.
|
| 507 | */
|
| 508 | typedef uint32_t NiFpga_Session;
|
| 509 |
|
| 510 | /**
|
| 511 | * Attributes that NiFpga_Open accepts.
|
| 512 | */
|
| 513 | typedef enum
|
| 514 | {
|
| 515 | NiFpga_OpenAttribute_NoRun = 1
|
| 516 | } NiFpga_OpenAttribute;
|
| 517 |
|
| 518 | /**
|
| 519 | * Opens a session to the FPGA. This call ensures that the contents of the
|
| 520 | * bitfile are programmed to the FPGA. The FPGA runs unless the
|
| 521 | * NiFpga_OpenAttribute_NoRun attribute is used.
|
| 522 | *
|
| 523 | * Because different operating systems have different default current working
|
| 524 | * directories for applications, you must pass an absolute path for the bitfile
|
| 525 | * parameter. If you pass only the filename instead of an absolute path, the
|
| 526 | * operating system may not be able to locate the bitfile. For example, the
|
| 527 | * default current working directories are C:\ni-rt\system\ for Phar Lap ETS and
|
| 528 | * /c/ for VxWorks. Because the generated *_Bitfile constant is a #define to a
|
| 529 | * string literal, you can use C/C++ string-literal concatenation to form an
|
| 530 | * absolute path. For example, if the bitfile is in the root directory of a
|
| 531 | * Phar Lap ETS system, pass the following for the bitfile parameter.
|
| 532 | *
|
| 533 | * "C:\\" NiFpga_MyApplication_Bitfile
|
| 534 | *
|
| 535 | * @param bitfile path to the bitfile
|
| 536 | * @param signature signature of the bitfile
|
| 537 | * @param resource RIO resource string to open ("RIO0" or "rio://mysystem/RIO")
|
| 538 | * @param attribute bitwise OR of any NiFpga_OpenAttributes, or 0
|
| 539 | * @param session outputs the session handle, which must be closed when no
|
| 540 | * longer needed
|
| 541 | * @return result of the call
|
| 542 | */
|
| 543 | NiFpga_Status NiFpga_Open(const char* bitfile,
|
| 544 | const char* signature,
|
| 545 | const char* resource,
|
| 546 | uint32_t attribute,
|
| 547 | NiFpga_Session* session);
|
| 548 |
|
| 549 | /**
|
| 550 | * Attributes that NiFpga_Close accepts.
|
| 551 | */
|
| 552 | typedef enum
|
| 553 | {
|
| 554 | NiFpga_CloseAttribute_NoResetIfLastSession = 1
|
| 555 | } NiFpga_CloseAttribute;
|
| 556 |
|
| 557 | /**
|
| 558 | * Closes the session to the FPGA. The FPGA resets unless either another session
|
| 559 | * is still open or you use the NiFpga_CloseAttribute_NoResetIfLastSession
|
| 560 | * attribute.
|
| 561 | *
|
| 562 | * @param session handle to a currently open session
|
| 563 | * @param attribute bitwise OR of any NiFpga_CloseAttributes, or 0
|
| 564 | * @return result of the call
|
| 565 | */
|
| 566 | NiFpga_Status NiFpga_Close(NiFpga_Session session,
|
| 567 | uint32_t attribute);
|
| 568 |
|
| 569 | /**
|
| 570 | * Attributes that NiFpga_Run accepts.
|
| 571 | */
|
| 572 | typedef enum
|
| 573 | {
|
| 574 | NiFpga_RunAttribute_WaitUntilDone = 1
|
| 575 | } NiFpga_RunAttribute;
|
| 576 |
|
| 577 | /**
|
| 578 | * Runs the FPGA VI on the target. If you use NiFpga_RunAttribute_WaitUntilDone,
|
| 579 | * NiFpga_Run blocks the thread until the FPGA finishes running (if ever).
|
| 580 | *
|
| 581 | * @param session handle to a currently open session
|
| 582 | * @param attribute bitwise OR of any NiFpga_RunAttributes, or 0
|
| 583 | * @return result of the call
|
| 584 | */
|
| 585 | NiFpga_Status NiFpga_Run(NiFpga_Session session,
|
| 586 | uint32_t attribute);
|
| 587 |
|
| 588 | /**
|
| 589 | * Aborts the FPGA VI.
|
| 590 | *
|
| 591 | * @param session handle to a currently open session
|
| 592 | * @return result of the call
|
| 593 | */
|
| 594 | NiFpga_Status NiFpga_Abort(NiFpga_Session session);
|
| 595 |
|
| 596 | /**
|
| 597 | * Resets the FPGA VI.
|
| 598 | *
|
| 599 | * @param session handle to a currently open session
|
| 600 | * @return result of the call
|
| 601 | */
|
| 602 | NiFpga_Status NiFpga_Reset(NiFpga_Session session);
|
| 603 |
|
| 604 | /**
|
| 605 | * Re-downloads the FPGA bitstream to the target.
|
| 606 | *
|
| 607 | * @param session handle to a currently open session
|
| 608 | * @return result of the call
|
| 609 | */
|
| 610 | NiFpga_Status NiFpga_Download(NiFpga_Session session);
|
| 611 |
|
| 612 | /**
|
| 613 | * Reads a boolean value from a given indicator or control.
|
| 614 | *
|
| 615 | * @param session handle to a currently open session
|
| 616 | * @param indicator indicator or control from which to read
|
| 617 | * @param value outputs the value that was read
|
| 618 | * @return result of the call
|
| 619 | */
|
| 620 | NiFpga_Status NiFpga_ReadBool(NiFpga_Session session,
|
| 621 | uint32_t indicator,
|
| 622 | NiFpga_Bool* value);
|
| 623 |
|
| 624 | /**
|
| 625 | * Reads a signed 8-bit integer value from a given indicator or control.
|
| 626 | *
|
| 627 | * @param session handle to a currently open session
|
| 628 | * @param indicator indicator or control from which to read
|
| 629 | * @param value outputs the value that was read
|
| 630 | * @return result of the call
|
| 631 | */
|
| 632 | NiFpga_Status NiFpga_ReadI8(NiFpga_Session session,
|
| 633 | uint32_t indicator,
|
| 634 | int8_t* value);
|
| 635 |
|
| 636 | /**
|
| 637 | * Reads an unsigned 8-bit integer value from a given indicator or control.
|
| 638 | *
|
| 639 | * @param session handle to a currently open session
|
| 640 | * @param indicator indicator or control from which to read
|
| 641 | * @param value outputs the value that was read
|
| 642 | * @return result of the call
|
| 643 | */
|
| 644 | NiFpga_Status NiFpga_ReadU8(NiFpga_Session session,
|
| 645 | uint32_t indicator,
|
| 646 | uint8_t* value);
|
| 647 |
|
| 648 | /**
|
| 649 | * Reads a signed 16-bit integer value from a given indicator or control.
|
| 650 | *
|
| 651 | * @param session handle to a currently open session
|
| 652 | * @param indicator indicator or control from which to read
|
| 653 | * @param value outputs the value that was read
|
| 654 | * @return result of the call
|
| 655 | */
|
| 656 | NiFpga_Status NiFpga_ReadI16(NiFpga_Session session,
|
| 657 | uint32_t indicator,
|
| 658 | int16_t* value);
|
| 659 |
|
| 660 | /**
|
| 661 | * Reads an unsigned 16-bit integer value from a given indicator or control.
|
| 662 | *
|
| 663 | * @param session handle to a currently open session
|
| 664 | * @param indicator indicator or control from which to read
|
| 665 | * @param value outputs the value that was read
|
| 666 | * @return result of the call
|
| 667 | */
|
| 668 | NiFpga_Status NiFpga_ReadU16(NiFpga_Session session,
|
| 669 | uint32_t indicator,
|
| 670 | uint16_t* value);
|
| 671 |
|
| 672 | /**
|
| 673 | * Reads a signed 32-bit integer value from a given indicator or control.
|
| 674 | *
|
| 675 | * @param session handle to a currently open session
|
| 676 | * @param indicator indicator or control from which to read
|
| 677 | * @param value outputs the value that was read
|
| 678 | * @return result of the call
|
| 679 | */
|
| 680 | NiFpga_Status NiFpga_ReadI32(NiFpga_Session session,
|
| 681 | uint32_t indicator,
|
| 682 | int32_t* value);
|
| 683 |
|
| 684 | /**
|
| 685 | * Reads an unsigned 32-bit integer value from a given indicator or control.
|
| 686 | *
|
| 687 | * @param session handle to a currently open session
|
| 688 | * @param indicator indicator or control from which to read
|
| 689 | * @param value outputs the value that was read
|
| 690 | * @return result of the call
|
| 691 | */
|
| 692 | NiFpga_Status NiFpga_ReadU32(NiFpga_Session session,
|
| 693 | uint32_t indicator,
|
| 694 | uint32_t* value);
|
| 695 |
|
| 696 | /**
|
| 697 | * Reads a signed 64-bit integer value from a given indicator or control.
|
| 698 | *
|
| 699 | * @param session handle to a currently open session
|
| 700 | * @param indicator indicator or control from which to read
|
| 701 | * @param value outputs the value that was read
|
| 702 | * @return result of the call
|
| 703 | */
|
| 704 | NiFpga_Status NiFpga_ReadI64(NiFpga_Session session,
|
| 705 | uint32_t indicator,
|
| 706 | int64_t* value);
|
| 707 |
|
| 708 | /**
|
| 709 | * Reads an unsigned 64-bit integer value from a given indicator or control.
|
| 710 | *
|
| 711 | * @param session handle to a currently open session
|
| 712 | * @param indicator indicator or control from which to read
|
| 713 | * @param value outputs the value that was read
|
| 714 | * @return result of the call
|
| 715 | */
|
| 716 | NiFpga_Status NiFpga_ReadU64(NiFpga_Session session,
|
| 717 | uint32_t indicator,
|
| 718 | uint64_t* value);
|
| 719 |
|
| 720 | /**
|
| 721 | * Writes a boolean value to a given control or indicator.
|
| 722 | *
|
| 723 | * @param session handle to a currently open session
|
| 724 | * @param control control or indicator to which to write
|
| 725 | * @param value value to write
|
| 726 | * @return result of the call
|
| 727 | */
|
| 728 | NiFpga_Status NiFpga_WriteBool(NiFpga_Session session,
|
| 729 | uint32_t control,
|
| 730 | NiFpga_Bool value);
|
| 731 |
|
| 732 | /**
|
| 733 | * Writes a signed 8-bit integer value to a given control or indicator.
|
| 734 | *
|
| 735 | * @param session handle to a currently open session
|
| 736 | * @param control control or indicator to which to write
|
| 737 | * @param value value to write
|
| 738 | * @return result of the call
|
| 739 | */
|
| 740 | NiFpga_Status NiFpga_WriteI8(NiFpga_Session session,
|
| 741 | uint32_t control,
|
| 742 | int8_t value);
|
| 743 |
|
| 744 | /**
|
| 745 | * Writes an unsigned 8-bit integer value to a given control or indicator.
|
| 746 | *
|
| 747 | * @param session handle to a currently open session
|
| 748 | * @param control control or indicator to which to write
|
| 749 | * @param value value to write
|
| 750 | * @return result of the call
|
| 751 | */
|
| 752 | NiFpga_Status NiFpga_WriteU8(NiFpga_Session session,
|
| 753 | uint32_t control,
|
| 754 | uint8_t value);
|
| 755 |
|
| 756 | /**
|
| 757 | * Writes a signed 16-bit integer value to a given control or indicator.
|
| 758 | *
|
| 759 | * @param session handle to a currently open session
|
| 760 | * @param control control or indicator to which to write
|
| 761 | * @param value value to write
|
| 762 | * @return result of the call
|
| 763 | */
|
| 764 | NiFpga_Status NiFpga_WriteI16(NiFpga_Session session,
|
| 765 | uint32_t control,
|
| 766 | int16_t value);
|
| 767 |
|
| 768 | /**
|
| 769 | * Writes an unsigned 16-bit integer value to a given control or indicator.
|
| 770 | *
|
| 771 | * @param session handle to a currently open session
|
| 772 | * @param control control or indicator to which to write
|
| 773 | * @param value value to write
|
| 774 | * @return result of the call
|
| 775 | */
|
| 776 | NiFpga_Status NiFpga_WriteU16(NiFpga_Session session,
|
| 777 | uint32_t control,
|
| 778 | uint16_t value);
|
| 779 |
|
| 780 | /**
|
| 781 | * Writes a signed 32-bit integer value to a given control or indicator.
|
| 782 | *
|
| 783 | * @param session handle to a currently open session
|
| 784 | * @param control control or indicator to which to write
|
| 785 | * @param value value to write
|
| 786 | * @return result of the call
|
| 787 | */
|
| 788 | NiFpga_Status NiFpga_WriteI32(NiFpga_Session session,
|
| 789 | uint32_t control,
|
| 790 | int32_t value);
|
| 791 |
|
| 792 | /**
|
| 793 | * Writes an unsigned 32-bit integer value to a given control or indicator.
|
| 794 | *
|
| 795 | * @param session handle to a currently open session
|
| 796 | * @param control control or indicator to which to write
|
| 797 | * @param value value to write
|
| 798 | * @return result of the call
|
| 799 | */
|
| 800 | NiFpga_Status NiFpga_WriteU32(NiFpga_Session session,
|
| 801 | uint32_t control,
|
| 802 | uint32_t value);
|
| 803 |
|
| 804 | /**
|
| 805 | * Writes a signed 64-bit integer value to a given control or indicator.
|
| 806 | *
|
| 807 | * @param session handle to a currently open session
|
| 808 | * @param control control or indicator to which to write
|
| 809 | * @param value value to write
|
| 810 | * @return result of the call
|
| 811 | */
|
| 812 | NiFpga_Status NiFpga_WriteI64(NiFpga_Session session,
|
| 813 | uint32_t control,
|
| 814 | int64_t value);
|
| 815 |
|
| 816 | /**
|
| 817 | * Writes an unsigned 64-bit integer value to a given control or indicator.
|
| 818 | *
|
| 819 | * @param session handle to a currently open session
|
| 820 | * @param control control or indicator to which to write
|
| 821 | * @param value value to write
|
| 822 | * @return result of the call
|
| 823 | */
|
| 824 | NiFpga_Status NiFpga_WriteU64(NiFpga_Session session,
|
| 825 | uint32_t control,
|
| 826 | uint64_t value);
|
| 827 |
|
| 828 | /**
|
| 829 | * Reads an entire array of boolean values from a given array indicator or
|
| 830 | * control.
|
| 831 | *
|
| 832 | * @warning The size passed must be the exact number of elements in the
|
| 833 | * indicator or control.
|
| 834 | *
|
| 835 | * @param session handle to a currently open session
|
| 836 | * @param indicator indicator or control from which to read
|
| 837 | * @param array outputs the entire array that was read
|
| 838 | * @param size exact number of elements in the indicator or control
|
| 839 | * @return result of the call
|
| 840 | */
|
| 841 | NiFpga_Status NiFpga_ReadArrayBool(NiFpga_Session session,
|
| 842 | uint32_t indicator,
|
| 843 | NiFpga_Bool* array,
|
| 844 | size_t size);
|
| 845 |
|
| 846 | /**
|
| 847 | * Reads an entire array of signed 8-bit integer values from a given array
|
| 848 | * indicator or control.
|
| 849 | *
|
| 850 | * @warning The size passed must be the exact number of elements in the
|
| 851 | * indicator or control.
|
| 852 | *
|
| 853 | * @param session handle to a currently open session
|
| 854 | * @param indicator indicator or control from which to read
|
| 855 | * @param array outputs the entire array that was read
|
| 856 | * @param size exact number of elements in the indicator or control
|
| 857 | * @return result of the call
|
| 858 | */
|
| 859 | NiFpga_Status NiFpga_ReadArrayI8(NiFpga_Session session,
|
| 860 | uint32_t indicator,
|
| 861 | int8_t* array,
|
| 862 | size_t size);
|
| 863 |
|
| 864 | /**
|
| 865 | * Reads an entire array of unsigned 8-bit integer values from a given array
|
| 866 | * indicator or control.
|
| 867 | *
|
| 868 | * @warning The size passed must be the exact number of elements in the
|
| 869 | * indicator or control.
|
| 870 | *
|
| 871 | * @param session handle to a currently open session
|
| 872 | * @param indicator indicator or control from which to read
|
| 873 | * @param array outputs the entire array that was read
|
| 874 | * @param size exact number of elements in the indicator or control
|
| 875 | * @return result of the call
|
| 876 | */
|
| 877 | NiFpga_Status NiFpga_ReadArrayU8(NiFpga_Session session,
|
| 878 | uint32_t indicator,
|
| 879 | uint8_t* array,
|
| 880 | size_t size);
|
| 881 |
|
| 882 | /**
|
| 883 | * Reads an entire array of signed 16-bit integer values from a given array
|
| 884 | * indicator or control.
|
| 885 | *
|
| 886 | * @warning The size passed must be the exact number of elements in the
|
| 887 | * indicator or control.
|
| 888 | *
|
| 889 | * @param session handle to a currently open session
|
| 890 | * @param indicator indicator or control from which to read
|
| 891 | * @param array outputs the entire array that was read
|
| 892 | * @param size exact number of elements in the indicator or control
|
| 893 | * @return result of the call
|
| 894 | */
|
| 895 | NiFpga_Status NiFpga_ReadArrayI16(NiFpga_Session session,
|
| 896 | uint32_t indicator,
|
| 897 | int16_t* array,
|
| 898 | size_t size);
|
| 899 |
|
| 900 | /**
|
| 901 | * Reads an entire array of unsigned 16-bit integer values from a given array
|
| 902 | * indicator or control.
|
| 903 | *
|
| 904 | * @warning The size passed must be the exact number of elements in the
|
| 905 | * indicator or control.
|
| 906 | *
|
| 907 | * @param session handle to a currently open session
|
| 908 | * @param indicator indicator or control from which to read
|
| 909 | * @param array outputs the entire array that was read
|
| 910 | * @param size exact number of elements in the indicator or control
|
| 911 | * @return result of the call
|
| 912 | */
|
| 913 | NiFpga_Status NiFpga_ReadArrayU16(NiFpga_Session session,
|
| 914 | uint32_t indicator,
|
| 915 | uint16_t* array,
|
| 916 | size_t size);
|
| 917 |
|
| 918 | /**
|
| 919 | * Reads an entire array of signed 32-bit integer values from a given array
|
| 920 | * indicator or control.
|
| 921 | *
|
| 922 | * @warning The size passed must be the exact number of elements in the
|
| 923 | * indicator or control.
|
| 924 | *
|
| 925 | * @param session handle to a currently open session
|
| 926 | * @param indicator indicator or control from which to read
|
| 927 | * @param array outputs the entire array that was read
|
| 928 | * @param size exact number of elements in the indicator or control
|
| 929 | * @return result of the call
|
| 930 | */
|
| 931 | NiFpga_Status NiFpga_ReadArrayI32(NiFpga_Session session,
|
| 932 | uint32_t indicator,
|
| 933 | int32_t* array,
|
| 934 | size_t size);
|
| 935 |
|
| 936 | /**
|
| 937 | * Reads an entire array of unsigned 32-bit integer values from a given array
|
| 938 | * indicator or control.
|
| 939 | *
|
| 940 | * @warning The size passed must be the exact number of elements in the
|
| 941 | * indicator or control.
|
| 942 | *
|
| 943 | * @param session handle to a currently open session
|
| 944 | * @param indicator indicator or control from which to read
|
| 945 | * @param array outputs the entire array that was read
|
| 946 | * @param size exact number of elements in the indicator or control
|
| 947 | * @return result of the call
|
| 948 | */
|
| 949 | NiFpga_Status NiFpga_ReadArrayU32(NiFpga_Session session,
|
| 950 | uint32_t indicator,
|
| 951 | uint32_t* array,
|
| 952 | size_t size);
|
| 953 |
|
| 954 | /**
|
| 955 | * Reads an entire array of signed 64-bit integer values from a given array
|
| 956 | * indicator or control.
|
| 957 | *
|
| 958 | * @warning The size passed must be the exact number of elements in the
|
| 959 | * indicator or control.
|
| 960 | *
|
| 961 | * @param session handle to a currently open session
|
| 962 | * @param indicator indicator or control from which to read
|
| 963 | * @param array outputs the entire array that was read
|
| 964 | * @param size exact number of elements in the indicator or control
|
| 965 | * @return result of the call
|
| 966 | */
|
| 967 | NiFpga_Status NiFpga_ReadArrayI64(NiFpga_Session session,
|
| 968 | uint32_t indicator,
|
| 969 | int64_t* array,
|
| 970 | size_t size);
|
| 971 |
|
| 972 | /**
|
| 973 | * Reads an entire array of unsigned 64-bit integer values from a given array
|
| 974 | * indicator or control.
|
| 975 | *
|
| 976 | * @warning The size passed must be the exact number of elements in the
|
| 977 | * indicator or control.
|
| 978 | *
|
| 979 | * @param session handle to a currently open session
|
| 980 | * @param indicator indicator or control from which to read
|
| 981 | * @param array outputs the entire array that was read
|
| 982 | * @param size exact number of elements in the indicator or control
|
| 983 | * @return result of the call
|
| 984 | */
|
| 985 | NiFpga_Status NiFpga_ReadArrayU64(NiFpga_Session session,
|
| 986 | uint32_t indicator,
|
| 987 | uint64_t* array,
|
| 988 | size_t size);
|
| 989 |
|
| 990 | /**
|
| 991 | * Writes an entire array of boolean values to a given array control or
|
| 992 | * indicator.
|
| 993 | *
|
| 994 | * @warning The size passed must be the exact number of elements in the
|
| 995 | * control or indicator.
|
| 996 | *
|
| 997 | * @param session handle to a currently open session
|
| 998 | * @param control control or indicator to which to write
|
| 999 | * @param array entire array to write
|
| 1000 | * @param size exact number of elements in the control or indicator
|
| 1001 | * @return result of the call
|
| 1002 | */
|
| 1003 | NiFpga_Status NiFpga_WriteArrayBool(NiFpga_Session session,
|
| 1004 | uint32_t control,
|
| 1005 | const NiFpga_Bool* array,
|
| 1006 | size_t size);
|
| 1007 |
|
| 1008 | /**
|
| 1009 | * Writes an entire array of signed 8-bit integer values to a given array
|
| 1010 | * control or indicator.
|
| 1011 | *
|
| 1012 | * @warning The size passed must be the exact number of elements in the
|
| 1013 | * control or indicator.
|
| 1014 | *
|
| 1015 | * @param session handle to a currently open session
|
| 1016 | * @param control control or indicator to which to write
|
| 1017 | * @param array entire array to write
|
| 1018 | * @param size exact number of elements in the control or indicator
|
| 1019 | * @return result of the call
|
| 1020 | */
|
| 1021 | NiFpga_Status NiFpga_WriteArrayI8(NiFpga_Session session,
|
| 1022 | uint32_t control,
|
| 1023 | const int8_t* array,
|
| 1024 | size_t size);
|
| 1025 |
|
| 1026 | /**
|
| 1027 | * Writes an entire array of unsigned 8-bit integer values to a given array
|
| 1028 | * control or indicator.
|
| 1029 | *
|
| 1030 | * @warning The size passed must be the exact number of elements in the
|
| 1031 | * control or indicator.
|
| 1032 | *
|
| 1033 | * @param session handle to a currently open session
|
| 1034 | * @param control control or indicator to which to write
|
| 1035 | * @param array entire array to write
|
| 1036 | * @param size exact number of elements in the control or indicator
|
| 1037 | * @return result of the call
|
| 1038 | */
|
| 1039 | NiFpga_Status NiFpga_WriteArrayU8(NiFpga_Session session,
|
| 1040 | uint32_t control,
|
| 1041 | const uint8_t* array,
|
| 1042 | size_t size);
|
| 1043 |
|
| 1044 | /**
|
| 1045 | * Writes an entire array of signed 16-bit integer values to a given array
|
| 1046 | * control or indicator.
|
| 1047 | *
|
| 1048 | * @warning The size passed must be the exact number of elements in the
|
| 1049 | * control or indicator.
|
| 1050 | *
|
| 1051 | * @param session handle to a currently open session
|
| 1052 | * @param control control or indicator to which to write
|
| 1053 | * @param array entire array to write
|
| 1054 | * @param size exact number of elements in the control or indicator
|
| 1055 | * @return result of the call
|
| 1056 | */
|
| 1057 | NiFpga_Status NiFpga_WriteArrayI16(NiFpga_Session session,
|
| 1058 | uint32_t control,
|
| 1059 | const int16_t* array,
|
| 1060 | size_t size);
|
| 1061 |
|
| 1062 | /**
|
| 1063 | * Writes an entire array of unsigned 16-bit integer values to a given array
|
| 1064 | * control or indicator.
|
| 1065 | *
|
| 1066 | * @warning The size passed must be the exact number of elements in the
|
| 1067 | * control or indicator.
|
| 1068 | *
|
| 1069 | * @param session handle to a currently open session
|
| 1070 | * @param control control or indicator to which to write
|
| 1071 | * @param array entire array to write
|
| 1072 | * @param size exact number of elements in the control or indicator
|
| 1073 | * @return result of the call
|
| 1074 | */
|
| 1075 | NiFpga_Status NiFpga_WriteArrayU16(NiFpga_Session session,
|
| 1076 | uint32_t control,
|
| 1077 | const uint16_t* array,
|
| 1078 | size_t size);
|
| 1079 |
|
| 1080 | /**
|
| 1081 | * Writes an entire array of signed 32-bit integer values to a given array
|
| 1082 | * control or indicator.
|
| 1083 | *
|
| 1084 | * @warning The size passed must be the exact number of elements in the
|
| 1085 | * control or indicator.
|
| 1086 | *
|
| 1087 | * @param session handle to a currently open session
|
| 1088 | * @param control control or indicator to which to write
|
| 1089 | * @param array entire array to write
|
| 1090 | * @param size exact number of elements in the control or indicator
|
| 1091 | * @return result of the call
|
| 1092 | */
|
| 1093 | NiFpga_Status NiFpga_WriteArrayI32(NiFpga_Session session,
|
| 1094 | uint32_t control,
|
| 1095 | const int32_t* array,
|
| 1096 | size_t size);
|
| 1097 |
|
| 1098 | /**
|
| 1099 | * Writes an entire array of unsigned 32-bit integer values to a given array
|
| 1100 | * control or indicator.
|
| 1101 | *
|
| 1102 | * @warning The size passed must be the exact number of elements in the
|
| 1103 | * control or indicator.
|
| 1104 | *
|
| 1105 | * @param session handle to a currently open session
|
| 1106 | * @param control control or indicator to which to write
|
| 1107 | * @param array entire array to write
|
| 1108 | * @param size exact number of elements in the control or indicator
|
| 1109 | * @return result of the call
|
| 1110 | */
|
| 1111 | NiFpga_Status NiFpga_WriteArrayU32(NiFpga_Session session,
|
| 1112 | uint32_t control,
|
| 1113 | const uint32_t* array,
|
| 1114 | size_t size);
|
| 1115 |
|
| 1116 | /**
|
| 1117 | * Writes an entire array of signed 64-bit integer values to a given array
|
| 1118 | * control or indicator.
|
| 1119 | *
|
| 1120 | * @warning The size passed must be the exact number of elements in the
|
| 1121 | * control or indicator.
|
| 1122 | *
|
| 1123 | * @param session handle to a currently open session
|
| 1124 | * @param control control or indicator to which to write
|
| 1125 | * @param array entire array to write
|
| 1126 | * @param size exact number of elements in the control or indicator
|
| 1127 | * @return result of the call
|
| 1128 | */
|
| 1129 | NiFpga_Status NiFpga_WriteArrayI64(NiFpga_Session session,
|
| 1130 | uint32_t control,
|
| 1131 | const int64_t* array,
|
| 1132 | size_t size);
|
| 1133 |
|
| 1134 | /**
|
| 1135 | * Writes an entire array of unsigned 64-bit integer values to a given array
|
| 1136 | * control or indicator.
|
| 1137 | *
|
| 1138 | * @warning The size passed must be the exact number of elements in the
|
| 1139 | * control or indicator.
|
| 1140 | *
|
| 1141 | * @param session handle to a currently open session
|
| 1142 | * @param control control or indicator to which to write
|
| 1143 | * @param array entire array to write
|
| 1144 | * @param size exact number of elements in the control or indicator
|
| 1145 | * @return result of the call
|
| 1146 | */
|
| 1147 | NiFpga_Status NiFpga_WriteArrayU64(NiFpga_Session session,
|
| 1148 | uint32_t control,
|
| 1149 | const uint64_t* array,
|
| 1150 | size_t size);
|
| 1151 |
|
| 1152 | /**
|
| 1153 | * Enumeration of all 32 possible IRQs. Multiple IRQs can be bitwise ORed
|
| 1154 | * together like this:
|
| 1155 | *
|
| 1156 | * NiFpga_Irq_3 | NiFpga_Irq_23
|
| 1157 | */
|
| 1158 | typedef enum
|
| 1159 | {
|
| 1160 | NiFpga_Irq_0 = 1 << 0,
|
| 1161 | NiFpga_Irq_1 = 1 << 1,
|
| 1162 | NiFpga_Irq_2 = 1 << 2,
|
| 1163 | NiFpga_Irq_3 = 1 << 3,
|
| 1164 | NiFpga_Irq_4 = 1 << 4,
|
| 1165 | NiFpga_Irq_5 = 1 << 5,
|
| 1166 | NiFpga_Irq_6 = 1 << 6,
|
| 1167 | NiFpga_Irq_7 = 1 << 7,
|
| 1168 | NiFpga_Irq_8 = 1 << 8,
|
| 1169 | NiFpga_Irq_9 = 1 << 9,
|
| 1170 | NiFpga_Irq_10 = 1 << 10,
|
| 1171 | NiFpga_Irq_11 = 1 << 11,
|
| 1172 | NiFpga_Irq_12 = 1 << 12,
|
| 1173 | NiFpga_Irq_13 = 1 << 13,
|
| 1174 | NiFpga_Irq_14 = 1 << 14,
|
| 1175 | NiFpga_Irq_15 = 1 << 15,
|
| 1176 | NiFpga_Irq_16 = 1 << 16,
|
| 1177 | NiFpga_Irq_17 = 1 << 17,
|
| 1178 | NiFpga_Irq_18 = 1 << 18,
|
| 1179 | NiFpga_Irq_19 = 1 << 19,
|
| 1180 | NiFpga_Irq_20 = 1 << 20,
|
| 1181 | NiFpga_Irq_21 = 1 << 21,
|
| 1182 | NiFpga_Irq_22 = 1 << 22,
|
| 1183 | NiFpga_Irq_23 = 1 << 23,
|
| 1184 | NiFpga_Irq_24 = 1 << 24,
|
| 1185 | NiFpga_Irq_25 = 1 << 25,
|
| 1186 | NiFpga_Irq_26 = 1 << 26,
|
| 1187 | NiFpga_Irq_27 = 1 << 27,
|
| 1188 | NiFpga_Irq_28 = 1 << 28,
|
| 1189 | NiFpga_Irq_29 = 1 << 29,
|
| 1190 | NiFpga_Irq_30 = 1 << 30,
|
| 1191 | NiFpga_Irq_31 = 1U << 31
|
| 1192 | } NiFpga_Irq;
|
| 1193 |
|
| 1194 | /**
|
| 1195 | * Represents an infinite timeout.
|
| 1196 | */
|
| 1197 | static const uint32_t NiFpga_InfiniteTimeout = 0xFFFFFFFF;
|
| 1198 |
|
| 1199 | /**
|
| 1200 | * See NiFpga_ReserveIrqContext for more information.
|
| 1201 | */
|
| 1202 | typedef void* NiFpga_IrqContext;
|
| 1203 |
|
| 1204 | /**
|
| 1205 | * IRQ contexts are single-threaded; only one thread can wait with a particular
|
| 1206 | * context at any given time. Clients must reserve as many contexts as the
|
| 1207 | * application requires.
|
| 1208 | *
|
| 1209 | * If a context is successfully reserved (the returned status is not an error),
|
| 1210 | * it must be unreserved later. Otherwise a memory leak will occur.
|
| 1211 | *
|
| 1212 | * @param session handle to a currently open session
|
| 1213 | * @param context outputs the IRQ context
|
| 1214 | * @return result of the call
|
| 1215 | */
|
| 1216 | NiFpga_Status NiFpga_ReserveIrqContext(NiFpga_Session session,
|
| 1217 | NiFpga_IrqContext* context);
|
| 1218 |
|
| 1219 | /**
|
| 1220 | * Unreserves an IRQ context obtained from NiFpga_ReserveIrqContext.
|
| 1221 | *
|
| 1222 | * @param session handle to a currently open session
|
| 1223 | * @param context IRQ context to unreserve
|
| 1224 | * @return result of the call
|
| 1225 | */
|
| 1226 | NiFpga_Status NiFpga_UnreserveIrqContext(NiFpga_Session session,
|
| 1227 | NiFpga_IrqContext context);
|
| 1228 |
|
| 1229 | /**
|
| 1230 | * This is a blocking function that stops the calling thread until the FPGA
|
| 1231 | * asserts any IRQ in the irqs parameter, or until the function call times out.
|
| 1232 | * Before calling this function, you must use NiFpga_ReserveIrqContext to
|
| 1233 | * reserve an IRQ context. No other threads can use the same context when this
|
| 1234 | * function is called.
|
| 1235 | *
|
| 1236 | * You can use the irqsAsserted parameter to determine which IRQs were asserted
|
| 1237 | * for each function call.
|
| 1238 | *
|
| 1239 | * @param session handle to a currently open session
|
| 1240 | * @param context IRQ context with which to wait
|
| 1241 | * @param irqs bitwise OR of NiFpga_Irqs
|
| 1242 | * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout
|
| 1243 | * @param irqsAsserted if non-NULL, outputs bitwise OR of IRQs that were
|
| 1244 | * asserted
|
| 1245 | * @param timedOut if non-NULL, outputs whether the timeout expired
|
| 1246 | * @return result of the call
|
| 1247 | */
|
| 1248 | NiFpga_Status NiFpga_WaitOnIrqs(NiFpga_Session session,
|
| 1249 | NiFpga_IrqContext context,
|
| 1250 | uint32_t irqs,
|
| 1251 | uint32_t timeout,
|
| 1252 | uint32_t* irqsAsserted,
|
| 1253 | NiFpga_Bool* timedOut);
|
| 1254 |
|
| 1255 | /**
|
| 1256 | * Acknowledges an IRQ or set of IRQs.
|
| 1257 | *
|
| 1258 | * @param session handle to a currently open session
|
| 1259 | * @param irqs bitwise OR of NiFpga_Irqs
|
| 1260 | * @return result of the call
|
| 1261 | */
|
| 1262 | NiFpga_Status NiFpga_AcknowledgeIrqs(NiFpga_Session session,
|
| 1263 | uint32_t irqs);
|
| 1264 |
|
| 1265 | /**
|
| 1266 | * Specifies the depth of the host memory part of the DMA FIFO. This method is
|
| 1267 | * optional. In order to see the actual depth configured, use
|
| 1268 | * NiFpga_ConfigureFifo2.
|
| 1269 | *
|
| 1270 | * @param session handle to a currently open session
|
| 1271 | * @param fifo FIFO to configure
|
| 1272 | * @param depth requested number of elements in the host memory part of the
|
| 1273 | * DMA FIFO
|
| 1274 | * @return result of the call
|
| 1275 | */
|
| 1276 | NiFpga_Status NiFpga_ConfigureFifo(NiFpga_Session session,
|
| 1277 | uint32_t fifo,
|
| 1278 | size_t depth);
|
| 1279 |
|
| 1280 | /**
|
| 1281 | * Specifies the depth of the host memory part of the DMA FIFO. This method is
|
| 1282 | * optional.
|
| 1283 | *
|
| 1284 | * @param session handle to a currently open session
|
| 1285 | * @param fifo FIFO to configure
|
| 1286 | * @param requestedDepth requested number of elements in the host memory part
|
| 1287 | * of the DMA FIFO
|
| 1288 | * @param actualDepth if non-NULL, outputs the actual number of elements in the
|
| 1289 | * host memory part of the DMA FIFO, which may be more than
|
| 1290 | * the requested number
|
| 1291 | * @return result of the call
|
| 1292 | */
|
| 1293 | NiFpga_Status NiFpga_ConfigureFifo2(NiFpga_Session session,
|
| 1294 | uint32_t fifo,
|
| 1295 | size_t requestedDepth,
|
| 1296 | size_t* actualDepth);
|
| 1297 | /**
|
| 1298 | * Starts a FIFO. This method is optional.
|
| 1299 | *
|
| 1300 | * @param session handle to a currently open session
|
| 1301 | * @param fifo FIFO to start
|
| 1302 | * @return result of the call
|
| 1303 | */
|
| 1304 | NiFpga_Status NiFpga_StartFifo(NiFpga_Session session,
|
| 1305 | uint32_t fifo);
|
| 1306 |
|
| 1307 | /**
|
| 1308 | * Stops a FIFO. This method is optional.
|
| 1309 | *
|
| 1310 | * @param session handle to a currently open session
|
| 1311 | * @param fifo FIFO to stop
|
| 1312 | * @return result of the call
|
| 1313 | */
|
| 1314 | NiFpga_Status NiFpga_StopFifo(NiFpga_Session session,
|
| 1315 | uint32_t fifo);
|
| 1316 |
|
| 1317 | /**
|
| 1318 | * Reads from a target-to-host FIFO of booleans.
|
| 1319 | *
|
| 1320 | * @param session handle to a currently open session
|
| 1321 | * @param fifo target-to-host FIFO from which to read
|
| 1322 | * @param data outputs the data that was read
|
| 1323 | * @param numberOfElements number of elements to read
|
| 1324 | * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout
|
| 1325 | * @param elementsRemaining if non-NULL, outputs the number of elements
|
| 1326 | * remaining in the host memory part of the DMA FIFO
|
| 1327 | * @return result of the call
|
| 1328 | */
|
| 1329 | NiFpga_Status NiFpga_ReadFifoBool(NiFpga_Session session,
|
| 1330 | uint32_t fifo,
|
| 1331 | NiFpga_Bool* data,
|
| 1332 | size_t numberOfElements,
|
| 1333 | uint32_t timeout,
|
| 1334 | size_t* elementsRemaining);
|
| 1335 |
|
| 1336 | /**
|
| 1337 | * Reads from a target-to-host FIFO of signed 8-bit integers.
|
| 1338 | *
|
| 1339 | * @param session handle to a currently open session
|
| 1340 | * @param fifo target-to-host FIFO from which to read
|
| 1341 | * @param data outputs the data that was read
|
| 1342 | * @param numberOfElements number of elements to read
|
| 1343 | * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout
|
| 1344 | * @param elementsRemaining if non-NULL, outputs the number of elements
|
| 1345 | * remaining in the host memory part of the DMA FIFO
|
| 1346 | * @return result of the call
|
| 1347 | */
|
| 1348 | NiFpga_Status NiFpga_ReadFifoI8(NiFpga_Session session,
|
| 1349 | uint32_t fifo,
|
| 1350 | int8_t* data,
|
| 1351 | size_t numberOfElements,
|
| 1352 | uint32_t timeout,
|
| 1353 | size_t* elementsRemaining);
|
| 1354 |
|
| 1355 | /**
|
| 1356 | * Reads from a target-to-host FIFO of unsigned 8-bit integers.
|
| 1357 | *
|
| 1358 | * @param session handle to a currently open session
|
| 1359 | * @param fifo target-to-host FIFO from which to read
|
| 1360 | * @param data outputs the data that was read
|
| 1361 | * @param numberOfElements number of elements to read
|
| 1362 | * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout
|
| 1363 | * @param elementsRemaining if non-NULL, outputs the number of elements
|
| 1364 | * remaining in the host memory part of the DMA FIFO
|
| 1365 | * @return result of the call
|
| 1366 | */
|
| 1367 | NiFpga_Status NiFpga_ReadFifoU8(NiFpga_Session session,
|
| 1368 | uint32_t fifo,
|
| 1369 | uint8_t* data,
|
| 1370 | size_t numberOfElements,
|
| 1371 | uint32_t timeout,
|
| 1372 | size_t* elementsRemaining);
|
| 1373 |
|
| 1374 | /**
|
| 1375 | * Reads from a target-to-host FIFO of signed 16-bit integers.
|
| 1376 | *
|
| 1377 | * @param session handle to a currently open session
|
| 1378 | * @param fifo target-to-host FIFO from which to read
|
| 1379 | * @param data outputs the data that was read
|
| 1380 | * @param numberOfElements number of elements to read
|
| 1381 | * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout
|
| 1382 | * @param elementsRemaining if non-NULL, outputs the number of elements
|
| 1383 | * remaining in the host memory part of the DMA FIFO
|
| 1384 | * @return result of the call
|
| 1385 | */
|
| 1386 | NiFpga_Status NiFpga_ReadFifoI16(NiFpga_Session session,
|
| 1387 | uint32_t fifo,
|
| 1388 | int16_t* data,
|
| 1389 | size_t numberOfElements,
|
| 1390 | uint32_t timeout,
|
| 1391 | size_t* elementsRemaining);
|
| 1392 |
|
| 1393 | /**
|
| 1394 | * Reads from a target-to-host FIFO of unsigned 16-bit integers.
|
| 1395 | *
|
| 1396 | * @param session handle to a currently open session
|
| 1397 | * @param fifo target-to-host FIFO from which to read
|
| 1398 | * @param data outputs the data that was read
|
| 1399 | * @param numberOfElements number of elements to read
|
| 1400 | * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout
|
| 1401 | * @param elementsRemaining if non-NULL, outputs the number of elements
|
| 1402 | * remaining in the host memory part of the DMA FIFO
|
| 1403 | * @return result of the call
|
| 1404 | */
|
| 1405 | NiFpga_Status NiFpga_ReadFifoU16(NiFpga_Session session,
|
| 1406 | uint32_t fifo,
|
| 1407 | uint16_t* data,
|
| 1408 | size_t numberOfElements,
|
| 1409 | uint32_t timeout,
|
| 1410 | size_t* elementsRemaining);
|
| 1411 |
|
| 1412 | /**
|
| 1413 | * Reads from a target-to-host FIFO of signed 32-bit integers.
|
| 1414 | *
|
| 1415 | * @param session handle to a currently open session
|
| 1416 | * @param fifo target-to-host FIFO from which to read
|
| 1417 | * @param data outputs the data that was read
|
| 1418 | * @param numberOfElements number of elements to read
|
| 1419 | * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout
|
| 1420 | * @param elementsRemaining if non-NULL, outputs the number of elements
|
| 1421 | * remaining in the host memory part of the DMA FIFO
|
| 1422 | * @return result of the call
|
| 1423 | */
|
| 1424 | NiFpga_Status NiFpga_ReadFifoI32(NiFpga_Session session,
|
| 1425 | uint32_t fifo,
|
| 1426 | int32_t* data,
|
| 1427 | size_t numberOfElements,
|
| 1428 | uint32_t timeout,
|
| 1429 | size_t* elementsRemaining);
|
| 1430 |
|
| 1431 | /**
|
| 1432 | * Reads from a target-to-host FIFO of unsigned 32-bit integers.
|
| 1433 | *
|
| 1434 | * @param session handle to a currently open session
|
| 1435 | * @param fifo target-to-host FIFO from which to read
|
| 1436 | * @param data outputs the data that was read
|
| 1437 | * @param numberOfElements number of elements to read
|
| 1438 | * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout
|
| 1439 | * @param elementsRemaining if non-NULL, outputs the number of elements
|
| 1440 | * remaining in the host memory part of the DMA FIFO
|
| 1441 | * @return result of the call
|
| 1442 | */
|
| 1443 | NiFpga_Status NiFpga_ReadFifoU32(NiFpga_Session session,
|
| 1444 | uint32_t fifo,
|
| 1445 | uint32_t* data,
|
| 1446 | size_t numberOfElements,
|
| 1447 | uint32_t timeout,
|
| 1448 | size_t* elementsRemaining);
|
| 1449 |
|
| 1450 | /**
|
| 1451 | * Reads from a target-to-host FIFO of signed 64-bit integers.
|
| 1452 | *
|
| 1453 | * @param session handle to a currently open session
|
| 1454 | * @param fifo target-to-host FIFO from which to read
|
| 1455 | * @param data outputs the data that was read
|
| 1456 | * @param numberOfElements number of elements to read
|
| 1457 | * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout
|
| 1458 | * @param elementsRemaining if non-NULL, outputs the number of elements
|
| 1459 | * remaining in the host memory part of the DMA FIFO
|
| 1460 | * @return result of the call
|
| 1461 | */
|
| 1462 | NiFpga_Status NiFpga_ReadFifoI64(NiFpga_Session session,
|
| 1463 | uint32_t fifo,
|
| 1464 | int64_t* data,
|
| 1465 | size_t numberOfElements,
|
| 1466 | uint32_t timeout,
|
| 1467 | size_t* elementsRemaining);
|
| 1468 |
|
| 1469 | /**
|
| 1470 | * Reads from a target-to-host FIFO of unsigned 64-bit integers.
|
| 1471 | *
|
| 1472 | * @param session handle to a currently open session
|
| 1473 | * @param fifo target-to-host FIFO from which to read
|
| 1474 | * @param data outputs the data that was read
|
| 1475 | * @param numberOfElements number of elements to read
|
| 1476 | * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout
|
| 1477 | * @param elementsRemaining if non-NULL, outputs the number of elements
|
| 1478 | * remaining in the host memory part of the DMA FIFO
|
| 1479 | * @return result of the call
|
| 1480 | */
|
| 1481 | NiFpga_Status NiFpga_ReadFifoU64(NiFpga_Session session,
|
| 1482 | uint32_t fifo,
|
| 1483 | uint64_t* data,
|
| 1484 | size_t numberOfElements,
|
| 1485 | uint32_t timeout,
|
| 1486 | size_t* elementsRemaining);
|
| 1487 |
|
| 1488 | /**
|
| 1489 | * Writes to a host-to-target FIFO of booleans.
|
| 1490 | *
|
| 1491 | * @param session handle to a currently open session
|
| 1492 | * @param fifo host-to-target FIFO to which to write
|
| 1493 | * @param data data to write
|
| 1494 | * @param numberOfElements number of elements to write
|
| 1495 | * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout
|
| 1496 | * @param emptyElementsRemaining if non-NULL, outputs the number of empty
|
| 1497 | * elements remaining in the host memory part of
|
| 1498 | * the DMA FIFO
|
| 1499 | * @return result of the call
|
| 1500 | */
|
| 1501 | NiFpga_Status NiFpga_WriteFifoBool(NiFpga_Session session,
|
| 1502 | uint32_t fifo,
|
| 1503 | const NiFpga_Bool* data,
|
| 1504 | size_t numberOfElements,
|
| 1505 | uint32_t timeout,
|
| 1506 | size_t* emptyElementsRemaining);
|
| 1507 |
|
| 1508 | /**
|
| 1509 | * Writes to a host-to-target FIFO of signed 8-bit integers.
|
| 1510 | *
|
| 1511 | * @param session handle to a currently open session
|
| 1512 | * @param fifo host-to-target FIFO to which to write
|
| 1513 | * @param data data to write
|
| 1514 | * @param numberOfElements number of elements to write
|
| 1515 | * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout
|
| 1516 | * @param emptyElementsRemaining if non-NULL, outputs the number of empty
|
| 1517 | * elements remaining in the host memory part of
|
| 1518 | * the DMA FIFO
|
| 1519 | * @return result of the call
|
| 1520 | */
|
| 1521 | NiFpga_Status NiFpga_WriteFifoI8(NiFpga_Session session,
|
| 1522 | uint32_t fifo,
|
| 1523 | const int8_t* data,
|
| 1524 | size_t numberOfElements,
|
| 1525 | uint32_t timeout,
|
| 1526 | size_t* emptyElementsRemaining);
|
| 1527 |
|
| 1528 | /**
|
| 1529 | * Writes to a host-to-target FIFO of unsigned 8-bit integers.
|
| 1530 | *
|
| 1531 | * @param session handle to a currently open session
|
| 1532 | * @param fifo host-to-target FIFO to which to write
|
| 1533 | * @param data data to write
|
| 1534 | * @param numberOfElements number of elements to write
|
| 1535 | * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout
|
| 1536 | * @param emptyElementsRemaining if non-NULL, outputs the number of empty
|
| 1537 | * elements remaining in the host memory part of
|
| 1538 | * the DMA FIFO
|
| 1539 | * @return result of the call
|
| 1540 | */
|
| 1541 | NiFpga_Status NiFpga_WriteFifoU8(NiFpga_Session session,
|
| 1542 | uint32_t fifo,
|
| 1543 | const uint8_t* data,
|
| 1544 | size_t numberOfElements,
|
| 1545 | uint32_t timeout,
|
| 1546 | size_t* emptyElementsRemaining);
|
| 1547 |
|
| 1548 | /**
|
| 1549 | * Writes to a host-to-target FIFO of signed 16-bit integers.
|
| 1550 | *
|
| 1551 | * @param session handle to a currently open session
|
| 1552 | * @param fifo host-to-target FIFO to which to write
|
| 1553 | * @param data data to write
|
| 1554 | * @param numberOfElements number of elements to write
|
| 1555 | * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout
|
| 1556 | * @param emptyElementsRemaining if non-NULL, outputs the number of empty
|
| 1557 | * elements remaining in the host memory part of
|
| 1558 | * the DMA FIFO
|
| 1559 | * @return result of the call
|
| 1560 | */
|
| 1561 | NiFpga_Status NiFpga_WriteFifoI16(NiFpga_Session session,
|
| 1562 | uint32_t fifo,
|
| 1563 | const int16_t* data,
|
| 1564 | size_t numberOfElements,
|
| 1565 | uint32_t timeout,
|
| 1566 | size_t* emptyElementsRemaining);
|
| 1567 |
|
| 1568 | /**
|
| 1569 | * Writes to a host-to-target FIFO of unsigned 16-bit integers.
|
| 1570 | *
|
| 1571 | * @param session handle to a currently open session
|
| 1572 | * @param fifo host-to-target FIFO to which to write
|
| 1573 | * @param data data to write
|
| 1574 | * @param numberOfElements number of elements to write
|
| 1575 | * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout
|
| 1576 | * @param emptyElementsRemaining if non-NULL, outputs the number of empty
|
| 1577 | * elements remaining in the host memory part of
|
| 1578 | * the DMA FIFO
|
| 1579 | * @return result of the call
|
| 1580 | */
|
| 1581 | NiFpga_Status NiFpga_WriteFifoU16(NiFpga_Session session,
|
| 1582 | uint32_t fifo,
|
| 1583 | const uint16_t* data,
|
| 1584 | size_t numberOfElements,
|
| 1585 | uint32_t timeout,
|
| 1586 | size_t* emptyElementsRemaining);
|
| 1587 |
|
| 1588 | /**
|
| 1589 | * Writes to a host-to-target FIFO of signed 32-bit integers.
|
| 1590 | *
|
| 1591 | * @param session handle to a currently open session
|
| 1592 | * @param fifo host-to-target FIFO to which to write
|
| 1593 | * @param data data to write
|
| 1594 | * @param numberOfElements number of elements to write
|
| 1595 | * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout
|
| 1596 | * @param emptyElementsRemaining if non-NULL, outputs the number of empty
|
| 1597 | * elements remaining in the host memory part of
|
| 1598 | * the DMA FIFO
|
| 1599 | * @return result of the call
|
| 1600 | */
|
| 1601 | NiFpga_Status NiFpga_WriteFifoI32(NiFpga_Session session,
|
| 1602 | uint32_t fifo,
|
| 1603 | const int32_t* data,
|
| 1604 | size_t numberOfElements,
|
| 1605 | uint32_t timeout,
|
| 1606 | size_t* emptyElementsRemaining);
|
| 1607 |
|
| 1608 | /**
|
| 1609 | * Writes to a host-to-target FIFO of unsigned 32-bit integers.
|
| 1610 | *
|
| 1611 | * @param session handle to a currently open session
|
| 1612 | * @param fifo host-to-target FIFO to which to write
|
| 1613 | * @param data data to write
|
| 1614 | * @param numberOfElements number of elements to write
|
| 1615 | * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout
|
| 1616 | * @param emptyElementsRemaining if non-NULL, outputs the number of empty
|
| 1617 | * elements remaining in the host memory part of
|
| 1618 | * the DMA FIFO
|
| 1619 | * @return result of the call
|
| 1620 | */
|
| 1621 | NiFpga_Status NiFpga_WriteFifoU32(NiFpga_Session session,
|
| 1622 | uint32_t fifo,
|
| 1623 | const uint32_t* data,
|
| 1624 | size_t numberOfElements,
|
| 1625 | uint32_t timeout,
|
| 1626 | size_t* emptyElementsRemaining);
|
| 1627 |
|
| 1628 | /**
|
| 1629 | * Writes to a host-to-target FIFO of signed 64-bit integers.
|
| 1630 | *
|
| 1631 | * @param session handle to a currently open session
|
| 1632 | * @param fifo host-to-target FIFO to which to write
|
| 1633 | * @param data data to write
|
| 1634 | * @param numberOfElements number of elements to write
|
| 1635 | * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout
|
| 1636 | * @param emptyElementsRemaining if non-NULL, outputs the number of empty
|
| 1637 | * elements remaining in the host memory part of
|
| 1638 | * the DMA FIFO
|
| 1639 | * @return result of the call
|
| 1640 | */
|
| 1641 | NiFpga_Status NiFpga_WriteFifoI64(NiFpga_Session session,
|
| 1642 | uint32_t fifo,
|
| 1643 | const int64_t* data,
|
| 1644 | size_t numberOfElements,
|
| 1645 | uint32_t timeout,
|
| 1646 | size_t* emptyElementsRemaining);
|
| 1647 |
|
| 1648 | /**
|
| 1649 | * Writes to a host-to-target FIFO of unsigned 64-bit integers.
|
| 1650 | *
|
| 1651 | * @param session handle to a currently open session
|
| 1652 | * @param fifo host-to-target FIFO to which to write
|
| 1653 | * @param data data to write
|
| 1654 | * @param numberOfElements number of elements to write
|
| 1655 | * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout
|
| 1656 | * @param emptyElementsRemaining if non-NULL, outputs the number of empty
|
| 1657 | * elements remaining in the host memory part of
|
| 1658 | * the DMA FIFO
|
| 1659 | * @return result of the call
|
| 1660 | */
|
| 1661 | NiFpga_Status NiFpga_WriteFifoU64(NiFpga_Session session,
|
| 1662 | uint32_t fifo,
|
| 1663 | const uint64_t* data,
|
| 1664 | size_t numberOfElements,
|
| 1665 | uint32_t timeout,
|
| 1666 | size_t* emptyElementsRemaining);
|
| 1667 |
|
| 1668 | /**
|
| 1669 | * Acquires elements for reading from a target-to-host FIFO of booleans.
|
| 1670 | *
|
| 1671 | * Acquiring, reading, and releasing FIFO elements prevents the need to copy
|
| 1672 | * the contents of elements from the host memory buffer to a separate
|
| 1673 | * user-allocated buffer before reading. The FPGA target cannot write to
|
| 1674 | * elements acquired by the host. Therefore, the host must release elements
|
| 1675 | * after reading them. The number of elements acquired may differ from the
|
| 1676 | * number of elements requested if, for example, the number of elements
|
| 1677 | * requested reaches the end of the host memory buffer. Always release all
|
| 1678 | * acquired elements before closing the session. Do not attempt to access FIFO
|
| 1679 | * elements after the elements are released or the session is closed.
|
| 1680 | *
|
| 1681 | * @param session handle to a currently open session
|
| 1682 | * @param fifo target-to-host FIFO from which to read
|
| 1683 | * @param elements outputs a pointer to the elements acquired
|
| 1684 | * @param elementsRequested reqested number of elements
|
| 1685 | * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout
|
| 1686 | * @param elementsAcquired actual number of elements acquired, which may be
|
| 1687 | * less than the requested number
|
| 1688 | * @param elementsRemaining if non-NULL, outputs the number of elements
|
| 1689 | * remaining in the host memory part of the DMA FIFO
|
| 1690 | * @return result of the call
|
| 1691 | */
|
| 1692 | NiFpga_Status NiFpga_AcquireFifoReadElementsBool(
|
| 1693 | NiFpga_Session session,
|
| 1694 | uint32_t fifo,
|
| 1695 | NiFpga_Bool** elements,
|
| 1696 | size_t elementsRequested,
|
| 1697 | uint32_t timeout,
|
| 1698 | size_t* elementsAcquired,
|
| 1699 | size_t* elementsRemaining);
|
| 1700 |
|
| 1701 | /**
|
| 1702 | * Acquires elements for reading from a target-to-host FIFO of signed 8-bit
|
| 1703 | * integers.
|
| 1704 | *
|
| 1705 | * Acquiring, reading, and releasing FIFO elements prevents the need to copy
|
| 1706 | * the contents of elements from the host memory buffer to a separate
|
| 1707 | * user-allocated buffer before reading. The FPGA target cannot write to
|
| 1708 | * elements acquired by the host. Therefore, the host must release elements
|
| 1709 | * after reading them. The number of elements acquired may differ from the
|
| 1710 | * number of elements requested if, for example, the number of elements
|
| 1711 | * requested reaches the end of the host memory buffer. Always release all
|
| 1712 | * acquired elements before closing the session. Do not attempt to access FIFO
|
| 1713 | * elements after the elements are released or the session is closed.
|
| 1714 | *
|
| 1715 | * @param session handle to a currently open session
|
| 1716 | * @param fifo target-to-host FIFO from which to read
|
| 1717 | * @param elements outputs a pointer to the elements acquired
|
| 1718 | * @param elementsRequested reqested number of elements
|
| 1719 | * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout
|
| 1720 | * @param elementsAcquired actual number of elements acquired, which may be
|
| 1721 | * less than the requested number
|
| 1722 | * @param elementsRemaining if non-NULL, outputs the number of elements
|
| 1723 | * remaining in the host memory part of the DMA FIFO
|
| 1724 | * @return result of the call
|
| 1725 | */
|
| 1726 | NiFpga_Status NiFpga_AcquireFifoReadElementsI8(
|
| 1727 | NiFpga_Session session,
|
| 1728 | uint32_t fifo,
|
| 1729 | int8_t** elements,
|
| 1730 | size_t elementsRequested,
|
| 1731 | uint32_t timeout,
|
| 1732 | size_t* elementsAcquired,
|
| 1733 | size_t* elementsRemaining);
|
| 1734 |
|
| 1735 | /**
|
| 1736 | * Acquires elements for reading from a target-to-host FIFO of unsigned 8-bit
|
| 1737 | * integers.
|
| 1738 | *
|
| 1739 | * Acquiring, reading, and releasing FIFO elements prevents the need to copy
|
| 1740 | * the contents of elements from the host memory buffer to a separate
|
| 1741 | * user-allocated buffer before reading. The FPGA target cannot write to
|
| 1742 | * elements acquired by the host. Therefore, the host must release elements
|
| 1743 | * after reading them. The number of elements acquired may differ from the
|
| 1744 | * number of elements requested if, for example, the number of elements
|
| 1745 | * requested reaches the end of the host memory buffer. Always release all
|
| 1746 | * acquired elements before closing the session. Do not attempt to access FIFO
|
| 1747 | * elements after the elements are released or the session is closed.
|
| 1748 | *
|
| 1749 | * @param session handle to a currently open session
|
| 1750 | * @param fifo target-to-host FIFO from which to read
|
| 1751 | * @param elements outputs a pointer to the elements acquired
|
| 1752 | * @param elementsRequested reqested number of elements
|
| 1753 | * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout
|
| 1754 | * @param elementsAcquired actual number of elements acquired, which may be
|
| 1755 | * less than the requested number
|
| 1756 | * @param elementsRemaining if non-NULL, outputs the number of elements
|
| 1757 | * remaining in the host memory part of the DMA FIFO
|
| 1758 | * @return result of the call
|
| 1759 | */
|
| 1760 | NiFpga_Status NiFpga_AcquireFifoReadElementsU8(
|
| 1761 | NiFpga_Session session,
|
| 1762 | uint32_t fifo,
|
| 1763 | uint8_t** elements,
|
| 1764 | size_t elementsRequested,
|
| 1765 | uint32_t timeout,
|
| 1766 | size_t* elementsAcquired,
|
| 1767 | size_t* elementsRemaining);
|
| 1768 |
|
| 1769 | /**
|
| 1770 | * Acquires elements for reading from a target-to-host FIFO of signed 16-bit
|
| 1771 | * integers.
|
| 1772 | *
|
| 1773 | * Acquiring, reading, and releasing FIFO elements prevents the need to copy
|
| 1774 | * the contents of elements from the host memory buffer to a separate
|
| 1775 | * user-allocated buffer before reading. The FPGA target cannot write to
|
| 1776 | * elements acquired by the host. Therefore, the host must release elements
|
| 1777 | * after reading them. The number of elements acquired may differ from the
|
| 1778 | * number of elements requested if, for example, the number of elements
|
| 1779 | * requested reaches the end of the host memory buffer. Always release all
|
| 1780 | * acquired elements before closing the session. Do not attempt to access FIFO
|
| 1781 | * elements after the elements are released or the session is closed.
|
| 1782 | *
|
| 1783 | * @param session handle to a currently open session
|
| 1784 | * @param fifo target-to-host FIFO from which to read
|
| 1785 | * @param elements outputs a pointer to the elements acquired
|
| 1786 | * @param elementsRequested reqested number of elements
|
| 1787 | * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout
|
| 1788 | * @param elementsAcquired actual number of elements acquired, which may be
|
| 1789 | * less than the requested number
|
| 1790 | * @param elementsRemaining if non-NULL, outputs the number of elements
|
| 1791 | * remaining in the host memory part of the DMA FIFO
|
| 1792 | * @return result of the call
|
| 1793 | */
|
| 1794 | NiFpga_Status NiFpga_AcquireFifoReadElementsI16(
|
| 1795 | NiFpga_Session session,
|
| 1796 | uint32_t fifo,
|
| 1797 | int16_t** elements,
|
| 1798 | size_t elementsRequested,
|
| 1799 | uint32_t timeout,
|
| 1800 | size_t* elementsAcquired,
|
| 1801 | size_t* elementsRemaining);
|
| 1802 |
|
| 1803 | /**
|
| 1804 | * Acquires elements for reading from a target-to-host FIFO of unsigned 16-bit
|
| 1805 | * integers.
|
| 1806 | *
|
| 1807 | * Acquiring, reading, and releasing FIFO elements prevents the need to copy
|
| 1808 | * the contents of elements from the host memory buffer to a separate
|
| 1809 | * user-allocated buffer before reading. The FPGA target cannot write to
|
| 1810 | * elements acquired by the host. Therefore, the host must release elements
|
| 1811 | * after reading them. The number of elements acquired may differ from the
|
| 1812 | * number of elements requested if, for example, the number of elements
|
| 1813 | * requested reaches the end of the host memory buffer. Always release all
|
| 1814 | * acquired elements before closing the session. Do not attempt to access FIFO
|
| 1815 | * elements after the elements are released or the session is closed.
|
| 1816 | *
|
| 1817 | * @param session handle to a currently open session
|
| 1818 | * @param fifo target-to-host FIFO from which to read
|
| 1819 | * @param elements outputs a pointer to the elements acquired
|
| 1820 | * @param elementsRequested reqested number of elements
|
| 1821 | * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout
|
| 1822 | * @param elementsAcquired actual number of elements acquired, which may be
|
| 1823 | * less than the requested number
|
| 1824 | * @param elementsRemaining if non-NULL, outputs the number of elements
|
| 1825 | * remaining in the host memory part of the DMA FIFO
|
| 1826 | * @return result of the call
|
| 1827 | */
|
| 1828 | NiFpga_Status NiFpga_AcquireFifoReadElementsU16(
|
| 1829 | NiFpga_Session session,
|
| 1830 | uint32_t fifo,
|
| 1831 | uint16_t** elements,
|
| 1832 | size_t elementsRequested,
|
| 1833 | uint32_t timeout,
|
| 1834 | size_t* elementsAcquired,
|
| 1835 | size_t* elementsRemaining);
|
| 1836 |
|
| 1837 | /**
|
| 1838 | * Acquires elements for reading from a target-to-host FIFO of signed 32-bit
|
| 1839 | * integers.
|
| 1840 | *
|
| 1841 | * Acquiring, reading, and releasing FIFO elements prevents the need to copy
|
| 1842 | * the contents of elements from the host memory buffer to a separate
|
| 1843 | * user-allocated buffer before reading. The FPGA target cannot write to
|
| 1844 | * elements acquired by the host. Therefore, the host must release elements
|
| 1845 | * after reading them. The number of elements acquired may differ from the
|
| 1846 | * number of elements requested if, for example, the number of elements
|
| 1847 | * requested reaches the end of the host memory buffer. Always release all
|
| 1848 | * acquired elements before closing the session. Do not attempt to access FIFO
|
| 1849 | * elements after the elements are released or the session is closed.
|
| 1850 | *
|
| 1851 | * @param session handle to a currently open session
|
| 1852 | * @param fifo target-to-host FIFO from which to read
|
| 1853 | * @param elements outputs a pointer to the elements acquired
|
| 1854 | * @param elementsRequested reqested number of elements
|
| 1855 | * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout
|
| 1856 | * @param elementsAcquired actual number of elements acquired, which may be
|
| 1857 | * less than the requested number
|
| 1858 | * @param elementsRemaining if non-NULL, outputs the number of elements
|
| 1859 | * remaining in the host memory part of the DMA FIFO
|
| 1860 | * @return result of the call
|
| 1861 | */
|
| 1862 | NiFpga_Status NiFpga_AcquireFifoReadElementsI32(
|
| 1863 | NiFpga_Session session,
|
| 1864 | uint32_t fifo,
|
| 1865 | int32_t** elements,
|
| 1866 | size_t elementsRequested,
|
| 1867 | uint32_t timeout,
|
| 1868 | size_t* elementsAcquired,
|
| 1869 | size_t* elementsRemaining);
|
| 1870 |
|
| 1871 | /**
|
| 1872 | * Acquires elements for reading from a target-to-host FIFO of unsigned 32-bit
|
| 1873 | * integers.
|
| 1874 | *
|
| 1875 | * Acquiring, reading, and releasing FIFO elements prevents the need to copy
|
| 1876 | * the contents of elements from the host memory buffer to a separate
|
| 1877 | * user-allocated buffer before reading. The FPGA target cannot write to
|
| 1878 | * elements acquired by the host. Therefore, the host must release elements
|
| 1879 | * after reading them. The number of elements acquired may differ from the
|
| 1880 | * number of elements requested if, for example, the number of elements
|
| 1881 | * requested reaches the end of the host memory buffer. Always release all
|
| 1882 | * acquired elements before closing the session. Do not attempt to access FIFO
|
| 1883 | * elements after the elements are released or the session is closed.
|
| 1884 | *
|
| 1885 | * @param session handle to a currently open session
|
| 1886 | * @param fifo target-to-host FIFO from which to read
|
| 1887 | * @param elements outputs a pointer to the elements acquired
|
| 1888 | * @param elementsRequested reqested number of elements
|
| 1889 | * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout
|
| 1890 | * @param elementsAcquired actual number of elements acquired, which may be
|
| 1891 | * less than the requested number
|
| 1892 | * @param elementsRemaining if non-NULL, outputs the number of elements
|
| 1893 | * remaining in the host memory part of the DMA FIFO
|
| 1894 | * @return result of the call
|
| 1895 | */
|
| 1896 | NiFpga_Status NiFpga_AcquireFifoReadElementsU32(
|
| 1897 | NiFpga_Session session,
|
| 1898 | uint32_t fifo,
|
| 1899 | uint32_t** elements,
|
| 1900 | size_t elementsRequested,
|
| 1901 | uint32_t timeout,
|
| 1902 | size_t* elementsAcquired,
|
| 1903 | size_t* elementsRemaining);
|
| 1904 |
|
| 1905 | /**
|
| 1906 | * Acquires elements for reading from a target-to-host FIFO of signed 64-bit
|
| 1907 | * integers.
|
| 1908 | *
|
| 1909 | * Acquiring, reading, and releasing FIFO elements prevents the need to copy
|
| 1910 | * the contents of elements from the host memory buffer to a separate
|
| 1911 | * user-allocated buffer before reading. The FPGA target cannot write to
|
| 1912 | * elements acquired by the host. Therefore, the host must release elements
|
| 1913 | * after reading them. The number of elements acquired may differ from the
|
| 1914 | * number of elements requested if, for example, the number of elements
|
| 1915 | * requested reaches the end of the host memory buffer. Always release all
|
| 1916 | * acquired elements before closing the session. Do not attempt to access FIFO
|
| 1917 | * elements after the elements are released or the session is closed.
|
| 1918 | *
|
| 1919 | * @param session handle to a currently open session
|
| 1920 | * @param fifo target-to-host FIFO from which to read
|
| 1921 | * @param elements outputs a pointer to the elements acquired
|
| 1922 | * @param elementsRequested reqested number of elements
|
| 1923 | * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout
|
| 1924 | * @param elementsAcquired actual number of elements acquired, which may be
|
| 1925 | * less than the requested number
|
| 1926 | * @param elementsRemaining if non-NULL, outputs the number of elements
|
| 1927 | * remaining in the host memory part of the DMA FIFO
|
| 1928 | * @return result of the call
|
| 1929 | */
|
| 1930 | NiFpga_Status NiFpga_AcquireFifoReadElementsI64(
|
| 1931 | NiFpga_Session session,
|
| 1932 | uint32_t fifo,
|
| 1933 | int64_t** elements,
|
| 1934 | size_t elementsRequested,
|
| 1935 | uint32_t timeout,
|
| 1936 | size_t* elementsAcquired,
|
| 1937 | size_t* elementsRemaining);
|
| 1938 |
|
| 1939 | /**
|
| 1940 | * Acquires elements for reading from a target-to-host FIFO of unsigned 64-bit
|
| 1941 | * integers.
|
| 1942 | *
|
| 1943 | * Acquiring, reading, and releasing FIFO elements prevents the need to copy
|
| 1944 | * the contents of elements from the host memory buffer to a separate
|
| 1945 | * user-allocated buffer before reading. The FPGA target cannot write to
|
| 1946 | * elements acquired by the host. Therefore, the host must release elements
|
| 1947 | * after reading them. The number of elements acquired may differ from the
|
| 1948 | * number of elements requested if, for example, the number of elements
|
| 1949 | * requested reaches the end of the host memory buffer. Always release all
|
| 1950 | * acquired elements before closing the session. Do not attempt to access FIFO
|
| 1951 | * elements after the elements are released or the session is closed.
|
| 1952 | *
|
| 1953 | * @param session handle to a currently open session
|
| 1954 | * @param fifo target-to-host FIFO from which to read
|
| 1955 | * @param elements outputs a pointer to the elements acquired
|
| 1956 | * @param elementsRequested reqested number of elements
|
| 1957 | * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout
|
| 1958 | * @param elementsAcquired actual number of elements acquired, which may be
|
| 1959 | * less than the requested number
|
| 1960 | * @param elementsRemaining if non-NULL, outputs the number of elements
|
| 1961 | * remaining in the host memory part of the DMA FIFO
|
| 1962 | * @return result of the call
|
| 1963 | */
|
| 1964 | NiFpga_Status NiFpga_AcquireFifoReadElementsU64(
|
| 1965 | NiFpga_Session session,
|
| 1966 | uint32_t fifo,
|
| 1967 | uint64_t** elements,
|
| 1968 | size_t elementsRequested,
|
| 1969 | uint32_t timeout,
|
| 1970 | size_t* elementsAcquired,
|
| 1971 | size_t* elementsRemaining);
|
| 1972 |
|
| 1973 | /**
|
| 1974 | * Acquires elements for writing to a host-to-target FIFO of booleans.
|
| 1975 | *
|
| 1976 | * Acquiring, writing, and releasing FIFO elements prevents the need to write
|
| 1977 | * first into a separate user-allocated buffer and then copy the contents of
|
| 1978 | * elements to the host memory buffer. The FPGA target cannot read elements
|
| 1979 | * acquired by the host. Therefore, the host must release elements after
|
| 1980 | * writing to them. The number of elements acquired may differ from the number
|
| 1981 | * of elements requested if, for example, the number of elements requested
|
| 1982 | * reaches the end of the host memory buffer. Always release all acquired
|
| 1983 | * elements before closing the session. Do not attempt to access FIFO elements
|
| 1984 | * after the elements are released or the session is closed.
|
| 1985 | *
|
| 1986 | * @param session handle to a currently open session
|
| 1987 | * @param fifo host-to-target FIFO to which to write
|
| 1988 | * @param elements outputs a pointer to the elements acquired
|
| 1989 | * @param elementsRequested reqested number of elements
|
| 1990 | * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout
|
| 1991 | * @param elementsAcquired actual number of elements acquired, which may be
|
| 1992 | * less than the requested number
|
| 1993 | * @param elementsRemaining if non-NULL, outputs the number of elements
|
| 1994 | * remaining in the host memory part of the DMA FIFO
|
| 1995 | * @return result of the call
|
| 1996 | */
|
| 1997 | NiFpga_Status NiFpga_AcquireFifoWriteElementsBool(
|
| 1998 | NiFpga_Session session,
|
| 1999 | uint32_t fifo,
|
| 2000 | NiFpga_Bool** elements,
|
| 2001 | size_t elementsRequested,
|
| 2002 | uint32_t timeout,
|
| 2003 | size_t* elementsAcquired,
|
| 2004 | size_t* elementsRemaining);
|
| 2005 |
|
| 2006 | /**
|
| 2007 | * Acquires elements for writing to a host-to-target FIFO of signed 8-bit
|
| 2008 | * integers.
|
| 2009 | *
|
| 2010 | * Acquiring, writing, and releasing FIFO elements prevents the need to write
|
| 2011 | * first into a separate user-allocated buffer and then copy the contents of
|
| 2012 | * elements to the host memory buffer. The FPGA target cannot read elements
|
| 2013 | * acquired by the host. Therefore, the host must release elements after
|
| 2014 | * writing to them. The number of elements acquired may differ from the number
|
| 2015 | * of elements requested if, for example, the number of elements requested
|
| 2016 | * reaches the end of the host memory buffer. Always release all acquired
|
| 2017 | * elements before closing the session. Do not attempt to access FIFO elements
|
| 2018 | * after the elements are released or the session is closed.
|
| 2019 | *
|
| 2020 | * @param session handle to a currently open session
|
| 2021 | * @param fifo host-to-target FIFO to which to write
|
| 2022 | * @param elements outputs a pointer to the elements acquired
|
| 2023 | * @param elementsRequested reqested number of elements
|
| 2024 | * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout
|
| 2025 | * @param elementsAcquired actual number of elements acquired, which may be
|
| 2026 | * less than the requested number
|
| 2027 | * @param elementsRemaining if non-NULL, outputs the number of elements
|
| 2028 | * remaining in the host memory part of the DMA FIFO
|
| 2029 | * @return result of the call
|
| 2030 | */
|
| 2031 | NiFpga_Status NiFpga_AcquireFifoWriteElementsI8(
|
| 2032 | NiFpga_Session session,
|
| 2033 | uint32_t fifo,
|
| 2034 | int8_t** elements,
|
| 2035 | size_t elementsRequested,
|
| 2036 | uint32_t timeout,
|
| 2037 | size_t* elementsAcquired,
|
| 2038 | size_t* elementsRemaining);
|
| 2039 |
|
| 2040 | /**
|
| 2041 | * Acquires elements for writing to a host-to-target FIFO of unsigned 8-bit
|
| 2042 | * integers.
|
| 2043 | *
|
| 2044 | * Acquiring, writing, and releasing FIFO elements prevents the need to write
|
| 2045 | * first into a separate user-allocated buffer and then copy the contents of
|
| 2046 | * elements to the host memory buffer. The FPGA target cannot read elements
|
| 2047 | * acquired by the host. Therefore, the host must release elements after
|
| 2048 | * writing to them. The number of elements acquired may differ from the number
|
| 2049 | * of elements requested if, for example, the number of elements requested
|
| 2050 | * reaches the end of the host memory buffer. Always release all acquired
|
| 2051 | * elements before closing the session. Do not attempt to access FIFO elements
|
| 2052 | * after the elements are released or the session is closed.
|
| 2053 | *
|
| 2054 | * @param session handle to a currently open session
|
| 2055 | * @param fifo host-to-target FIFO to which to write
|
| 2056 | * @param elements outputs a pointer to the elements acquired
|
| 2057 | * @param elementsRequested reqested number of elements
|
| 2058 | * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout
|
| 2059 | * @param elementsAcquired actual number of elements acquired, which may be
|
| 2060 | * less than the requested number
|
| 2061 | * @param elementsRemaining if non-NULL, outputs the number of elements
|
| 2062 | * remaining in the host memory part of the DMA FIFO
|
| 2063 | * @return result of the call
|
| 2064 | */
|
| 2065 | NiFpga_Status NiFpga_AcquireFifoWriteElementsU8(
|
| 2066 | NiFpga_Session session,
|
| 2067 | uint32_t fifo,
|
| 2068 | uint8_t** elements,
|
| 2069 | size_t elementsRequested,
|
| 2070 | uint32_t timeout,
|
| 2071 | size_t* elementsAcquired,
|
| 2072 | size_t* elementsRemaining);
|
| 2073 |
|
| 2074 | /**
|
| 2075 | * Acquires elements for writing to a host-to-target FIFO of signed 16-bit
|
| 2076 | * integers.
|
| 2077 | *
|
| 2078 | * Acquiring, writing, and releasing FIFO elements prevents the need to write
|
| 2079 | * first into a separate user-allocated buffer and then copy the contents of
|
| 2080 | * elements to the host memory buffer. The FPGA target cannot read elements
|
| 2081 | * acquired by the host. Therefore, the host must release elements after
|
| 2082 | * writing to them. The number of elements acquired may differ from the number
|
| 2083 | * of elements requested if, for example, the number of elements requested
|
| 2084 | * reaches the end of the host memory buffer. Always release all acquired
|
| 2085 | * elements before closing the session. Do not attempt to access FIFO elements
|
| 2086 | * after the elements are released or the session is closed.
|
| 2087 | *
|
| 2088 | * @param session handle to a currently open session
|
| 2089 | * @param fifo host-to-target FIFO to which to write
|
| 2090 | * @param elements outputs a pointer to the elements acquired
|
| 2091 | * @param elementsRequested reqested number of elements
|
| 2092 | * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout
|
| 2093 | * @param elementsAcquired actual number of elements acquired, which may be
|
| 2094 | * less than the requested number
|
| 2095 | * @param elementsRemaining if non-NULL, outputs the number of elements
|
| 2096 | * remaining in the host memory part of the DMA FIFO
|
| 2097 | * @return result of the call
|
| 2098 | */
|
| 2099 | NiFpga_Status NiFpga_AcquireFifoWriteElementsI16(
|
| 2100 | NiFpga_Session session,
|
| 2101 | uint32_t fifo,
|
| 2102 | int16_t** elements,
|
| 2103 | size_t elementsRequested,
|
| 2104 | uint32_t timeout,
|
| 2105 | size_t* elementsAcquired,
|
| 2106 | size_t* elementsRemaining);
|
| 2107 |
|
| 2108 | /**
|
| 2109 | * Acquires elements for writing to a host-to-target FIFO of unsigned 16-bit
|
| 2110 | * integers.
|
| 2111 | *
|
| 2112 | * Acquiring, writing, and releasing FIFO elements prevents the need to write
|
| 2113 | * first into a separate user-allocated buffer and then copy the contents of
|
| 2114 | * elements to the host memory buffer. The FPGA target cannot read elements
|
| 2115 | * acquired by the host. Therefore, the host must release elements after
|
| 2116 | * writing to them. The number of elements acquired may differ from the number
|
| 2117 | * of elements requested if, for example, the number of elements requested
|
| 2118 | * reaches the end of the host memory buffer. Always release all acquired
|
| 2119 | * elements before closing the session. Do not attempt to access FIFO elements
|
| 2120 | * after the elements are released or the session is closed.
|
| 2121 | *
|
| 2122 | * @param session handle to a currently open session
|
| 2123 | * @param fifo host-to-target FIFO to which to write
|
| 2124 | * @param elements outputs a pointer to the elements acquired
|
| 2125 | * @param elementsRequested reqested number of elements
|
| 2126 | * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout
|
| 2127 | * @param elementsAcquired actual number of elements acquired, which may be
|
| 2128 | * less than the requested number
|
| 2129 | * @param elementsRemaining if non-NULL, outputs the number of elements
|
| 2130 | * remaining in the host memory part of the DMA FIFO
|
| 2131 | * @return result of the call
|
| 2132 | */
|
| 2133 | NiFpga_Status NiFpga_AcquireFifoWriteElementsU16(
|
| 2134 | NiFpga_Session session,
|
| 2135 | uint32_t fifo,
|
| 2136 | uint16_t** elements,
|
| 2137 | size_t elementsRequested,
|
| 2138 | uint32_t timeout,
|
| 2139 | size_t* elementsAcquired,
|
| 2140 | size_t* elementsRemaining);
|
| 2141 |
|
| 2142 | /**
|
| 2143 | * Acquires elements for writing to a host-to-target FIFO of signed 32-bit
|
| 2144 | * integers.
|
| 2145 | *
|
| 2146 | * Acquiring, writing, and releasing FIFO elements prevents the need to write
|
| 2147 | * first into a separate user-allocated buffer and then copy the contents of
|
| 2148 | * elements to the host memory buffer. The FPGA target cannot read elements
|
| 2149 | * acquired by the host. Therefore, the host must release elements after
|
| 2150 | * writing to them. The number of elements acquired may differ from the number
|
| 2151 | * of elements requested if, for example, the number of elements requested
|
| 2152 | * reaches the end of the host memory buffer. Always release all acquired
|
| 2153 | * elements before closing the session. Do not attempt to access FIFO elements
|
| 2154 | * after the elements are released or the session is closed.
|
| 2155 | *
|
| 2156 | * @param session handle to a currently open session
|
| 2157 | * @param fifo host-to-target FIFO to which to write
|
| 2158 | * @param elements outputs a pointer to the elements acquired
|
| 2159 | * @param elementsRequested reqested number of elements
|
| 2160 | * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout
|
| 2161 | * @param elementsAcquired actual number of elements acquired, which may be
|
| 2162 | * less than the requested number
|
| 2163 | * @param elementsRemaining if non-NULL, outputs the number of elements
|
| 2164 | * remaining in the host memory part of the DMA FIFO
|
| 2165 | * @return result of the call
|
| 2166 | */
|
| 2167 | NiFpga_Status NiFpga_AcquireFifoWriteElementsI32(
|
| 2168 | NiFpga_Session session,
|
| 2169 | uint32_t fifo,
|
| 2170 | int32_t** elements,
|
| 2171 | size_t elementsRequested,
|
| 2172 | uint32_t timeout,
|
| 2173 | size_t* elementsAcquired,
|
| 2174 | size_t* elementsRemaining);
|
| 2175 |
|
| 2176 | /**
|
| 2177 | * Acquires elements for writing to a host-to-target FIFO of unsigned 32-bit
|
| 2178 | * integers.
|
| 2179 | *
|
| 2180 | * Acquiring, writing, and releasing FIFO elements prevents the need to write
|
| 2181 | * first into a separate user-allocated buffer and then copy the contents of
|
| 2182 | * elements to the host memory buffer. The FPGA target cannot read elements
|
| 2183 | * acquired by the host. Therefore, the host must release elements after
|
| 2184 | * writing to them. The number of elements acquired may differ from the number
|
| 2185 | * of elements requested if, for example, the number of elements requested
|
| 2186 | * reaches the end of the host memory buffer. Always release all acquired
|
| 2187 | * elements before closing the session. Do not attempt to access FIFO elements
|
| 2188 | * after the elements are released or the session is closed.
|
| 2189 | *
|
| 2190 | * @param session handle to a currently open session
|
| 2191 | * @param fifo host-to-target FIFO to which to write
|
| 2192 | * @param elements outputs a pointer to the elements acquired
|
| 2193 | * @param elementsRequested reqested number of elements
|
| 2194 | * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout
|
| 2195 | * @param elementsAcquired actual number of elements acquired, which may be
|
| 2196 | * less than the requested number
|
| 2197 | * @param elementsRemaining if non-NULL, outputs the number of elements
|
| 2198 | * remaining in the host memory part of the DMA FIFO
|
| 2199 | * @return result of the call
|
| 2200 | */
|
| 2201 | NiFpga_Status NiFpga_AcquireFifoWriteElementsU32(
|
| 2202 | NiFpga_Session session,
|
| 2203 | uint32_t fifo,
|
| 2204 | uint32_t** elements,
|
| 2205 | size_t elementsRequested,
|
| 2206 | uint32_t timeout,
|
| 2207 | size_t* elementsAcquired,
|
| 2208 | size_t* elementsRemaining);
|
| 2209 |
|
| 2210 | /**
|
| 2211 | * Acquires elements for writing to a host-to-target FIFO of signed 64-bit
|
| 2212 | * integers.
|
| 2213 | *
|
| 2214 | * Acquiring, writing, and releasing FIFO elements prevents the need to write
|
| 2215 | * first into a separate user-allocated buffer and then copy the contents of
|
| 2216 | * elements to the host memory buffer. The FPGA target cannot read elements
|
| 2217 | * acquired by the host. Therefore, the host must release elements after
|
| 2218 | * writing to them. The number of elements acquired may differ from the number
|
| 2219 | * of elements requested if, for example, the number of elements requested
|
| 2220 | * reaches the end of the host memory buffer. Always release all acquired
|
| 2221 | * elements before closing the session. Do not attempt to access FIFO elements
|
| 2222 | * after the elements are released or the session is closed.
|
| 2223 | *
|
| 2224 | * @param session handle to a currently open session
|
| 2225 | * @param fifo host-to-target FIFO to which to write
|
| 2226 | * @param elements outputs a pointer to the elements acquired
|
| 2227 | * @param elementsRequested reqested number of elements
|
| 2228 | * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout
|
| 2229 | * @param elementsAcquired actual number of elements acquired, which may be
|
| 2230 | * less than the requested number
|
| 2231 | * @param elementsRemaining if non-NULL, outputs the number of elements
|
| 2232 | * remaining in the host memory part of the DMA FIFO
|
| 2233 | * @return result of the call
|
| 2234 | */
|
| 2235 | NiFpga_Status NiFpga_AcquireFifoWriteElementsI64(
|
| 2236 | NiFpga_Session session,
|
| 2237 | uint32_t fifo,
|
| 2238 | int64_t** elements,
|
| 2239 | size_t elementsRequested,
|
| 2240 | uint32_t timeout,
|
| 2241 | size_t* elementsAcquired,
|
| 2242 | size_t* elementsRemaining);
|
| 2243 |
|
| 2244 | /**
|
| 2245 | * Acquires elements for writing to a host-to-target FIFO of unsigned 64-bit
|
| 2246 | * integers.
|
| 2247 | *
|
| 2248 | * Acquiring, writing, and releasing FIFO elements prevents the need to write
|
| 2249 | * first into a separate user-allocated buffer and then copy the contents of
|
| 2250 | * elements to the host memory buffer. The FPGA target cannot read elements
|
| 2251 | * acquired by the host. Therefore, the host must release elements after
|
| 2252 | * writing to them. The number of elements acquired may differ from the number
|
| 2253 | * of elements requested if, for example, the number of elements requested
|
| 2254 | * reaches the end of the host memory buffer. Always release all acquired
|
| 2255 | * elements before closing the session. Do not attempt to access FIFO elements
|
| 2256 | * after the elements are released or the session is closed.
|
| 2257 | *
|
| 2258 | * @param session handle to a currently open session
|
| 2259 | * @param fifo host-to-target FIFO to which to write
|
| 2260 | * @param elements outputs a pointer to the elements acquired
|
| 2261 | * @param elementsRequested reqested number of elements
|
| 2262 | * @param timeout timeout in milliseconds, or NiFpga_InfiniteTimeout
|
| 2263 | * @param elementsAcquired actual number of elements acquired, which may be
|
| 2264 | * less than the requested number
|
| 2265 | * @param elementsRemaining if non-NULL, outputs the number of elements
|
| 2266 | * remaining in the host memory part of the DMA FIFO
|
| 2267 | * @return result of the call
|
| 2268 | */
|
| 2269 | NiFpga_Status NiFpga_AcquireFifoWriteElementsU64(
|
| 2270 | NiFpga_Session session,
|
| 2271 | uint32_t fifo,
|
| 2272 | uint64_t** elements,
|
| 2273 | size_t elementsRequested,
|
| 2274 | uint32_t timeout,
|
| 2275 | size_t* elementsAcquired,
|
| 2276 | size_t* elementsRemaining);
|
| 2277 |
|
| 2278 | /**
|
| 2279 | * Releases previously acquired FIFO elements.
|
| 2280 | *
|
| 2281 | * The FPGA target cannot read elements acquired by the host. Therefore, the
|
| 2282 | * host must release elements after acquiring them. Always release all acquired
|
| 2283 | * elements before closing the session. Do not attempt to access FIFO elements
|
| 2284 | * after the elements are released or the session is closed.
|
| 2285 | *
|
| 2286 | * @param session handle to a currently open session
|
| 2287 | * @param fifo FIFO from which to release elements
|
| 2288 | * @param elements number of elements to release
|
| 2289 | * @return result of the call
|
| 2290 | */
|
| 2291 | NiFpga_Status NiFpga_ReleaseFifoElements(NiFpga_Session session,
|
| 2292 | uint32_t fifo,
|
| 2293 | size_t elements);
|
| 2294 |
|
| 2295 | /**
|
| 2296 | * Gets an endpoint reference to a peer-to-peer FIFO.
|
| 2297 | *
|
| 2298 | * @param session handle to a currently open session
|
| 2299 | * @param fifo peer-to-peer FIFO
|
| 2300 | * @param endpoint outputs the endpoint reference
|
| 2301 | * @return result of the call
|
| 2302 | */
|
| 2303 | NiFpga_Status NiFpga_GetPeerToPeerFifoEndpoint(NiFpga_Session session,
|
| 2304 | uint32_t fifo,
|
| 2305 | uint32_t* endpoint);
|
| 2306 |
|
| 2307 | #if NiFpga_Cpp
|
| 2308 | }
|
| 2309 | #endif
|
| 2310 |
|
| 2311 | #endif
|