Brian Silverman | 003a473 | 2018-03-11 14:02:15 -0700 | [diff] [blame] | 1 | #ifndef FRC971_WPILIB_SPI_RX_CLEARER_H_ |
| 2 | #define FRC971_WPILIB_SPI_RX_CLEARER_H_ |
| 3 | |
Tyler Chatow | bf0609c | 2021-07-31 16:13:27 -0700 | [diff] [blame] | 4 | #include <cstdint> |
Brian Silverman | 003a473 | 2018-03-11 14:02:15 -0700 | [diff] [blame] | 5 | |
Stephan Pleines | d99b1ee | 2024-02-02 20:56:44 -0800 | [diff] [blame] | 6 | namespace frc971::wpilib { |
Brian Silverman | 003a473 | 2018-03-11 14:02:15 -0700 | [diff] [blame] | 7 | |
| 8 | // Allows clearing the RX FIFO of the roboRIO's SPI peripheral on demand. This |
| 9 | // is necessary to work around a driver bug. See |
| 10 | // https://docs.google.com/document/d/1ANV4LtnVcku2fk84Y31pIIqrxUD_x_dYyCQgp10NB0k/edit |
| 11 | // for details. |
| 12 | class SpiRxClearer { |
| 13 | public: |
| 14 | SpiRxClearer(); |
| 15 | ~SpiRxClearer(); |
| 16 | |
| 17 | // Actually clears the RX FIFO. This should be very fast. Don't do this while |
| 18 | // any operations via the kernel driver are ongoing. |
| 19 | void ClearRxFifo(); |
| 20 | |
| 21 | private: |
| 22 | // How big of a mapping we do. |
| 23 | static constexpr uint32_t kMappingSize = 0x1000; |
| 24 | |
| 25 | // The physical base address of the SPI instance we're going to mess with. |
| 26 | const uint32_t spi_peripheral_base_ = 0xe0006000; |
| 27 | volatile uint32_t *mapping_; |
| 28 | |
| 29 | uint32_t ReadRegister(uint32_t offset) { return mapping_[offset / 4]; } |
| 30 | void WriteRegister(uint32_t offset, uint32_t value) { |
| 31 | mapping_[offset / 4] = value; |
| 32 | } |
| 33 | |
| 34 | bool RxFifoIsEmpty() { return !(ReadRegister(4) & (1 << 4)); } |
| 35 | }; |
| 36 | |
Stephan Pleines | d99b1ee | 2024-02-02 20:56:44 -0800 | [diff] [blame] | 37 | } // namespace frc971::wpilib |
Brian Silverman | 003a473 | 2018-03-11 14:02:15 -0700 | [diff] [blame] | 38 | |
Tyler Chatow | bf0609c | 2021-07-31 16:13:27 -0700 | [diff] [blame] | 39 | #endif // FRC971_WPILIB_SPI_RX_CLEARER_H_ |