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Austin Schuhdace2a62020-08-18 10:56:48 -07001divert(-1)
2
3dnl m4 macros for PowerPC assembler (32 and 64 bit).
4
5dnl Copyright 2000, 2002, 2003, 2017, 2018 Free Software Foundation, Inc.
6
7dnl This file is part of the GNU MP Library.
8dnl
9dnl The GNU MP Library is free software; you can redistribute it and/or modify
10dnl it under the terms of either:
11dnl
12dnl * the GNU Lesser General Public License as published by the Free
13dnl Software Foundation; either version 3 of the License, or (at your
14dnl option) any later version.
15dnl
16dnl or
17dnl
18dnl * the GNU General Public License as published by the Free Software
19dnl Foundation; either version 2 of the License, or (at your option) any
20dnl later version.
21dnl
22dnl or both in parallel, as here.
23dnl
24dnl The GNU MP Library is distributed in the hope that it will be useful, but
25dnl WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
26dnl or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
27dnl for more details.
28dnl
29dnl You should have received copies of the GNU General Public License and the
30dnl GNU Lesser General Public License along with the GNU MP Library. If not,
31dnl see https://www.gnu.org/licenses/.
32
33
34dnl Called: PROLOGUE_cpu(GSYM_PREFIX`'foo)
35dnl
36dnl This is the same as the default in mpn/asm-defs.m4, but with ALIGN(4)
37dnl not 8.
38dnl
39dnl 4-byte alignment is normally enough, certainly it's what gcc gives. We
40dnl don't want bigger alignment within PROLOGUE since it can introduce
41dnl padding into multiple-entrypoint routines, and with gas such padding is
42dnl zero words, which are not valid instructions.
43
44define(`PROLOGUE_cpu',
45m4_assert_numargs(1)
46` TEXT
47 ALIGN(4)
48 GLOBL `$1' GLOBL_ATTR
49 TYPE(`$1',`function')
50`$1'LABEL_SUFFIX')
51
52
53dnl Usage: r0 ... r31, cr0 ... cr7
54dnl
55dnl Registers names, either left as "r0" etc or mapped to plain 0 etc,
56dnl according to the result of the GMP_ASM_POWERPC_REGISTERS configure
57dnl test.
58
59ifelse(WANT_R_REGISTERS,no,`
60forloop(i,0,31,`deflit(`r'i,i)')
61forloop(i,0,31,`deflit(`v'i,i)')
62forloop(i,0,31,`deflit(`f'i,i)')
63forloop(i,0,7, `deflit(`cr'i,i)')
64')
65
66
67dnl Usage: ASSERT(cond,instructions)
68dnl
69dnl If WANT_ASSERT is 1, output the given instructions and expect the given
70dnl flags condition to then be satisfied. For example,
71dnl
72dnl ASSERT(eq, `cmpwi r6, 123')
73dnl
74dnl The instructions can be omitted to just assert a flags condition with
75dnl no extra calculation. For example,
76dnl
77dnl ASSERT(ne)
78dnl
79dnl The condition can be omitted to just output the given instructions when
80dnl assertion checking is wanted. For example,
81dnl
82dnl ASSERT(, `mr r11, r0')
83dnl
84dnl Using a zero word for an illegal instruction is probably not ideal,
85dnl since it marks the beginning of a traceback table in the 64-bit ABI.
86dnl But assertions are only for development, so it doesn't matter too much.
87
88define(ASSERT,
89m4_assert_numargs_range(1,2)
90m4_assert_defined(`WANT_ASSERT')
91`ifelse(WANT_ASSERT,1,
92 `C ASSERT
93 $2
94ifelse(`$1',,,
95` b$1 L(ASSERT_ok`'ASSERT_counter)
96 W32 0 C assertion failed
97L(ASSERT_ok`'ASSERT_counter):
98define(`ASSERT_counter',incr(ASSERT_counter))
99')')')
100
101define(ASSERT_counter,1)
102
103dnl Manually assemble some new instructions
104dnl
105
106define(`maddld',m4_assert_numargs(4)`dnl
107.long eval(0x10000033+m4_lshift($1,21)+m4_lshift($2,16)+m4_lshift($3,11)+m4_lshift($4,6))')
108
109define(`maddhdu',m4_assert_numargs(4)`dnl
110.long eval(0x10000031+m4_lshift($1,21)+m4_lshift($2,16)+m4_lshift($3,11)+m4_lshift($4,6))')
111
112define(`popcntd',m4_assert_numargs(2)`dnl
113.long eval(0x7c0003f4+m4_lshift($2,21)+m4_lshift($1,16))')
114
115define(`divdeu',m4_assert_numargs(3)`dnl
116.long eval(0x7c000312+m4_lshift($1,21)+m4_lshift($2,16)+m4_lshift($3,11))')
117
118define(`addex',m4_assert_numargs(4)`dnl
119.long eval(0x7c000154+m4_lshift($1,21)+m4_lshift($2,16)+m4_lshift($3,11)+m4_lshift($4,9))')
120
121divert