Brian Silverman | 95244d8 | 2013-12-14 12:15:46 -0800 | [diff] [blame] | 1 | #include "cape/analog.h" |
| 2 | |
| 3 | #include <string.h> |
| 4 | |
Brian Silverman | 95244d8 | 2013-12-14 12:15:46 -0800 | [diff] [blame] | 5 | #include "cape/util.h" |
Brian Silverman | 176c676 | 2013-12-19 16:28:09 -0800 | [diff] [blame] | 6 | #include "cape/led.h" |
Brian Silverman | 95244d8 | 2013-12-14 12:15:46 -0800 | [diff] [blame] | 7 | |
| 8 | #define SPI SPI2 |
Brian Silverman | 176c676 | 2013-12-19 16:28:09 -0800 | [diff] [blame] | 9 | #define SPI_IRQHandler SPI2_IRQHandler |
Brian Silverman | 95244d8 | 2013-12-14 12:15:46 -0800 | [diff] [blame] | 10 | #define SPI_IRQn SPI2_IRQn |
| 11 | #define RCC_APB1ENR_SPIEN RCC_APB1ENR_SPI2EN |
| 12 | #define TIM TIM14 |
| 13 | #define TIM_IRQHandler TIM8_TRG_COM_TIM14_IRQHandler |
| 14 | #define TIM_IRQn TIM8_TRG_COM_TIM14_IRQn |
| 15 | #define RCC_APB1ENR_TIMEN RCC_APB1ENR_TIM14EN |
| 16 | #define CSEL_GPIO GPIOB |
| 17 | #define CSEL_NUM 12 |
| 18 | |
| 19 | #define NUM_CHANNELS 8 |
| 20 | |
Brian Silverman | f482b4c | 2014-03-17 19:44:20 -0700 | [diff] [blame] | 21 | // This file handles reading values from the MCP3008-I/SL ADC. |
| 22 | |
Brian Silverman | 95244d8 | 2013-12-14 12:15:46 -0800 | [diff] [blame] | 23 | uint16_t analog_readings[NUM_CHANNELS] __attribute__((aligned(8))); |
| 24 | static volatile int current_channel; |
Brian Silverman | 38188d6 | 2014-01-01 13:17:35 -0800 | [diff] [blame] | 25 | static volatile int partial_reading; |
| 26 | static volatile int frame; |
Brian Silverman | f482b4c | 2014-03-17 19:44:20 -0700 | [diff] [blame] | 27 | static volatile int analog_errors; |
Brian Silverman | 95244d8 | 2013-12-14 12:15:46 -0800 | [diff] [blame] | 28 | |
| 29 | void SPI_IRQHandler(void) { |
| 30 | uint32_t status = SPI->SR; |
| 31 | if (status & SPI_SR_RXNE) { |
| 32 | uint16_t value = SPI->DR; |
Brian Silverman | 38188d6 | 2014-01-01 13:17:35 -0800 | [diff] [blame] | 33 | if (frame == 0) { |
| 34 | frame = 1; |
| 35 | partial_reading = value; |
| 36 | } else { |
Brian Silverman | f482b4c | 2014-03-17 19:44:20 -0700 | [diff] [blame] | 37 | frame = 2; |
Brian Silverman | 38188d6 | 2014-01-01 13:17:35 -0800 | [diff] [blame] | 38 | // Masking off the high bits is important because there's nothing driving |
| 39 | // the MISO line during the time the MCU receives them. |
Brian Silverman | f482b4c | 2014-03-17 19:44:20 -0700 | [diff] [blame] | 40 | analog_readings[current_channel] = |
| 41 | (partial_reading << 16 | value) & 0x3FF; |
Brian Silverman | 38188d6 | 2014-01-01 13:17:35 -0800 | [diff] [blame] | 42 | for (int i = 0; i < 100; ++i) gpio_off(CSEL_GPIO, CSEL_NUM); |
| 43 | gpio_on(CSEL_GPIO, CSEL_NUM); |
Brian Silverman | 95244d8 | 2013-12-14 12:15:46 -0800 | [diff] [blame] | 44 | |
Brian Silverman | f482b4c | 2014-03-17 19:44:20 -0700 | [diff] [blame] | 45 | current_channel = (current_channel + 1) % NUM_CHANNELS; |
Brian Silverman | 38188d6 | 2014-01-01 13:17:35 -0800 | [diff] [blame] | 46 | } |
Brian Silverman | 95244d8 | 2013-12-14 12:15:46 -0800 | [diff] [blame] | 47 | } |
| 48 | } |
| 49 | |
| 50 | void TIM_IRQHandler(void) { |
Brian Silverman | b4c0882 | 2014-03-23 15:28:23 -0700 | [diff] [blame] | 51 | TIM->SR = ~TIM_SR_UIF; |
Brian Silverman | 95244d8 | 2013-12-14 12:15:46 -0800 | [diff] [blame] | 52 | |
Brian Silverman | f482b4c | 2014-03-17 19:44:20 -0700 | [diff] [blame] | 53 | if (frame != 2) { |
| 54 | // We're not done with the previous reading yet, so we're going to reset and |
| 55 | // try again. |
| 56 | // 270ns*120MHz = 32.4 |
| 57 | for (int i = 0; i < 33; ++i) gpio_on(CSEL_GPIO, CSEL_NUM); |
| 58 | ++analog_errors; |
| 59 | } |
| 60 | |
| 61 | // This needs to wait 13 cycles between enabling the CSEL pin and starting to |
| 62 | // send data. |
| 63 | // (100ns+8ns)*120MHz = 12.96 |
| 64 | |
| 65 | // Clear the CSEL pin to select it. |
| 66 | for (int i = 0; i < 9; ++i) gpio_off(CSEL_GPIO, CSEL_NUM); |
| 67 | partial_reading = 0; |
| 68 | frame = 0; |
| 69 | SPI->DR = 1; // start bit |
| 70 | uint16_t data = (1 << 15) /* not differential */ | |
| 71 | (current_channel << 12); |
| 72 | while (!(SPI->SR & SPI_SR_TXE)); |
| 73 | SPI->DR = data; |
Brian Silverman | 95244d8 | 2013-12-14 12:15:46 -0800 | [diff] [blame] | 74 | } |
| 75 | |
| 76 | void analog_init(void) { |
| 77 | memset(analog_readings, 0xFF, sizeof(analog_readings)); |
| 78 | |
| 79 | RCC->APB1ENR |= RCC_APB1ENR_SPIEN; |
| 80 | RCC->APB1ENR |= RCC_APB1ENR_TIMEN; |
| 81 | |
| 82 | gpio_setup_out(CSEL_GPIO, CSEL_NUM, 3); |
Brian Silverman | 391beca | 2013-12-28 22:32:48 -0800 | [diff] [blame] | 83 | gpio_on(CSEL_GPIO, CSEL_NUM); // deselect it |
Brian Silverman | 95244d8 | 2013-12-14 12:15:46 -0800 | [diff] [blame] | 84 | |
| 85 | gpio_setup_alt(GPIOB, 13, 5); // SCK |
| 86 | gpio_setup_alt(GPIOB, 14, 5); // MISO |
| 87 | gpio_setup_alt(GPIOB, 15, 5); // MOSI |
| 88 | |
| 89 | NVIC_SetPriority(SPI_IRQn, 6); |
| 90 | NVIC_EnableIRQ(SPI_IRQn); |
| 91 | NVIC_SetPriority(TIM_IRQn, 6); |
| 92 | NVIC_EnableIRQ(TIM_IRQn); |
| 93 | |
Brian Silverman | 45ee39e | 2014-03-24 15:07:17 -0700 | [diff] [blame] | 94 | // We set it up to trigger at 4.44KHz (each sensor at just over 500Hz). |
| 95 | // 1/(1.875MHz)*32 = 17067ns (58.6Khz), and we don't want to be close (other |
| 96 | // interrupts do get in the way, and there's no reason to be). |
Brian Silverman | f482b4c | 2014-03-17 19:44:20 -0700 | [diff] [blame] | 97 | TIM->CR1 = 0; |
Brian Silverman | b4c0882 | 2014-03-23 15:28:23 -0700 | [diff] [blame] | 98 | TIM->DIER = TIM_DIER_UIE; |
Brian Silverman | 45ee39e | 2014-03-24 15:07:17 -0700 | [diff] [blame] | 99 | // Make each tick take 45000ns. |
| 100 | TIM->PSC = (60 * 45000 / 1000) - 1; |
| 101 | // Only count to 5 before triggering the interrupt and wrapping around. |
| 102 | TIM->ARR = 5; |
Brian Silverman | 95244d8 | 2013-12-14 12:15:46 -0800 | [diff] [blame] | 103 | |
| 104 | SPI->CR1 = 0; // make sure it's disabled |
| 105 | SPI->CR1 = |
| 106 | SPI_CR1_DFF /* 16 bit frame */ | |
Brian Silverman | 176c676 | 2013-12-19 16:28:09 -0800 | [diff] [blame] | 107 | SPI_CR1_SSM | SPI_CR1_SSI | /* don't watch for other masters */ |
Brian Silverman | 38188d6 | 2014-01-01 13:17:35 -0800 | [diff] [blame] | 108 | 3 << 3 /* 30MHz/16 = 1.875MHz */ | |
Brian Silverman | 95244d8 | 2013-12-14 12:15:46 -0800 | [diff] [blame] | 109 | SPI_CR1_MSTR /* master mode */; |
| 110 | SPI->CR2 = SPI_CR2_RXNEIE; |
| 111 | SPI->CR1 |= SPI_CR1_SPE; // enable it |
| 112 | |
Brian Silverman | f482b4c | 2014-03-17 19:44:20 -0700 | [diff] [blame] | 113 | current_channel = 0; |
| 114 | analog_errors = 0; |
| 115 | |
| 116 | TIM->EGR = TIM_EGR_UG; |
| 117 | TIM->CR1 |= TIM_CR1_CEN; |
| 118 | } |
| 119 | |
| 120 | int analog_get_errors(void) { |
| 121 | NVIC_DisableIRQ(TIM_IRQn); |
| 122 | int r = analog_errors; |
| 123 | analog_errors = 0; |
| 124 | NVIC_EnableIRQ(TIM_IRQn); |
| 125 | return r; |
Brian Silverman | 95244d8 | 2013-12-14 12:15:46 -0800 | [diff] [blame] | 126 | } |