Austin Schuh | 41baf20 | 2022-01-01 14:33:40 -0800 | [diff] [blame^] | 1 | /* |
| 2 | * The MIT License (MIT) |
| 3 | * |
| 4 | * Copyright (c) 2019 Ha Thach (tinyusb.org) |
| 5 | * |
| 6 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
| 7 | * of this software and associated documentation files (the "Software"), to deal |
| 8 | * in the Software without restriction, including without limitation the rights |
| 9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell |
| 10 | * copies of the Software, and to permit persons to whom the Software is |
| 11 | * furnished to do so, subject to the following conditions: |
| 12 | * |
| 13 | * The above copyright notice and this permission notice shall be included in |
| 14 | * all copies or substantial portions of the Software. |
| 15 | * |
| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE |
| 19 | * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| 21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
| 22 | * THE SOFTWARE. |
| 23 | * |
| 24 | * This file is part of the TinyUSB stack. |
| 25 | */ |
| 26 | |
| 27 | #include "tusb_option.h" |
| 28 | |
| 29 | #if TUSB_OPT_HOST_ENABLED & CFG_TUH_MSC |
| 30 | |
| 31 | #include "host/usbh.h" |
| 32 | #include "host/usbh_classdriver.h" |
| 33 | |
| 34 | #include "msc_host.h" |
| 35 | |
| 36 | //--------------------------------------------------------------------+ |
| 37 | // MACRO CONSTANT TYPEDEF |
| 38 | //--------------------------------------------------------------------+ |
| 39 | enum |
| 40 | { |
| 41 | MSC_STAGE_IDLE = 0, |
| 42 | MSC_STAGE_CMD, |
| 43 | MSC_STAGE_DATA, |
| 44 | MSC_STAGE_STATUS, |
| 45 | }; |
| 46 | |
| 47 | typedef struct |
| 48 | { |
| 49 | uint8_t itf_num; |
| 50 | uint8_t ep_in; |
| 51 | uint8_t ep_out; |
| 52 | |
| 53 | uint8_t max_lun; |
| 54 | |
| 55 | volatile bool configured; // Receive SET_CONFIGURE |
| 56 | volatile bool mounted; // Enumeration is complete |
| 57 | |
| 58 | struct { |
| 59 | uint32_t block_size; |
| 60 | uint32_t block_count; |
| 61 | } capacity[CFG_TUH_MSC_MAXLUN]; |
| 62 | |
| 63 | //------------- SCSI -------------// |
| 64 | uint8_t stage; |
| 65 | void* buffer; |
| 66 | tuh_msc_complete_cb_t complete_cb; |
| 67 | |
| 68 | msc_cbw_t cbw; |
| 69 | msc_csw_t csw; |
| 70 | }msch_interface_t; |
| 71 | |
| 72 | CFG_TUSB_MEM_SECTION static msch_interface_t _msch_itf[CFG_TUH_DEVICE_MAX]; |
| 73 | |
| 74 | // buffer used to read scsi information when mounted |
| 75 | // largest response data currently is inquiry TODO Inquiry is not part of enum anymore |
| 76 | CFG_TUSB_MEM_SECTION TU_ATTR_ALIGNED(4) |
| 77 | static uint8_t _msch_buffer[sizeof(scsi_inquiry_resp_t)]; |
| 78 | |
| 79 | TU_ATTR_ALWAYS_INLINE |
| 80 | static inline msch_interface_t* get_itf(uint8_t dev_addr) |
| 81 | { |
| 82 | return &_msch_itf[dev_addr-1]; |
| 83 | } |
| 84 | |
| 85 | //--------------------------------------------------------------------+ |
| 86 | // PUBLIC API |
| 87 | //--------------------------------------------------------------------+ |
| 88 | uint8_t tuh_msc_get_maxlun(uint8_t dev_addr) |
| 89 | { |
| 90 | msch_interface_t* p_msc = get_itf(dev_addr); |
| 91 | return p_msc->max_lun; |
| 92 | } |
| 93 | |
| 94 | uint32_t tuh_msc_get_block_count(uint8_t dev_addr, uint8_t lun) |
| 95 | { |
| 96 | msch_interface_t* p_msc = get_itf(dev_addr); |
| 97 | return p_msc->capacity[lun].block_count; |
| 98 | } |
| 99 | |
| 100 | uint32_t tuh_msc_get_block_size(uint8_t dev_addr, uint8_t lun) |
| 101 | { |
| 102 | msch_interface_t* p_msc = get_itf(dev_addr); |
| 103 | return p_msc->capacity[lun].block_size; |
| 104 | } |
| 105 | |
| 106 | bool tuh_msc_mounted(uint8_t dev_addr) |
| 107 | { |
| 108 | msch_interface_t* p_msc = get_itf(dev_addr); |
| 109 | return p_msc->mounted; |
| 110 | } |
| 111 | |
| 112 | bool tuh_msc_ready(uint8_t dev_addr) |
| 113 | { |
| 114 | msch_interface_t* p_msc = get_itf(dev_addr); |
| 115 | return p_msc->mounted && !usbh_edpt_busy(dev_addr, p_msc->ep_in); |
| 116 | } |
| 117 | |
| 118 | //--------------------------------------------------------------------+ |
| 119 | // PUBLIC API: SCSI COMMAND |
| 120 | //--------------------------------------------------------------------+ |
| 121 | static inline void cbw_init(msc_cbw_t *cbw, uint8_t lun) |
| 122 | { |
| 123 | tu_memclr(cbw, sizeof(msc_cbw_t)); |
| 124 | cbw->signature = MSC_CBW_SIGNATURE; |
| 125 | cbw->tag = 0x54555342; // TUSB |
| 126 | cbw->lun = lun; |
| 127 | } |
| 128 | |
| 129 | bool tuh_msc_scsi_command(uint8_t dev_addr, msc_cbw_t const* cbw, void* data, tuh_msc_complete_cb_t complete_cb) |
| 130 | { |
| 131 | msch_interface_t* p_msc = get_itf(dev_addr); |
| 132 | TU_VERIFY(p_msc->configured); |
| 133 | |
| 134 | // TODO claim endpoint |
| 135 | |
| 136 | p_msc->cbw = *cbw; |
| 137 | p_msc->stage = MSC_STAGE_CMD; |
| 138 | p_msc->buffer = data; |
| 139 | p_msc->complete_cb = complete_cb; |
| 140 | |
| 141 | TU_ASSERT(usbh_edpt_xfer(dev_addr, p_msc->ep_out, (uint8_t*) &p_msc->cbw, sizeof(msc_cbw_t))); |
| 142 | |
| 143 | return true; |
| 144 | } |
| 145 | |
| 146 | bool tuh_msc_read_capacity(uint8_t dev_addr, uint8_t lun, scsi_read_capacity10_resp_t* response, tuh_msc_complete_cb_t complete_cb) |
| 147 | { |
| 148 | msch_interface_t* p_msc = get_itf(dev_addr); |
| 149 | TU_VERIFY(p_msc->configured); |
| 150 | |
| 151 | msc_cbw_t cbw; |
| 152 | cbw_init(&cbw, lun); |
| 153 | |
| 154 | cbw.total_bytes = sizeof(scsi_read_capacity10_resp_t); |
| 155 | cbw.dir = TUSB_DIR_IN_MASK; |
| 156 | cbw.cmd_len = sizeof(scsi_read_capacity10_t); |
| 157 | cbw.command[0] = SCSI_CMD_READ_CAPACITY_10; |
| 158 | |
| 159 | return tuh_msc_scsi_command(dev_addr, &cbw, response, complete_cb); |
| 160 | } |
| 161 | |
| 162 | bool tuh_msc_inquiry(uint8_t dev_addr, uint8_t lun, scsi_inquiry_resp_t* response, tuh_msc_complete_cb_t complete_cb) |
| 163 | { |
| 164 | msch_interface_t* p_msc = get_itf(dev_addr); |
| 165 | TU_VERIFY(p_msc->mounted); |
| 166 | |
| 167 | msc_cbw_t cbw; |
| 168 | cbw_init(&cbw, lun); |
| 169 | |
| 170 | cbw.total_bytes = sizeof(scsi_inquiry_resp_t); |
| 171 | cbw.dir = TUSB_DIR_IN_MASK; |
| 172 | cbw.cmd_len = sizeof(scsi_inquiry_t); |
| 173 | |
| 174 | scsi_inquiry_t const cmd_inquiry = |
| 175 | { |
| 176 | .cmd_code = SCSI_CMD_INQUIRY, |
| 177 | .alloc_length = sizeof(scsi_inquiry_resp_t) |
| 178 | }; |
| 179 | memcpy(cbw.command, &cmd_inquiry, cbw.cmd_len); |
| 180 | |
| 181 | return tuh_msc_scsi_command(dev_addr, &cbw, response, complete_cb); |
| 182 | } |
| 183 | |
| 184 | bool tuh_msc_test_unit_ready(uint8_t dev_addr, uint8_t lun, tuh_msc_complete_cb_t complete_cb) |
| 185 | { |
| 186 | msch_interface_t* p_msc = get_itf(dev_addr); |
| 187 | TU_VERIFY(p_msc->configured); |
| 188 | |
| 189 | msc_cbw_t cbw; |
| 190 | cbw_init(&cbw, lun); |
| 191 | |
| 192 | cbw.total_bytes = 0; |
| 193 | cbw.dir = TUSB_DIR_OUT; |
| 194 | cbw.cmd_len = sizeof(scsi_test_unit_ready_t); |
| 195 | cbw.command[0] = SCSI_CMD_TEST_UNIT_READY; |
| 196 | cbw.command[1] = lun; // according to wiki TODO need verification |
| 197 | |
| 198 | return tuh_msc_scsi_command(dev_addr, &cbw, NULL, complete_cb); |
| 199 | } |
| 200 | |
| 201 | bool tuh_msc_request_sense(uint8_t dev_addr, uint8_t lun, void *resposne, tuh_msc_complete_cb_t complete_cb) |
| 202 | { |
| 203 | msc_cbw_t cbw; |
| 204 | cbw_init(&cbw, lun); |
| 205 | |
| 206 | cbw.total_bytes = 18; // TODO sense response |
| 207 | cbw.dir = TUSB_DIR_IN_MASK; |
| 208 | cbw.cmd_len = sizeof(scsi_request_sense_t); |
| 209 | |
| 210 | scsi_request_sense_t const cmd_request_sense = |
| 211 | { |
| 212 | .cmd_code = SCSI_CMD_REQUEST_SENSE, |
| 213 | .alloc_length = 18 |
| 214 | }; |
| 215 | |
| 216 | memcpy(cbw.command, &cmd_request_sense, cbw.cmd_len); |
| 217 | |
| 218 | return tuh_msc_scsi_command(dev_addr, &cbw, resposne, complete_cb); |
| 219 | } |
| 220 | |
| 221 | bool tuh_msc_read10(uint8_t dev_addr, uint8_t lun, void * buffer, uint32_t lba, uint16_t block_count, tuh_msc_complete_cb_t complete_cb) |
| 222 | { |
| 223 | msch_interface_t* p_msc = get_itf(dev_addr); |
| 224 | TU_VERIFY(p_msc->mounted); |
| 225 | |
| 226 | msc_cbw_t cbw; |
| 227 | cbw_init(&cbw, lun); |
| 228 | |
| 229 | cbw.total_bytes = block_count*p_msc->capacity[lun].block_size; |
| 230 | cbw.dir = TUSB_DIR_IN_MASK; |
| 231 | cbw.cmd_len = sizeof(scsi_read10_t); |
| 232 | |
| 233 | scsi_read10_t const cmd_read10 = |
| 234 | { |
| 235 | .cmd_code = SCSI_CMD_READ_10, |
| 236 | .lba = tu_htonl(lba), |
| 237 | .block_count = tu_htons(block_count) |
| 238 | }; |
| 239 | |
| 240 | memcpy(cbw.command, &cmd_read10, cbw.cmd_len); |
| 241 | |
| 242 | return tuh_msc_scsi_command(dev_addr, &cbw, buffer, complete_cb); |
| 243 | } |
| 244 | |
| 245 | bool tuh_msc_write10(uint8_t dev_addr, uint8_t lun, void const * buffer, uint32_t lba, uint16_t block_count, tuh_msc_complete_cb_t complete_cb) |
| 246 | { |
| 247 | msch_interface_t* p_msc = get_itf(dev_addr); |
| 248 | TU_VERIFY(p_msc->mounted); |
| 249 | |
| 250 | msc_cbw_t cbw; |
| 251 | cbw_init(&cbw, lun); |
| 252 | |
| 253 | cbw.total_bytes = block_count*p_msc->capacity[lun].block_size; |
| 254 | cbw.dir = TUSB_DIR_OUT; |
| 255 | cbw.cmd_len = sizeof(scsi_write10_t); |
| 256 | |
| 257 | scsi_write10_t const cmd_write10 = |
| 258 | { |
| 259 | .cmd_code = SCSI_CMD_WRITE_10, |
| 260 | .lba = tu_htonl(lba), |
| 261 | .block_count = tu_htons(block_count) |
| 262 | }; |
| 263 | |
| 264 | memcpy(cbw.command, &cmd_write10, cbw.cmd_len); |
| 265 | |
| 266 | return tuh_msc_scsi_command(dev_addr, &cbw, (void*)(uintptr_t) buffer, complete_cb); |
| 267 | } |
| 268 | |
| 269 | #if 0 |
| 270 | // MSC interface Reset (not used now) |
| 271 | bool tuh_msc_reset(uint8_t dev_addr) |
| 272 | { |
| 273 | tusb_control_request_t const new_request = |
| 274 | { |
| 275 | .bmRequestType_bit = |
| 276 | { |
| 277 | .recipient = TUSB_REQ_RCPT_INTERFACE, |
| 278 | .type = TUSB_REQ_TYPE_CLASS, |
| 279 | .direction = TUSB_DIR_OUT |
| 280 | }, |
| 281 | .bRequest = MSC_REQ_RESET, |
| 282 | .wValue = 0, |
| 283 | .wIndex = p_msc->itf_num, |
| 284 | .wLength = 0 |
| 285 | }; |
| 286 | TU_ASSERT( usbh_control_xfer( dev_addr, &new_request, NULL ) ); |
| 287 | } |
| 288 | #endif |
| 289 | |
| 290 | //--------------------------------------------------------------------+ |
| 291 | // CLASS-USBH API |
| 292 | //--------------------------------------------------------------------+ |
| 293 | void msch_init(void) |
| 294 | { |
| 295 | tu_memclr(_msch_itf, sizeof(_msch_itf)); |
| 296 | } |
| 297 | |
| 298 | void msch_close(uint8_t dev_addr) |
| 299 | { |
| 300 | TU_VERIFY(dev_addr <= CFG_TUH_DEVICE_MAX, ); |
| 301 | |
| 302 | msch_interface_t* p_msc = get_itf(dev_addr); |
| 303 | |
| 304 | // invoke Application Callback |
| 305 | if (p_msc->mounted && tuh_msc_umount_cb) tuh_msc_umount_cb(dev_addr); |
| 306 | |
| 307 | tu_memclr(p_msc, sizeof(msch_interface_t)); |
| 308 | } |
| 309 | |
| 310 | bool msch_xfer_cb(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes) |
| 311 | { |
| 312 | msch_interface_t* p_msc = get_itf(dev_addr); |
| 313 | msc_cbw_t const * cbw = &p_msc->cbw; |
| 314 | msc_csw_t * csw = &p_msc->csw; |
| 315 | |
| 316 | switch (p_msc->stage) |
| 317 | { |
| 318 | case MSC_STAGE_CMD: |
| 319 | // Must be Command Block |
| 320 | TU_ASSERT(ep_addr == p_msc->ep_out && event == XFER_RESULT_SUCCESS && xferred_bytes == sizeof(msc_cbw_t)); |
| 321 | |
| 322 | if ( cbw->total_bytes && p_msc->buffer ) |
| 323 | { |
| 324 | // Data stage if any |
| 325 | p_msc->stage = MSC_STAGE_DATA; |
| 326 | |
| 327 | uint8_t const ep_data = (cbw->dir & TUSB_DIR_IN_MASK) ? p_msc->ep_in : p_msc->ep_out; |
| 328 | TU_ASSERT(usbh_edpt_xfer(dev_addr, ep_data, p_msc->buffer, cbw->total_bytes)); |
| 329 | }else |
| 330 | { |
| 331 | // Status stage |
| 332 | p_msc->stage = MSC_STAGE_STATUS; |
| 333 | TU_ASSERT(usbh_edpt_xfer(dev_addr, p_msc->ep_in, (uint8_t*) &p_msc->csw, sizeof(msc_csw_t))); |
| 334 | } |
| 335 | break; |
| 336 | |
| 337 | case MSC_STAGE_DATA: |
| 338 | // Status stage |
| 339 | p_msc->stage = MSC_STAGE_STATUS; |
| 340 | TU_ASSERT(usbh_edpt_xfer(dev_addr, p_msc->ep_in, (uint8_t*) &p_msc->csw, sizeof(msc_csw_t))); |
| 341 | break; |
| 342 | |
| 343 | case MSC_STAGE_STATUS: |
| 344 | // SCSI op is complete |
| 345 | p_msc->stage = MSC_STAGE_IDLE; |
| 346 | |
| 347 | if (p_msc->complete_cb) p_msc->complete_cb(dev_addr, cbw, csw); |
| 348 | break; |
| 349 | |
| 350 | // unknown state |
| 351 | default: break; |
| 352 | } |
| 353 | |
| 354 | return true; |
| 355 | } |
| 356 | |
| 357 | //--------------------------------------------------------------------+ |
| 358 | // MSC Enumeration |
| 359 | //--------------------------------------------------------------------+ |
| 360 | |
| 361 | static bool config_get_maxlun_complete (uint8_t dev_addr, tusb_control_request_t const * request, xfer_result_t result); |
| 362 | static bool config_test_unit_ready_complete(uint8_t dev_addr, msc_cbw_t const* cbw, msc_csw_t const* csw); |
| 363 | static bool config_request_sense_complete(uint8_t dev_addr, msc_cbw_t const* cbw, msc_csw_t const* csw); |
| 364 | static bool config_read_capacity_complete(uint8_t dev_addr, msc_cbw_t const* cbw, msc_csw_t const* csw); |
| 365 | |
| 366 | bool msch_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *desc_itf, uint16_t max_len) |
| 367 | { |
| 368 | TU_VERIFY (MSC_SUBCLASS_SCSI == desc_itf->bInterfaceSubClass && |
| 369 | MSC_PROTOCOL_BOT == desc_itf->bInterfaceProtocol); |
| 370 | |
| 371 | // msc driver length is fixed |
| 372 | uint16_t const drv_len = sizeof(tusb_desc_interface_t) + desc_itf->bNumEndpoints*sizeof(tusb_desc_endpoint_t); |
| 373 | TU_ASSERT(drv_len <= max_len); |
| 374 | |
| 375 | msch_interface_t* p_msc = get_itf(dev_addr); |
| 376 | tusb_desc_endpoint_t const * ep_desc = (tusb_desc_endpoint_t const *) tu_desc_next(desc_itf); |
| 377 | |
| 378 | for(uint32_t i=0; i<2; i++) |
| 379 | { |
| 380 | TU_ASSERT(TUSB_DESC_ENDPOINT == ep_desc->bDescriptorType && TUSB_XFER_BULK == ep_desc->bmAttributes.xfer); |
| 381 | TU_ASSERT(usbh_edpt_open(rhport, dev_addr, ep_desc)); |
| 382 | |
| 383 | if ( tu_edpt_dir(ep_desc->bEndpointAddress) == TUSB_DIR_IN ) |
| 384 | { |
| 385 | p_msc->ep_in = ep_desc->bEndpointAddress; |
| 386 | }else |
| 387 | { |
| 388 | p_msc->ep_out = ep_desc->bEndpointAddress; |
| 389 | } |
| 390 | |
| 391 | ep_desc = (tusb_desc_endpoint_t const *) tu_desc_next(ep_desc); |
| 392 | } |
| 393 | |
| 394 | p_msc->itf_num = desc_itf->bInterfaceNumber; |
| 395 | |
| 396 | return true; |
| 397 | } |
| 398 | |
| 399 | bool msch_set_config(uint8_t dev_addr, uint8_t itf_num) |
| 400 | { |
| 401 | msch_interface_t* p_msc = get_itf(dev_addr); |
| 402 | TU_ASSERT(p_msc->itf_num == itf_num); |
| 403 | |
| 404 | p_msc->configured = true; |
| 405 | |
| 406 | //------------- Get Max Lun -------------// |
| 407 | TU_LOG2("MSC Get Max Lun\r\n"); |
| 408 | tusb_control_request_t request = |
| 409 | { |
| 410 | .bmRequestType_bit = |
| 411 | { |
| 412 | .recipient = TUSB_REQ_RCPT_INTERFACE, |
| 413 | .type = TUSB_REQ_TYPE_CLASS, |
| 414 | .direction = TUSB_DIR_IN |
| 415 | }, |
| 416 | .bRequest = MSC_REQ_GET_MAX_LUN, |
| 417 | .wValue = 0, |
| 418 | .wIndex = itf_num, |
| 419 | .wLength = 1 |
| 420 | }; |
| 421 | TU_ASSERT(tuh_control_xfer(dev_addr, &request, &p_msc->max_lun, config_get_maxlun_complete)); |
| 422 | |
| 423 | return true; |
| 424 | } |
| 425 | |
| 426 | static bool config_get_maxlun_complete (uint8_t dev_addr, tusb_control_request_t const * request, xfer_result_t result) |
| 427 | { |
| 428 | (void) request; |
| 429 | |
| 430 | msch_interface_t* p_msc = get_itf(dev_addr); |
| 431 | |
| 432 | // STALL means zero |
| 433 | p_msc->max_lun = (XFER_RESULT_SUCCESS == result) ? _msch_buffer[0] : 0; |
| 434 | p_msc->max_lun++; // MAX LUN is minus 1 by specs |
| 435 | |
| 436 | // TODO multiple LUN support |
| 437 | TU_LOG2("SCSI Test Unit Ready\r\n"); |
| 438 | uint8_t const lun = 0; |
| 439 | tuh_msc_test_unit_ready(dev_addr, lun, config_test_unit_ready_complete); |
| 440 | |
| 441 | return true; |
| 442 | } |
| 443 | |
| 444 | static bool config_test_unit_ready_complete(uint8_t dev_addr, msc_cbw_t const* cbw, msc_csw_t const* csw) |
| 445 | { |
| 446 | if (csw->status == 0) |
| 447 | { |
| 448 | // Unit is ready, read its capacity |
| 449 | TU_LOG2("SCSI Read Capacity\r\n"); |
| 450 | tuh_msc_read_capacity(dev_addr, cbw->lun, (scsi_read_capacity10_resp_t*) ((void*) _msch_buffer), config_read_capacity_complete); |
| 451 | }else |
| 452 | { |
| 453 | // Note: During enumeration, some device fails Test Unit Ready and require a few retries |
| 454 | // with Request Sense to start working !! |
| 455 | // TODO limit number of retries |
| 456 | TU_LOG2("SCSI Request Sense\r\n"); |
| 457 | TU_ASSERT(tuh_msc_request_sense(dev_addr, cbw->lun, _msch_buffer, config_request_sense_complete)); |
| 458 | } |
| 459 | |
| 460 | return true; |
| 461 | } |
| 462 | |
| 463 | static bool config_request_sense_complete(uint8_t dev_addr, msc_cbw_t const* cbw, msc_csw_t const* csw) |
| 464 | { |
| 465 | TU_ASSERT(csw->status == 0); |
| 466 | TU_ASSERT(tuh_msc_test_unit_ready(dev_addr, cbw->lun, config_test_unit_ready_complete)); |
| 467 | return true; |
| 468 | } |
| 469 | |
| 470 | static bool config_read_capacity_complete(uint8_t dev_addr, msc_cbw_t const* cbw, msc_csw_t const* csw) |
| 471 | { |
| 472 | TU_ASSERT(csw->status == 0); |
| 473 | |
| 474 | msch_interface_t* p_msc = get_itf(dev_addr); |
| 475 | |
| 476 | // Capacity response field: Block size and Last LBA are both Big-Endian |
| 477 | scsi_read_capacity10_resp_t* resp = (scsi_read_capacity10_resp_t*) ((void*) _msch_buffer); |
| 478 | p_msc->capacity[cbw->lun].block_count = tu_ntohl(resp->last_lba) + 1; |
| 479 | p_msc->capacity[cbw->lun].block_size = tu_ntohl(resp->block_size); |
| 480 | |
| 481 | // Mark enumeration is complete |
| 482 | p_msc->mounted = true; |
| 483 | if (tuh_msc_mount_cb) tuh_msc_mount_cb(dev_addr); |
| 484 | |
| 485 | // notify usbh that driver enumeration is complete |
| 486 | usbh_driver_set_config_complete(dev_addr, p_msc->itf_num); |
| 487 | |
| 488 | return true; |
| 489 | } |
| 490 | |
| 491 | #endif |