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Austin Schuh41baf202022-01-01 14:33:40 -08001/*
2 * The MIT License (MIT)
3 *
4 * Copyright (c) 2021, Ha Thach (tinyusb.org)
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 *
24 * This file is part of the TinyUSB stack.
25 */
26
27#ifndef BOARD_H_
28#define BOARD_H_
29
30#ifdef __cplusplus
31 extern "C" {
32#endif
33
34#define LED_PORT GPIOJ
35#define LED_PIN GPIO_PIN_2
36#define LED_STATE_ON 1
37
38// Blue push-button
39#define BUTTON_PORT GPIOC
40#define BUTTON_PIN GPIO_PIN_13
41#define BUTTON_STATE_ACTIVE 1
42
43// UART
44#define UART_DEV USART3
45#define UART_CLK_EN __HAL_RCC_USART3_CLK_ENABLE
46#define UART_GPIO_PORT GPIOB
47#define UART_GPIO_AF GPIO_AF7_USART3
48#define UART_TX_PIN GPIO_PIN_10
49#define UART_RX_PIN GPIO_PIN_11
50
51// VBUS Sense detection
52#define OTG_FS_VBUS_SENSE 1
53#define OTG_HS_VBUS_SENSE 0
54
55//--------------------------------------------------------------------+
56// RCC Clock
57//--------------------------------------------------------------------+
58static inline void board_stm32h7_clock_init(void)
59{
60 RCC_ClkInitTypeDef RCC_ClkInitStruct;
61 RCC_OscInitTypeDef RCC_OscInitStruct;
62 RCC_PeriphCLKInitTypeDef PeriphClkInitStruct;
63
64 /*!< Supply configuration update enable */
65 /* For STM32H750XB, use "HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);" */
66 HAL_PWREx_ConfigSupply(PWR_DIRECT_SMPS_SUPPLY);
67
68 /* The voltage scaling allows optimizing the power consumption when the
69 device is clocked below the maximum system frequency, to update the
70 voltage scaling value regarding system frequency refer to product
71 datasheet. */
72 __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
73
74 while ((PWR->D3CR & (PWR_D3CR_VOSRDY)) != PWR_D3CR_VOSRDY) {}
75
76 /* Enable HSE Oscillator and activate PLL with HSE as source */
77 RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
78 RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS;
79 RCC_OscInitStruct.HSIState = RCC_HSI_OFF;
80 RCC_OscInitStruct.CSIState = RCC_CSI_OFF;
81 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
82 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
83
84 /* PLL1 for System Clock */
85 RCC_OscInitStruct.PLL.PLLM = 5;
86 RCC_OscInitStruct.PLL.PLLN = 160;
87 RCC_OscInitStruct.PLL.PLLFRACN = 0;
88 RCC_OscInitStruct.PLL.PLLP = 2;
89 RCC_OscInitStruct.PLL.PLLR = 2;
90 RCC_OscInitStruct.PLL.PLLQ = 4;
91
92 RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOMEDIUM;
93 RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_2;
94 HAL_RCC_OscConfig(&RCC_OscInitStruct);
95
96 /* PLL3 for USB Clock */
97 PeriphClkInitStruct.PLL3.PLL3M = 25;
98 PeriphClkInitStruct.PLL3.PLL3N = 336;
99 PeriphClkInitStruct.PLL3.PLL3FRACN = 0;
100 PeriphClkInitStruct.PLL3.PLL3P = 2;
101 PeriphClkInitStruct.PLL3.PLL3R = 2;
102 PeriphClkInitStruct.PLL3.PLL3Q = 7;
103
104 PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB;
105 PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_PLL3;
106 HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);
107
108 /* Select PLL as system clock source and configure bus clocks dividers */
109 RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_D1PCLK1 | RCC_CLOCKTYPE_PCLK1 | \
110 RCC_CLOCKTYPE_PCLK2 | RCC_CLOCKTYPE_D3PCLK1);
111
112 RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
113 RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1;
114 RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2;
115 RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2;
116 RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2;
117 RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV1;
118 HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4);
119
120 /*activate CSI clock mondatory for I/O Compensation Cell*/
121 __HAL_RCC_CSI_ENABLE() ;
122
123 /* Enable SYSCFG clock mondatory for I/O Compensation Cell */
124 __HAL_RCC_SYSCFG_CLK_ENABLE() ;
125
126 /* Enables the I/O Compensation Cell */
127 HAL_EnableCompensationCell();
128}
129
130static inline void board_stm32h7_post_init(void)
131{
132 // For this board does nothing
133}
134
135#ifdef __cplusplus
136 }
137#endif
138
139#endif