Brian Silverman | f92396c | 2013-09-12 20:13:13 -0700 | [diff] [blame] | 1 | #include "fill_packet.h" |
| 2 | #include "encoder.h" |
| 3 | |
| 4 | #include "FreeRTOS.h" |
| 5 | #include "task.h" |
| 6 | |
| 7 | #include "digital.h" |
| 8 | #include "analog.h" |
| 9 | |
| 10 | // How long (in ms) to wait after a falling edge on the bottom indexer sensor |
| 11 | // before reading the indexer encoder. |
| 12 | static const int kBottomFallDelayTime = 32; |
| 13 | |
| 14 | #define ENC(gpio, a, b) readGPIO(gpio, a) * 2 + readGPIO(gpio, b) |
| 15 | int encoder_bits(int channel) { |
| 16 | switch (channel) { |
| 17 | case 0: |
| 18 | return ENC(GPIO1, 20, 23); |
| 19 | case 1: |
| 20 | return ENC(GPIO2, 11, 12); |
| 21 | case 2: |
| 22 | return ENC(GPIO0, 21, 22); |
| 23 | case 3: |
| 24 | return ENC(GPIO0, 19, 20); |
| 25 | default: |
| 26 | return -1; |
| 27 | } |
| 28 | return -1; |
| 29 | } |
| 30 | #undef ENC |
| 31 | |
| 32 | // Uses EINT1 and EINT2 on 2.11 and 2.12. |
| 33 | volatile int32_t encoder1_val; |
| 34 | // On GPIO pins 0.22 and 0.21. |
| 35 | volatile int32_t encoder2_val; |
| 36 | // On GPIO pins 0.20 and 0.19. |
| 37 | volatile int32_t encoder3_val; |
| 38 | // On GPIO pins 2.0 and 2.1. |
| 39 | volatile int32_t encoder4_val; |
| 40 | // On GPIO pins 2.2 and 2.3. |
| 41 | volatile int32_t encoder5_val; |
| 42 | |
| 43 | // ENC1A 2.11 |
| 44 | void EINT1_IRQHandler(void) { |
Brian Silverman | 1623c33 | 2013-10-01 18:05:16 -0700 | [diff] [blame] | 45 | SC->EXTPOLAR ^= 0x2; |
Brian Silverman | f92396c | 2013-09-12 20:13:13 -0700 | [diff] [blame] | 46 | SC->EXTINT = 0x2; |
| 47 | int fiopin = GPIO2->FIOPIN; |
| 48 | if (((fiopin >> 1) ^ fiopin) & 0x800) { |
| 49 | ++encoder1_val; |
| 50 | } else { |
| 51 | --encoder1_val; |
| 52 | } |
Brian Silverman | f92396c | 2013-09-12 20:13:13 -0700 | [diff] [blame] | 53 | } |
| 54 | // ENC1B 2.12 |
| 55 | void EINT2_IRQHandler(void) { |
Brian Silverman | 1623c33 | 2013-10-01 18:05:16 -0700 | [diff] [blame] | 56 | SC->EXTPOLAR ^= 0x4; |
Brian Silverman | f92396c | 2013-09-12 20:13:13 -0700 | [diff] [blame] | 57 | SC->EXTINT = 0x4; |
| 58 | int fiopin = GPIO2->FIOPIN; |
| 59 | if (((fiopin >> 1) ^ fiopin) & 0x800) { |
| 60 | --encoder1_val; |
| 61 | } else { |
| 62 | ++encoder1_val; |
| 63 | } |
Brian Silverman | f92396c | 2013-09-12 20:13:13 -0700 | [diff] [blame] | 64 | } |
| 65 | |
Brian Silverman | 1623c33 | 2013-10-01 18:05:16 -0700 | [diff] [blame] | 66 | // TODO(brians): Have this indicate some kind of error instead of just looping |
| 67 | // infinitely in the ISR because it never clears it. |
| 68 | static void NoGPIO(void) {} |
| 69 | static void Encoder2ARise(void) { |
| 70 | GPIOINT->IO0IntClr = (1 << 22); |
Brian Silverman | f92396c | 2013-09-12 20:13:13 -0700 | [diff] [blame] | 71 | if (GPIO0->FIOPIN & (1 << 21)) { |
| 72 | ++encoder2_val; |
| 73 | } else { |
| 74 | --encoder2_val; |
| 75 | } |
| 76 | } |
Brian Silverman | 1623c33 | 2013-10-01 18:05:16 -0700 | [diff] [blame] | 77 | static void Encoder2AFall(void) { |
| 78 | GPIOINT->IO0IntClr = (1 << 22); |
Brian Silverman | f92396c | 2013-09-12 20:13:13 -0700 | [diff] [blame] | 79 | if (GPIO0->FIOPIN & (1 << 21)) { |
| 80 | --encoder2_val; |
| 81 | } else { |
| 82 | ++encoder2_val; |
| 83 | } |
| 84 | } |
Brian Silverman | 1623c33 | 2013-10-01 18:05:16 -0700 | [diff] [blame] | 85 | static void Encoder2BRise(void) { |
| 86 | GPIOINT->IO0IntClr = (1 << 21); |
Brian Silverman | f92396c | 2013-09-12 20:13:13 -0700 | [diff] [blame] | 87 | if (GPIO0->FIOPIN & (1 << 22)) { |
| 88 | --encoder2_val; |
| 89 | } else { |
| 90 | ++encoder2_val; |
| 91 | } |
| 92 | } |
Brian Silverman | 1623c33 | 2013-10-01 18:05:16 -0700 | [diff] [blame] | 93 | static void Encoder2BFall(void) { |
| 94 | GPIOINT->IO0IntClr = (1 << 21); |
Brian Silverman | f92396c | 2013-09-12 20:13:13 -0700 | [diff] [blame] | 95 | if (GPIO0->FIOPIN & (1 << 22)) { |
| 96 | ++encoder2_val; |
| 97 | } else { |
| 98 | --encoder2_val; |
| 99 | } |
| 100 | } |
| 101 | |
Brian Silverman | 1623c33 | 2013-10-01 18:05:16 -0700 | [diff] [blame] | 102 | static void Encoder3ARise(void) { |
| 103 | GPIOINT->IO0IntClr = (1 << 20); |
Brian Silverman | f92396c | 2013-09-12 20:13:13 -0700 | [diff] [blame] | 104 | if (GPIO0->FIOPIN & (1 << 19)) { |
| 105 | ++encoder3_val; |
| 106 | } else { |
| 107 | --encoder3_val; |
| 108 | } |
| 109 | } |
Brian Silverman | 1623c33 | 2013-10-01 18:05:16 -0700 | [diff] [blame] | 110 | static void Encoder3AFall(void) { |
| 111 | GPIOINT->IO0IntClr = (1 << 20); |
Brian Silverman | f92396c | 2013-09-12 20:13:13 -0700 | [diff] [blame] | 112 | if (GPIO0->FIOPIN & (1 << 19)) { |
| 113 | --encoder3_val; |
| 114 | } else { |
| 115 | ++encoder3_val; |
| 116 | } |
| 117 | } |
Brian Silverman | 1623c33 | 2013-10-01 18:05:16 -0700 | [diff] [blame] | 118 | static void Encoder3BRise(void) { |
| 119 | GPIOINT->IO0IntClr = (1 << 19); |
Brian Silverman | f92396c | 2013-09-12 20:13:13 -0700 | [diff] [blame] | 120 | if (GPIO0->FIOPIN & (1 << 20)) { |
| 121 | --encoder3_val; |
| 122 | } else { |
| 123 | ++encoder3_val; |
| 124 | } |
| 125 | } |
Brian Silverman | 1623c33 | 2013-10-01 18:05:16 -0700 | [diff] [blame] | 126 | static void Encoder3BFall(void) { |
| 127 | GPIOINT->IO0IntClr = (1 << 19); |
Brian Silverman | f92396c | 2013-09-12 20:13:13 -0700 | [diff] [blame] | 128 | if (GPIO0->FIOPIN & (1 << 20)) { |
| 129 | ++encoder3_val; |
| 130 | } else { |
| 131 | --encoder3_val; |
| 132 | } |
| 133 | } |
| 134 | |
Brian Silverman | 1623c33 | 2013-10-01 18:05:16 -0700 | [diff] [blame] | 135 | static void Encoder4ARise(void) { |
| 136 | GPIOINT->IO2IntClr = (1 << 0); |
Brian Silverman | f92396c | 2013-09-12 20:13:13 -0700 | [diff] [blame] | 137 | if (GPIO2->FIOPIN & (1 << 1)) { |
| 138 | ++encoder4_val; |
| 139 | } else { |
| 140 | --encoder4_val; |
| 141 | } |
| 142 | } |
Brian Silverman | 1623c33 | 2013-10-01 18:05:16 -0700 | [diff] [blame] | 143 | static void Encoder4AFall(void) { |
| 144 | GPIOINT->IO2IntClr = (1 << 0); |
Brian Silverman | f92396c | 2013-09-12 20:13:13 -0700 | [diff] [blame] | 145 | if (GPIO2->FIOPIN & (1 << 1)) { |
| 146 | --encoder4_val; |
| 147 | } else { |
| 148 | ++encoder4_val; |
| 149 | } |
| 150 | } |
Brian Silverman | 1623c33 | 2013-10-01 18:05:16 -0700 | [diff] [blame] | 151 | static void Encoder4BRise(void) { |
| 152 | GPIOINT->IO2IntClr = (1 << 1); |
Brian Silverman | f92396c | 2013-09-12 20:13:13 -0700 | [diff] [blame] | 153 | if (GPIO2->FIOPIN & (1 << 0)) { |
| 154 | --encoder4_val; |
| 155 | } else { |
| 156 | ++encoder4_val; |
| 157 | } |
| 158 | } |
Brian Silverman | 1623c33 | 2013-10-01 18:05:16 -0700 | [diff] [blame] | 159 | static void Encoder4BFall(void) { |
| 160 | GPIOINT->IO2IntClr = (1 << 1); |
Brian Silverman | f92396c | 2013-09-12 20:13:13 -0700 | [diff] [blame] | 161 | if (GPIO2->FIOPIN & (1 << 0)) { |
| 162 | ++encoder4_val; |
| 163 | } else { |
| 164 | --encoder4_val; |
| 165 | } |
| 166 | } |
| 167 | |
Brian Silverman | 1623c33 | 2013-10-01 18:05:16 -0700 | [diff] [blame] | 168 | static void Encoder5ARise(void) { |
| 169 | GPIOINT->IO2IntClr = (1 << 2); |
Brian Silverman | f92396c | 2013-09-12 20:13:13 -0700 | [diff] [blame] | 170 | if (GPIO2->FIOPIN & (1 << 3)) { |
| 171 | ++encoder5_val; |
| 172 | } else { |
| 173 | --encoder5_val; |
| 174 | } |
| 175 | } |
Brian Silverman | 1623c33 | 2013-10-01 18:05:16 -0700 | [diff] [blame] | 176 | static void Encoder5AFall(void) { |
| 177 | GPIOINT->IO2IntClr = (1 << 2); |
Brian Silverman | f92396c | 2013-09-12 20:13:13 -0700 | [diff] [blame] | 178 | if (GPIO2->FIOPIN & (1 << 3)) { |
| 179 | --encoder5_val; |
| 180 | } else { |
| 181 | ++encoder5_val; |
| 182 | } |
| 183 | } |
Brian Silverman | 1623c33 | 2013-10-01 18:05:16 -0700 | [diff] [blame] | 184 | static void Encoder5BRise(void) { |
| 185 | GPIOINT->IO2IntClr = (1 << 3); |
Brian Silverman | f92396c | 2013-09-12 20:13:13 -0700 | [diff] [blame] | 186 | if (GPIO2->FIOPIN & (1 << 2)) { |
| 187 | --encoder5_val; |
| 188 | } else { |
| 189 | ++encoder5_val; |
| 190 | } |
| 191 | } |
Brian Silverman | 1623c33 | 2013-10-01 18:05:16 -0700 | [diff] [blame] | 192 | static void Encoder5BFall(void) { |
| 193 | GPIOINT->IO2IntClr = (1 << 3); |
Brian Silverman | f92396c | 2013-09-12 20:13:13 -0700 | [diff] [blame] | 194 | if (GPIO2->FIOPIN & (1 << 2)) { |
| 195 | ++encoder5_val; |
| 196 | } else { |
| 197 | --encoder5_val; |
| 198 | } |
| 199 | } |
| 200 | |
| 201 | volatile int32_t capture_top_rise; |
| 202 | volatile int8_t top_rise_count; |
Brian Silverman | 1623c33 | 2013-10-01 18:05:16 -0700 | [diff] [blame] | 203 | static void IndexerTopRise(void) { |
| 204 | GPIOINT->IO0IntClr = (1 << 5); |
Brian Silverman | f92396c | 2013-09-12 20:13:13 -0700 | [diff] [blame] | 205 | // edge counting encoder capture |
| 206 | ++top_rise_count; |
| 207 | capture_top_rise = encoder3_val; |
| 208 | } |
| 209 | volatile int32_t capture_top_fall; |
| 210 | volatile int8_t top_fall_count; |
Brian Silverman | 1623c33 | 2013-10-01 18:05:16 -0700 | [diff] [blame] | 211 | static void IndexerTopFall(void) { |
| 212 | GPIOINT->IO0IntClr = (1 << 5); |
Brian Silverman | f92396c | 2013-09-12 20:13:13 -0700 | [diff] [blame] | 213 | // edge counting encoder capture |
| 214 | ++top_fall_count; |
| 215 | capture_top_fall = encoder3_val; |
| 216 | } |
| 217 | volatile int8_t bottom_rise_count; |
Brian Silverman | 1623c33 | 2013-10-01 18:05:16 -0700 | [diff] [blame] | 218 | static void IndexerBottomRise(void) { |
| 219 | GPIOINT->IO0IntClr = (1 << 4); |
Brian Silverman | f92396c | 2013-09-12 20:13:13 -0700 | [diff] [blame] | 220 | // edge counting |
| 221 | ++bottom_rise_count; |
| 222 | } |
| 223 | volatile int32_t capture_bottom_fall_delay; |
| 224 | volatile int8_t bottom_fall_delay_count; |
| 225 | volatile int32_t dirty_delay; |
| 226 | portTickType xDelayTimeFrom; |
| 227 | static portTASK_FUNCTION(vDelayCapture, pvParameters) |
| 228 | { |
| 229 | portTickType xSleepFrom = xTaskGetTickCount(); |
| 230 | |
| 231 | for (;;) { |
| 232 | NVIC_DisableIRQ(EINT3_IRQn); |
| 233 | if (dirty_delay != 0) { |
| 234 | xSleepFrom = xDelayTimeFrom; |
| 235 | dirty_delay = 0; |
| 236 | NVIC_EnableIRQ(EINT3_IRQn); |
| 237 | |
| 238 | vTaskDelayUntil(&xSleepFrom, kBottomFallDelayTime / portTICK_RATE_MS); |
| 239 | |
Brian Silverman | 1623c33 | 2013-10-01 18:05:16 -0700 | [diff] [blame] | 240 | NVIC_DisableIRQ(USB_IRQn); |
Brian Silverman | f92396c | 2013-09-12 20:13:13 -0700 | [diff] [blame] | 241 | capture_bottom_fall_delay = encoder3_val; |
Brian Silverman | 1623c33 | 2013-10-01 18:05:16 -0700 | [diff] [blame] | 242 | ++bottom_fall_delay_count; |
| 243 | NVIC_EnableIRQ(USB_IRQn); |
Brian Silverman | f92396c | 2013-09-12 20:13:13 -0700 | [diff] [blame] | 244 | } else { |
| 245 | NVIC_EnableIRQ(EINT3_IRQn); |
| 246 | vTaskDelayUntil(&xSleepFrom, 10 / portTICK_RATE_MS); |
| 247 | } |
| 248 | } |
| 249 | } |
| 250 | |
| 251 | volatile int8_t bottom_fall_count; |
Brian Silverman | 1623c33 | 2013-10-01 18:05:16 -0700 | [diff] [blame] | 252 | static void IndexerBottomFall(void) { |
| 253 | GPIOINT->IO0IntClr = (1 << 4); |
Brian Silverman | f92396c | 2013-09-12 20:13:13 -0700 | [diff] [blame] | 254 | ++bottom_fall_count; |
| 255 | // edge counting start delayed capture |
| 256 | xDelayTimeFrom = xTaskGetTickCount(); |
| 257 | dirty_delay = 1; |
| 258 | } |
| 259 | volatile int32_t capture_wrist_rise; |
| 260 | volatile int8_t wrist_rise_count; |
Brian Silverman | 1623c33 | 2013-10-01 18:05:16 -0700 | [diff] [blame] | 261 | static void WristHallRise(void) { |
| 262 | GPIOINT->IO0IntClr = (1 << 6); |
Brian Silverman | f92396c | 2013-09-12 20:13:13 -0700 | [diff] [blame] | 263 | // edge counting encoder capture |
| 264 | ++wrist_rise_count; |
| 265 | capture_wrist_rise = (int32_t)QEI->QEIPOS; |
| 266 | } |
| 267 | volatile int32_t capture_shooter_angle_rise; |
| 268 | volatile int8_t shooter_angle_rise_count; |
Brian Silverman | 1623c33 | 2013-10-01 18:05:16 -0700 | [diff] [blame] | 269 | static void ShooterHallRise(void) { |
| 270 | GPIOINT->IO0IntClr = (1 << 7); |
Brian Silverman | f92396c | 2013-09-12 20:13:13 -0700 | [diff] [blame] | 271 | // edge counting encoder capture |
| 272 | ++shooter_angle_rise_count; |
| 273 | capture_shooter_angle_rise = encoder2_val; |
| 274 | } |
| 275 | |
| 276 | // Count leading zeros. |
| 277 | // Returns 0 if bit 31 is set etc. |
| 278 | __attribute__((always_inline)) static __INLINE uint32_t __clz(uint32_t value) { |
| 279 | uint32_t result; |
| 280 | __asm__("clz %0, %1" : "=r" (result) : "r" (value)); |
| 281 | return result; |
| 282 | } |
| 283 | inline static void IRQ_Dispatch(void) { |
| 284 | // TODO(brians): think about adding a loop here so that we can handle multiple |
| 285 | // interrupts right on top of each other faster |
| 286 | uint32_t index = __clz(GPIOINT->IO2IntStatR | GPIOINT->IO0IntStatR | |
| 287 | (GPIOINT->IO2IntStatF << 28) | (GPIOINT->IO0IntStatF << 4)); |
| 288 | |
| 289 | typedef void (*Handler)(void); |
| 290 | const static Handler table[] = { |
| 291 | Encoder5BFall, // index 0: P2.3 Fall #bit 31 //Encoder 5 B //Dio 10 |
| 292 | Encoder5AFall, // index 1: P2.2 Fall #bit 30 //Encoder 5 A //Dio 9 |
| 293 | Encoder4BFall, // index 2: P2.1 Fall #bit 29 //Encoder 4 B //Dio 8 |
| 294 | Encoder4AFall, // index 3: P2.0 Fall #bit 28 //Encoder 4 A //Dio 7 |
| 295 | NoGPIO, // index 4: NO GPIO #bit 27 |
| 296 | Encoder2AFall, // index 5: P0.22 Fall #bit 26 //Encoder 2 A |
| 297 | Encoder2BFall, // index 6: P0.21 Fall #bit 25 //Encoder 2 B |
| 298 | Encoder3AFall, // index 7: P0.20 Fall #bit 24 //Encoder 3 A |
| 299 | Encoder3BFall, // index 8: P0.19 Fall #bit 23 //Encoder 3 B |
| 300 | Encoder2ARise, // index 9: P0.22 Rise #bit 22 //Encoder 2 A |
| 301 | Encoder2BRise, // index 10: P0.21 Rise #bit 21 //Encoder 2 B |
| 302 | Encoder3ARise, // index 11: P0.20 Rise #bit 20 //Encoder 3 A |
| 303 | Encoder3BRise, // index 12: P0.19 Rise #bit 19 //Encoder 3 B |
| 304 | NoGPIO, // index 13: NO GPIO #bit 18 |
| 305 | NoGPIO, // index 14: NO GPIO #bit 17 |
| 306 | NoGPIO, // index 15: NO GPIO #bit 16 |
| 307 | NoGPIO, // index 16: NO GPIO #bit 15 |
| 308 | NoGPIO, // index 17: NO GPIO #bit 14 |
| 309 | NoGPIO, // index 18: NO GPIO #bit 13 |
| 310 | NoGPIO, // index 19: NO GPIO #bit 12 |
| 311 | ShooterHallRise, // index 20: P0.7 Fall #bit 11 //Shooter Hall //Dio 4 |
| 312 | WristHallRise, // index 21: P0.6 Fall #bit 10 //Wrist Hall //Dio 3 |
| 313 | IndexerTopRise, // index 22: P0.5 Fall #bit 9 //Indexer Top //Dio 2 |
| 314 | IndexerBottomRise, // index 23: P0.4 Fall #bit 8 //Indexer Bottom //Dio 1 |
| 315 | NoGPIO, // index 24: NO GPIO #bit 7 |
| 316 | NoGPIO, // index 25: NO GPIO #bit 6 |
| 317 | IndexerTopFall, // index 26: P0.5 Rise #bit 5 //Indexer Top //Dio 2 |
| 318 | IndexerBottomFall, // index 27: P0.4 Rise #bit 4 //Indexer Bottom //Dio 1 |
| 319 | Encoder5BRise, // index 28: P2.3 Rise #bit 3 //Encoder 5 B //Dio 10 |
| 320 | Encoder5ARise, // index 29: P2.2 Rise #bit 2 //Encoder 5 A //Dio 9 |
| 321 | Encoder4BRise, // index 30: P2.1 Rise #bit 1 //Encoder 4 B //Dio 8 |
| 322 | Encoder4ARise, // index 31: P2.0 Rise #bit 0 //Encoder 4 A //Dio 7 |
| 323 | NoGPIO // index 32: NO BITS SET #False Alarm |
| 324 | }; |
| 325 | table[index](); |
| 326 | } |
| 327 | void EINT3_IRQHandler(void) { |
Brian Silverman | f92396c | 2013-09-12 20:13:13 -0700 | [diff] [blame] | 328 | IRQ_Dispatch(); |
Brian Silverman | f92396c | 2013-09-12 20:13:13 -0700 | [diff] [blame] | 329 | } |
| 330 | int32_t encoder_val(int chan) { |
| 331 | int32_t val; |
| 332 | switch (chan) { |
| 333 | case 0: // Wrist |
| 334 | return (int32_t)QEI->QEIPOS; |
| 335 | case 1: // Shooter Wheel |
| 336 | NVIC_DisableIRQ(EINT1_IRQn); |
| 337 | NVIC_DisableIRQ(EINT2_IRQn); |
| 338 | val = encoder1_val; |
| 339 | NVIC_EnableIRQ(EINT2_IRQn); |
| 340 | NVIC_EnableIRQ(EINT1_IRQn); |
| 341 | return val; |
| 342 | case 2: // Shooter Angle |
| 343 | NVIC_DisableIRQ(EINT3_IRQn); |
| 344 | val = encoder2_val; |
| 345 | NVIC_EnableIRQ(EINT3_IRQn); |
| 346 | return val; |
| 347 | case 3: // Indexer |
| 348 | NVIC_DisableIRQ(EINT3_IRQn); |
| 349 | val = encoder3_val; |
| 350 | NVIC_EnableIRQ(EINT3_IRQn); |
| 351 | return val; |
| 352 | case 4: // Drive R |
| 353 | NVIC_DisableIRQ(EINT3_IRQn); |
| 354 | val = encoder4_val; |
| 355 | NVIC_EnableIRQ(EINT3_IRQn); |
| 356 | return val; |
| 357 | case 5: // Drive L |
| 358 | NVIC_DisableIRQ(EINT3_IRQn); |
| 359 | val = encoder5_val; |
| 360 | NVIC_EnableIRQ(EINT3_IRQn); |
| 361 | return val; |
| 362 | default: |
| 363 | return -1; |
| 364 | } |
| 365 | } |
| 366 | |
| 367 | void encoder_init(void) { |
| 368 | // Setup the encoder interface. |
| 369 | SC->PCONP |= PCONP_PCQEI; |
| 370 | PINCON->PINSEL3 = ((PINCON->PINSEL3 & 0xffff3dff) | 0x00004100); |
| 371 | // Reset the count and velocity. |
| 372 | QEI->QEICON = 0x00000005; |
| 373 | QEI->QEICONF = 0x00000004; |
| 374 | // Wrap back to 0 when we wrap the int and vice versa. |
| 375 | QEI->QEIMAXPOS = 0xFFFFFFFF; |
| 376 | |
| 377 | // Set up encoder 1. |
| 378 | // Make GPIOs 2.11 and 2.12 trigger EINT1 and EINT2 (respectively). |
| 379 | // PINSEL4[23:22] = {0 1} |
| 380 | // PINSEL4[25:24] = {0 1} |
| 381 | PINCON->PINSEL4 = (PINCON->PINSEL4 & ~(0x3 << 22)) | (0x1 << 22); |
| 382 | PINCON->PINSEL4 = (PINCON->PINSEL4 & ~(0x3 << 24)) | (0x1 << 24); |
| 383 | // Clear the interrupt flags for EINT1 and EINT2 (0x6 = 0b0110). |
| 384 | SC->EXTMODE = 0x6; |
| 385 | SC->EXTINT = 0x6; |
| 386 | NVIC_EnableIRQ(EINT1_IRQn); |
| 387 | NVIC_EnableIRQ(EINT2_IRQn); |
| 388 | encoder1_val = 0; |
| 389 | |
| 390 | // Set up encoder 2. |
| 391 | GPIOINT->IO0IntEnF |= (1 << 22); // Set GPIO falling interrupt. |
| 392 | GPIOINT->IO0IntEnR |= (1 << 22); // Set GPIO rising interrupt. |
| 393 | GPIOINT->IO0IntEnF |= (1 << 21); // Set GPIO falling interrupt. |
| 394 | GPIOINT->IO0IntEnR |= (1 << 21); // Set GPIO rising interrupt. |
| 395 | // Make sure they're in mode 00 (the default, aka nothing special). |
| 396 | PINCON->PINSEL1 &= ~(0x3 << 12); |
| 397 | PINCON->PINSEL1 &= ~(0x3 << 10); |
| 398 | encoder2_val = 0; |
| 399 | |
| 400 | // Set up encoder 3. |
| 401 | GPIOINT->IO0IntEnF |= (1 << 20); // Set GPIO falling interrupt. |
| 402 | GPIOINT->IO0IntEnR |= (1 << 20); // Set GPIO rising interrupt. |
| 403 | GPIOINT->IO0IntEnF |= (1 << 19); // Set GPIO falling interrupt. |
| 404 | GPIOINT->IO0IntEnR |= (1 << 19); // Set GPIO rising interrupt. |
| 405 | // Make sure they're in mode 00 (the default, aka nothing special). |
| 406 | PINCON->PINSEL1 &= ~(0x3 << 8); |
| 407 | PINCON->PINSEL1 &= ~(0x3 << 6); |
| 408 | encoder3_val = 0; |
| 409 | |
| 410 | // Set up encoder 4. |
| 411 | GPIOINT->IO2IntEnF |= (1 << 0); // Set GPIO falling interrupt. |
| 412 | GPIOINT->IO2IntEnR |= (1 << 0); // Set GPIO rising interrupt. |
| 413 | GPIOINT->IO2IntEnF |= (1 << 1); // Set GPIO falling interrupt. |
| 414 | GPIOINT->IO2IntEnR |= (1 << 1); // Set GPIO rising interrupt. |
| 415 | // Make sure they're in mode 00 (the default, aka nothing special). |
| 416 | PINCON->PINSEL4 &= ~(0x3 << 0); |
| 417 | PINCON->PINSEL4 &= ~(0x3 << 2); |
| 418 | encoder4_val = 0; |
| 419 | |
| 420 | // Set up encoder 5. |
| 421 | GPIOINT->IO2IntEnF |= (1 << 2); // Set GPIO falling interrupt. |
| 422 | GPIOINT->IO2IntEnR |= (1 << 2); // Set GPIO rising interrupt. |
| 423 | GPIOINT->IO2IntEnF |= (1 << 3); // Set GPIO falling interrupt. |
| 424 | GPIOINT->IO2IntEnR |= (1 << 3); // Set GPIO rising interrupt. |
| 425 | // Make sure they're in mode 00 (the default, aka nothing special). |
| 426 | PINCON->PINSEL4 &= ~(0x3 << 4); |
| 427 | PINCON->PINSEL4 &= ~(0x3 << 6); |
| 428 | encoder5_val = 0; |
| 429 | |
| 430 | // Enable interrupts from the GPIO pins. |
| 431 | NVIC_EnableIRQ(EINT3_IRQn); |
| 432 | |
| 433 | if (is_bot3) { |
| 434 | } else { // is main robot |
| 435 | xTaskCreate(vDelayCapture, |
| 436 | (signed char *) "SENSORs", |
| 437 | configMINIMAL_STACK_SIZE + 100, |
| 438 | NULL /*parameters*/, |
| 439 | tskIDLE_PRIORITY + 5, |
| 440 | NULL /*return task handle*/); |
| 441 | |
| 442 | GPIOINT->IO0IntEnF |= (1 << 4); // Set GPIO falling interrupt |
| 443 | GPIOINT->IO0IntEnR |= (1 << 4); // Set GPIO rising interrupt |
| 444 | PINCON->PINSEL0 &= ~(0x3 << 8); |
| 445 | |
| 446 | GPIOINT->IO0IntEnF |= (1 << 5); // Set GPIO falling interrupt |
| 447 | GPIOINT->IO0IntEnR |= (1 << 5); // Set GPIO rising interrupt |
| 448 | PINCON->PINSEL0 &= ~(0x3 << 10); |
| 449 | |
| 450 | GPIOINT->IO0IntEnF |= (1 << 6); |
| 451 | PINCON->PINSEL0 &= ~(0x3 << 12); |
| 452 | |
| 453 | GPIOINT->IO0IntEnF |= (1 << 7); |
| 454 | PINCON->PINSEL0 &= ~(0x3 << 14); |
| 455 | } |
| 456 | } |
| 457 | |
| 458 | void fillSensorPacket(struct DataStruct *packet) { |
| 459 | packet->gyro_angle = gyro_angle; |
| 460 | |
| 461 | packet->dip_switch0 = dip_switch(0); |
| 462 | packet->dip_switch1 = dip_switch(1); |
| 463 | packet->dip_switch2 = dip_switch(2); |
| 464 | packet->dip_switch3 = dip_switch(3); |
| 465 | |
| 466 | if (is_bot3) { |
| 467 | packet->robot_id = 1; |
| 468 | } else { // is main robot |
| 469 | packet->robot_id = 0; |
| 470 | |
| 471 | packet->main.shooter = encoder1_val; |
Brian Silverman | 1623c33 | 2013-10-01 18:05:16 -0700 | [diff] [blame] | 472 | packet->main.left_drive = encoder5_val; |
| 473 | packet->main.right_drive = encoder4_val; |
Brian Silverman | f92396c | 2013-09-12 20:13:13 -0700 | [diff] [blame] | 474 | packet->main.shooter_angle = encoder2_val; |
| 475 | packet->main.indexer = encoder3_val; |
| 476 | |
| 477 | NVIC_DisableIRQ(EINT1_IRQn); |
| 478 | NVIC_DisableIRQ(EINT2_IRQn); |
| 479 | |
| 480 | packet->main.wrist = (int32_t)QEI->QEIPOS; |
| 481 | packet->main.wrist_hall_effect = !digital(3); |
| 482 | packet->main.capture_wrist_rise = capture_wrist_rise; |
| 483 | packet->main.wrist_rise_count = wrist_rise_count; |
| 484 | |
| 485 | NVIC_EnableIRQ(EINT1_IRQn); |
| 486 | NVIC_EnableIRQ(EINT2_IRQn); |
| 487 | |
| 488 | NVIC_DisableIRQ(EINT3_IRQn); |
| 489 | |
| 490 | packet->main.capture_top_rise = capture_top_rise; |
| 491 | packet->main.top_rise_count = top_rise_count; |
Brian Silverman | f92396c | 2013-09-12 20:13:13 -0700 | [diff] [blame] | 492 | packet->main.capture_top_fall = capture_top_fall; |
| 493 | packet->main.top_fall_count = top_fall_count; |
| 494 | packet->main.top_disc = !digital(2); |
| 495 | |
| 496 | packet->main.capture_bottom_fall_delay = capture_bottom_fall_delay; |
| 497 | packet->main.bottom_fall_delay_count = bottom_fall_delay_count; |
| 498 | packet->main.bottom_fall_count = bottom_fall_count; |
| 499 | packet->main.bottom_disc = !digital(1); |
| 500 | |
Brian Silverman | 1623c33 | 2013-10-01 18:05:16 -0700 | [diff] [blame] | 501 | packet->main.loader_top = !digital(5); |
| 502 | packet->main.loader_bottom = !digital(6); |
| 503 | |
Brian Silverman | f92396c | 2013-09-12 20:13:13 -0700 | [diff] [blame] | 504 | packet->main.capture_shooter_angle_rise = capture_shooter_angle_rise; |
| 505 | packet->main.shooter_angle_rise_count = shooter_angle_rise_count; |
| 506 | packet->main.angle_adjust_bottom_hall_effect = !digital(4); |
| 507 | |
| 508 | NVIC_EnableIRQ(EINT3_IRQn); |
| 509 | |
| 510 | packet->main.bottom_rise_count = bottom_rise_count; |
| 511 | } |
| 512 | } |