motors/uart_schematic/uart-main.sch

v 20130925 2
C 58600 62600 1 0 0 teensy3.5.sym
{
T 58800 64200 5 10 0 1 0 0 1
device=TEENSY3.5
T 59400 64100 5 10 0 1 0 0 1
footprint=teensy3.5
T 60100 70100 5 10 1 1 0 0 1
refdes=U101
}
C 60800 70000 1 270 0 5V-plus-1.sym
C 56500 69900 1 270 0 gnd-1.sym
N 58700 69800 56800 69800 4
N 60600 69800 60800 69800 4
C 61100 65500 1 90 0 gnd-1.sym
N 60600 65600 60800 65600 4
C 58900 70600 1 0 0 gnd-1.sym
N 59000 72200 59000 72000 4
N 59000 71100 59000 70900 4
C 58800 72000 1 270 0 capacitor-1.sym
{
T 59500 71800 5 10 0 0 270 0 1
device=CAPACITOR
T 59700 71800 5 10 0 0 270 0 1
symversion=0.1
T 58800 72000 5 10 0 0 270 0 1
voltage=16 V
T 58800 72000 5 10 0 0 270 0 1
footprint=0603
T 58800 72000 5 10 0 0 270 0 1
pn=885012206047
T 59300 71800 5 10 1 1 270 0 1
refdes=C101
T 58600 71800 5 10 1 1 270 0 1
value=0.15 uF
}
C 58800 72200 1 0 0 5V-plus-1.sym
C 60800 68500 1 0 0 output-1.sym
{
T 60900 68800 5 10 0 0 0 0 1
device=OUTPUT
T 61000 68700 5 10 1 1 0 0 1
net=LED0:1
}
N 60800 68600 60600 68600 4
C 62500 68800 1 0 0 output-1.sym
{
T 62600 69100 5 10 0 0 0 0 1
device=OUTPUT
T 62700 69000 5 10 1 1 0 0 1
net=LED1:1
}
N 62500 68900 60600 68900 4
N 56800 68000 58700 68000 4
C 56800 68100 1 180 0 output-1.sym
{
T 56700 67800 5 10 0 0 180 0 1
device=OUTPUT
T 56600 67900 5 10 1 1 180 0 1
net=LED2:1
}
C 60800 67900 1 0 0 output-1.sym
{
T 60900 68200 5 10 0 0 0 0 1
device=OUTPUT
T 61000 68100 5 10 1 1 0 0 1
net=LED3:1
}
N 60800 68000 60600 68000 4
N 56800 63800 58700 63800 4
C 56800 63900 1 180 0 output-1.sym
{
T 56700 63600 5 10 0 0 180 0 1
device=OUTPUT
T 56600 63700 5 10 1 1 180 0 1
net=LED5:1
}
C 58500 63600 1 180 0 output-1.sym
{
T 58400 63300 5 10 0 0 180 0 1
device=OUTPUT
T 58300 63400 5 10 1 1 180 0 1
net=LED4:1
}
N 58500 63500 58700 63500 4
N 62500 63500 60600 63500 4
C 62500 63400 1 0 0 output-1.sym
{
T 62600 63700 5 10 0 0 0 0 1
device=OUTPUT
T 62700 63600 5 10 1 1 0 0 1
net=LED6:1
}
C 60800 63700 1 0 0 output-1.sym
{
T 60900 64000 5 10 0 0 0 0 1
device=OUTPUT
T 61000 63900 5 10 1 1 0 0 1
net=LED7:1
}
N 60800 63800 60600 63800 4
C 60800 64300 1 0 0 output-1.sym
{
T 60900 64600 5 10 0 0 0 0 1
device=OUTPUT
T 61000 64500 5 10 1 1 0 0 1
net=LED9:1
}
N 60800 64400 60600 64400 4
N 62500 64100 60600 64100 4
C 62500 64000 1 0 0 output-1.sym
{
T 62600 64300 5 10 0 0 0 0 1
device=OUTPUT
T 62700 64200 5 10 1 1 0 0 1
net=LED8:1
}
C 57700 68800 1 0 0 input-1.sym
{
T 57700 69100 5 10 0 0 0 0 1
device=INPUT
T 58200 68800 5 10 1 1 180 0 1
net=SPI_CS:1
}
N 58700 68900 58500 68900 4
N 56800 66200 58700 66200 4
C 56800 66300 1 180 0 output-1.sym
{
T 56700 66000 5 10 0 0 180 0 1
device=OUTPUT
T 56600 66100 5 10 1 1 180 0 1
net=SPI_MISO:1
}
C 57700 65800 1 0 0 input-1.sym
{
T 57700 66100 5 10 0 0 0 0 1
device=INPUT
T 58200 65800 5 10 1 1 180 0 1
net=SPI_MOSI:1
}
N 58700 65900 58500 65900 4
C 60200 70600 1 0 0 gnd-1.sym
N 60300 72200 60300 72000 4
N 60300 71100 60300 70900 4
C 60100 72000 1 270 0 capacitor-1.sym
{
T 60800 71800 5 10 0 0 270 0 1
device=CAPACITOR
T 61000 71800 5 10 0 0 270 0 1
symversion=0.1
T 60100 72000 5 10 0 0 270 0 1
voltage=16 V
T 60100 72000 5 10 0 0 270 0 1
footprint=0603
T 60100 72000 5 10 0 0 270 0 1
pn=885012206047
T 60600 71800 5 10 1 1 270 0 1
refdes=C102
T 59900 71800 5 10 1 1 270 0 1
value=0.15 uF
}
C 60100 72200 1 0 0 3.3V-plus-1.sym
C 56800 65400 1 90 0 3.3V-plus-1.sym
N 56800 65600 58700 65600 4
N 60800 66200 60600 66200 4
C 61600 66300 1 180 0 input-1.sym
{
T 61600 66000 5 10 0 0 180 0 1
device=INPUT
T 61100 66300 5 10 1 1 0 0 1
net=SPI_CLK:1
}
C 56000 67300 1 0 0 input-1.sym
{
T 56000 67600 5 10 0 0 0 0 1
device=INPUT
T 56500 67300 5 10 1 1 180 0 1
net=UART2_RX:1
}
C 58500 67200 1 180 0 output-1.sym
{
T 58400 66900 5 10 0 0 180 0 1
device=OUTPUT
T 58300 67000 5 10 1 1 180 0 1
net=UART2_TX:1
}
N 58700 67400 56800 67400 4
N 58500 67100 58700 67100 4
N 58500 66500 58700 66500 4
N 58700 66800 56800 66800 4
C 58500 66600 1 180 0 output-1.sym
{
T 58400 66300 5 10 0 0 180 0 1
device=OUTPUT
T 58300 66400 5 10 1 1 180 0 1
net=UART0_TX:1
}
C 56000 66700 1 0 0 input-1.sym
{
T 56000 67000 5 10 0 0 0 0 1
device=INPUT
T 56500 66700 5 10 1 1 180 0 1
net=UART0_RX:1
}
N 58500 64700 58700 64700 4
N 58700 64400 56800 64400 4
C 58500 64800 1 180 0 output-1.sym
{
T 58400 64500 5 10 0 0 180 0 1
device=OUTPUT
T 58300 64600 5 10 1 1 180 0 1
net=UART1_TX:1
}
C 56000 64300 1 0 0 input-1.sym
{
T 56000 64600 5 10 0 0 0 0 1
device=INPUT
T 56500 64300 5 10 1 1 180 0 1
net=UART1_RX:1
}
N 58700 63200 56800 63200 4
N 58500 62900 58700 62900 4
C 56000 63100 1 0 0 input-1.sym
{
T 56000 63400 5 10 0 0 0 0 1
device=INPUT
T 56500 63100 5 10 1 1 180 0 1
net=UART3_RX:1
}
C 58500 63000 1 180 0 output-1.sym
{
T 58400 62700 5 10 0 0 180 0 1
device=OUTPUT
T 58300 62800 5 10 1 1 180 0 1
net=UART3_TX:1
}
N 60800 63200 60600 63200 4
N 60600 62900 62500 62900 4
C 61600 63300 1 180 0 input-1.sym
{
T 61600 63000 5 10 0 0 180 0 1
device=INPUT
T 61100 63300 5 10 1 1 0 0 1
net=UART4_RX:1
}
C 62500 62800 1 0 0 output-1.sym
{
T 62600 63100 5 10 0 0 0 0 1
device=OUTPUT
T 62700 63000 5 10 1 1 0 0 1
net=UART4_TX:1
}
C 63300 68400 1 180 0 input-1.sym
{
T 63300 68100 5 10 0 0 180 0 1
device=INPUT
T 62800 68400 5 10 1 1 0 0 1
net=5V_PGOOD:1
}
N 60600 68300 62500 68300 4
N 60600 66500 62500 66500 4
C 60800 66700 1 0 0 output-1.sym
{
T 60900 67000 5 10 0 0 0 0 1
device=OUTPUT
T 61000 66900 5 10 1 1 0 0 1
net=CAM_EN:1
}
N 60800 66800 60600 66800 4
C 62500 66400 1 0 0 output-1.sym
{
T 62600 66700 5 10 0 0 0 0 1
device=OUTPUT
T 62700 66600 5 10 1 1 0 0 1
net=ODROID_EN:1
}
C 73300 71100 1 180 0 input-1.sym
{
T 73300 70800 5 10 0 0 180 0 1
device=INPUT
T 72800 71100 5 10 1 1 0 0 1
net=UART0_RX_RAW:1
}
C 70500 70600 1 0 0 output-1.sym
{
T 70600 70900 5 10 0 0 0 0 1
device=OUTPUT
T 70700 70800 5 10 1 1 0 0 1
net=UART0_TX_RAW:1
}
C 68400 70900 1 0 0 input-1.sym
{
T 68400 71200 5 10 0 0 0 0 1
device=INPUT
T 68900 70900 5 10 1 1 180 0 1
net=UART0_TX:1
}
C 67600 70800 1 180 0 output-1.sym
{
T 67500 70500 5 10 0 0 180 0 1
device=OUTPUT
T 67400 70600 5 10 1 1 180 0 1
net=UART0_RX:1
}
C 69400 70000 1 0 0 resistor-x4.sym
{
T 69700 71300 5 10 0 0 0 0 1
device=RESISTOR_x4
T 69400 70000 5 10 0 0 0 0 1
footprint=0603_4
T 69400 70000 5 10 0 0 0 0 1
pn=RAVF164DJT100R
T 69600 71200 5 10 1 1 0 0 1
refdes=R101
T 69700 69800 5 10 1 1 0 0 1
value=100
}
C 69400 68200 1 0 0 resistor-x4.sym
{
T 69700 69500 5 10 0 0 0 0 1
device=RESISTOR_x4
T 69400 68200 5 10 0 0 0 0 1
footprint=0603_4
T 69400 68200 5 10 0 0 0 0 1
pn=RAVF164DJT100R
T 69600 69400 5 10 1 1 0 0 1
refdes=R102
T 69700 68000 5 10 1 1 0 0 1
value=100
}
C 69400 66400 1 0 0 resistor-x4.sym
{
T 69700 67700 5 10 0 0 0 0 1
device=RESISTOR_x4
T 69400 66400 5 10 0 0 0 0 1
footprint=0603_4
T 69400 66400 5 10 0 0 0 0 1
pn=RAVF164DJT100R
T 69600 67600 5 10 1 1 0 0 1
refdes=R103
T 69700 66200 5 10 1 1 0 0 1
value=100
}
N 69200 71000 69400 71000 4
N 67600 70700 69400 70700 4
N 70500 70700 70300 70700 4
N 72500 71000 70300 71000 4
C 68400 70300 1 0 0 input-1.sym
{
T 68400 70600 5 10 0 0 0 0 1
device=INPUT
T 68900 70300 5 10 1 1 180 0 1
net=UART1_TX:1
}
N 69200 70400 69400 70400 4
N 72500 70400 70300 70400 4
C 73300 70500 1 180 0 input-1.sym
{
T 73300 70200 5 10 0 0 180 0 1
device=INPUT
T 72800 70500 5 10 1 1 0 0 1
net=UART1_RX_RAW:1
}
C 70500 70000 1 0 0 output-1.sym
{
T 70600 70300 5 10 0 0 0 0 1
device=OUTPUT
T 70700 70200 5 10 1 1 0 0 1
net=UART1_TX_RAW:1
}
N 70500 70100 70300 70100 4
N 67600 70100 69400 70100 4
C 67600 70200 1 180 0 output-1.sym
{
T 67500 69900 5 10 0 0 180 0 1
device=OUTPUT
T 67400 70000 5 10 1 1 180 0 1
net=UART1_RX:1
}
C 68400 69100 1 0 0 input-1.sym
{
T 68400 69400 5 10 0 0 0 0 1
device=INPUT
T 68900 69100 5 10 1 1 180 0 1
net=UART2_TX:1
}
N 69200 69200 69400 69200 4
N 72500 69200 70300 69200 4
C 73300 69300 1 180 0 input-1.sym
{
T 73300 69000 5 10 0 0 180 0 1
device=INPUT
T 72800 69300 5 10 1 1 0 0 1
net=UART2_RX_RAW:1
}
C 70500 68800 1 0 0 output-1.sym
{
T 70600 69100 5 10 0 0 0 0 1
device=OUTPUT
T 70700 69000 5 10 1 1 0 0 1
net=UART2_TX_RAW:1
}
N 70500 68900 70300 68900 4
N 67600 68900 69400 68900 4
C 67600 69000 1 180 0 output-1.sym
{
T 67500 68700 5 10 0 0 180 0 1
device=OUTPUT
T 67400 68800 5 10 1 1 180 0 1
net=UART2_RX:1
}
C 68400 68500 1 0 0 input-1.sym
{
T 68400 68800 5 10 0 0 0 0 1
device=INPUT
T 68900 68500 5 10 1 1 180 0 1
net=UART3_TX:1
}
N 69200 68600 69400 68600 4
N 72500 68600 70300 68600 4
C 73300 68700 1 180 0 input-1.sym
{
T 73300 68400 5 10 0 0 180 0 1
device=INPUT
T 72800 68700 5 10 1 1 0 0 1
net=UART3_RX_RAW:1
}
C 70500 68200 1 0 0 output-1.sym
{
T 70600 68500 5 10 0 0 0 0 1
device=OUTPUT
T 70700 68400 5 10 1 1 0 0 1
net=UART3_TX_RAW:1
}
N 70500 68300 70300 68300 4
N 67600 68300 69400 68300 4
C 67600 68400 1 180 0 output-1.sym
{
T 67500 68100 5 10 0 0 180 0 1
device=OUTPUT
T 67400 68200 5 10 1 1 180 0 1
net=UART3_RX:1
}
C 68400 67300 1 0 0 input-1.sym
{
T 68400 67600 5 10 0 0 0 0 1
device=INPUT
T 68900 67300 5 10 1 1 180 0 1
net=UART4_TX:1
}
N 69200 67400 69400 67400 4
N 72500 67400 70300 67400 4
C 73300 67500 1 180 0 input-1.sym
{
T 73300 67200 5 10 0 0 180 0 1
device=INPUT
T 72800 67500 5 10 1 1 0 0 1
net=UART4_RX_RAW:1
}
C 70500 67000 1 0 0 output-1.sym
{
T 70600 67300 5 10 0 0 0 0 1
device=OUTPUT
T 70700 67200 5 10 1 1 0 0 1
net=UART4_TX_RAW:1
}
N 70500 67100 70300 67100 4
N 67600 67100 69400 67100 4
C 67600 67200 1 180 0 output-1.sym
{
T 67500 66900 5 10 0 0 180 0 1
device=OUTPUT
T 67400 67000 5 10 1 1 180 0 1
net=UART4_RX:1
}