| /* |
| * The MIT License (MIT) |
| * |
| * Copyright (c) 2020, Ha Thach (tinyusb.org) |
| * |
| * Permission is hereby granted, free of charge, to any person obtaining a copy |
| * of this software and associated documentation files (the "Software"), to deal |
| * in the Software without restriction, including without limitation the rights |
| * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell |
| * copies of the Software, and to permit persons to whom the Software is |
| * furnished to do so, subject to the following conditions: |
| * |
| * The above copyright notice and this permission notice shall be included in |
| * all copies or substantial portions of the Software. |
| * |
| * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE |
| * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
| * THE SOFTWARE. |
| * |
| * This file is part of the TinyUSB stack. |
| */ |
| |
| #ifndef BOARD_H_ |
| #define BOARD_H_ |
| |
| #ifdef __cplusplus |
| extern "C" { |
| #endif |
| |
| #define LED_PORT GPIOB |
| #define LED_PIN GPIO_PIN_14 |
| #define LED_STATE_ON 1 |
| |
| #define BUTTON_PORT GPIOC |
| #define BUTTON_PIN GPIO_PIN_13 |
| #define BUTTON_STATE_ACTIVE 1 |
| |
| #define UART_DEV LPUART1 |
| #define UART_CLK_EN __HAL_RCC_LPUART1_CLK_ENABLE |
| #define UART_GPIO_PORT GPIOG |
| #define UART_GPIO_AF GPIO_AF8_LPUART1 |
| #define UART_TX_PIN GPIO_PIN_7 |
| #define UART_RX_PIN GPIO_PIN_8 |
| |
| //--------------------------------------------------------------------+ |
| // RCC Clock |
| //--------------------------------------------------------------------+ |
| |
| /** |
| * @brief System Clock Configuration |
| * The system Clock is configured as follow : |
| * System Clock source = PLL (MSI) |
| * SYSCLK(Hz) = 120000000 |
| * HCLK(Hz) = 120000000 |
| * AHB Prescaler = 1 |
| * APB1 Prescaler = 1 |
| * APB2 Prescaler = 1 |
| * MSI Frequency(Hz) = 48000000 |
| * PLL_M = 12 |
| * PLL_N = 60 |
| * PLL_P = 2 |
| * PLL_Q = 2 |
| * VDD(V) = 3.3 |
| * Main regulator output voltage = Scale1 mode |
| * Flash Latency(WS) = 5 |
| * The USB clock configuration from PLLSAI: |
| * PLLSAIP = 8 FIXME |
| * PLLSAIN = 384 FIXME |
| * PLLSAIQ = 7 FIXME |
| * @param None |
| * @retval None |
| */ |
| |
| static inline void board_clock_init(void) |
| { |
| RCC_ClkInitTypeDef RCC_ClkInitStruct; |
| RCC_OscInitTypeDef RCC_OscInitStruct; |
| RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; |
| |
| /* Activate PLL with MSI , stabilizied via PLL by LSE */ |
| RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE | RCC_OSCILLATORTYPE_MSI; |
| RCC_OscInitStruct.MSIState = RCC_MSI_ON; |
| RCC_OscInitStruct.LSEState = RCC_LSE_ON; |
| RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_11; |
| RCC_OscInitStruct.MSICalibrationValue = RCC_MSICALIBRATION_DEFAULT; |
| RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; |
| RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_MSI; |
| RCC_OscInitStruct.PLL.PLLM = 12; |
| RCC_OscInitStruct.PLL.PLLN = 60; |
| RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; |
| RCC_OscInitStruct.PLL.PLLQ = 2; |
| HAL_RCC_OscConfig(&RCC_OscInitStruct); |
| |
| /* Enable MSI Auto-calibration through LSE */ |
| HAL_RCCEx_EnableMSIPLLMode(); |
| |
| /* Select MSI output as USB clock source */ |
| PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB; |
| PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_MSI; |
| HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct); |
| |
| /* Select MSI output as USB clock source */ |
| PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_LPUART1; |
| PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PCLK1; |
| HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct); |
| |
| /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 |
| clocks dividers */ |
| RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2); |
| RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; |
| // Avoid overshoot and start with HCLK 60 MHz |
| RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV2; |
| RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; |
| RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; |
| HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3); |
| |
| /* AHB prescaler divider at 1 as second step */ |
| RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK; |
| RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; |
| HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5); |
| } |
| |
| static inline void board_vbus_sense_init(void) |
| { |
| // Enable VBUS sense (B device) via pin PA9 |
| USB_OTG_FS->GCCFG |= USB_OTG_GCCFG_VBDEN; |
| } |
| |
| #ifdef __cplusplus |
| } |
| #endif |
| |
| #endif /* BOARD_H_ */ |