worked on the low-level setup code and Makefile some more
The Makefile now has separate lists for both output files and all kinds
of other nice features.
I think that the startup code actually copies the exception table into
RAM now.
diff --git a/bbb_cape/src/cape/.gitignore b/bbb_cape/src/cape/.gitignore
new file mode 100644
index 0000000..01dd76a
--- /dev/null
+++ b/bbb_cape/src/cape/.gitignore
@@ -0,0 +1 @@
+.obj/
diff --git a/bbb_cape/src/cape/Makefile b/bbb_cape/src/cape/Makefile
new file mode 100644
index 0000000..87dc9d8
--- /dev/null
+++ b/bbb_cape/src/cape/Makefile
@@ -0,0 +1,75 @@
+OBJDIR := .obj/
+$(shell mkdir -p $(OBJDIR))
+
+CROSS_COMPILE := /opt/cortex-m3/bin/arm-eabi-
+
+CC := $(CROSS_COMPILE)gcc
+LD := $(CROSS_COMPILE)ld
+OBJCOPY := $(CROSS_COMPILE)objcopy
+OBJDUMP := $(CROSS_COMPILE)objdump
+AS := $(CROSS_COMPILE)as
+
+CPPFLAGS := -I. \
+
+CFLAGS := -nostartfiles -nostdlib \
+ -O3 -mcpu=cortex-m3 \
+ -mthumb -Wl,--gc-sections -ffunction-sections -Wl,-static \
+ -Wall -Werror --std=gnu99 \
+
+LDFLAGS := -O3 -mcpu-cortex-m3 \
+ -nostartfiles -nostdlib \
+ -L$(TOOLS_PREFIX)/lib/gcc/arm-eabi/4.5.1/ \
+ -T gcc_arm.ld \
+
+ASFLAGS := -O3 -mcpu=cortex-m3 \
+ -nostartfiles -nostdlib \
+ -mthumb \
+
+OBJECTS_main := main \
+
+OBJECTS_bootloader := bootloader \
+
+OUTPUTS := main bootloader
+
+OBJECTS := $(foreach output,$(OUTPUTS),$(OBJECTS_$(output)))
+
+OUTPUTS_elf := $(OUTPUTS:%=$(OBJDIR)%.elf)
+OUTPUTS_hex := $(OUTPUTS:%=$(OBJDIR)%.hex)
+
+.PHONY: all
+all: $(OUTPUTS_hex)
+
+-include $(OBJECTS:%=$(OBJDIR)%.d)
+
+.SECONDEXPANSION:
+PERCENT := %
+
+# "$(OBJDIR)%.elf: $(OBJECTS_%:%=$(OBJDIR)%.o)" with the % signs meaning the
+# right thing in the right places.
+$(OUTPUTS_elf): $(OBJDIR)%.elf: $$(OBJECTS_$$*:$$(PERCENT)=$(OBJDIR)$$(PERCENT).o)
+$(OUTPUTS_elf): $(OBJDIR)%.elf: gcc_arm.ld $(OBJDIR)STM32F2XX_startup.o
+ $(CC) $(CPPFLAGS) $(LDFLAGS) -o $@ \
+ $(OBJDIR)STM32F2XX_startup.o \
+ $(OBJECTS_$*:%=$(OBJDIR)%.o) \
+ -Wa,-Map -Wa,$(OBJDIR)$*.map
+
+$(OBJECTS:%=$(OBJDIR)%.o): $(OBJDIR)%.o: %.c
+ $(CC) $(CPPFLAGS) $(CFLAGS) -MD -MP -c -o $@ $<
+$(OBJDIR)%.o: %.S
+ $(CC) $(CPPFLAGS) $(ASFLAGS) -MD -MP -c -o $@ $<
+
+# So that you can see the assembly for an individual file with any comments etc.
+$(OBJECTS:%=%.s): %.s: %.c
+ $(CC) $(CPPFLAGS) $(CFLAGS) -S -o $@ $<
+%.s: %.S
+ $(CC) $(CPPFLAGS) $(ASFLAGS) -S -o $@ $<
+
+# So that you can see the assembly of the whole .elf file.
+$(OUTPUTS:%=elf_%.s): elf_%.s: $(OBJDIR)%.elf
+ $(OBJDUMP) -d -S $< > $@
+
+$(OUTPUTS_hex): $(OBJDIR)%.hex: $(OBJDIR)%.elf
+ $(OBJCOPY) -O ihex $< $@
+
+clean:
+ rm -rf $(OBJDIR)
diff --git a/bbb_cape/src/cape/STM32F2XX_startup.S b/bbb_cape/src/cape/STM32F2XX_startup.S
index ae6794f..1e0bea4 100644
--- a/bbb_cape/src/cape/STM32F2XX_startup.S
+++ b/bbb_cape/src/cape/STM32F2XX_startup.S
@@ -33,45 +33,51 @@
---------------------------------------------------------------------------*/
- .syntax unified
- .arch armv7-m
+.syntax unified
+.arch armv7-m
+.code 16
- .section .stack
- .align 3
+.section .stack
+ .align 3
+
#ifdef __STACK_SIZE
- .equ Stack_Size, __STACK_SIZE
+ .equ Stack_Size, __STACK_SIZE
#else
- .equ Stack_Size, 0x00000400
+ .equ Stack_Size, 0x00000400
#endif
- .globl __StackTop
- .globl __StackLimit
-__StackLimit:
- .space Stack_Size
- .size __StackLimit, . - __StackLimit
-__StackTop:
- .size __StackTop, . - __StackTop
- .section .heap
- .align 3
+ .globl __StackLimit
+ __StackLimit:
+ .space Stack_Size
+ .size __StackLimit, . - __StackLimit
+
+ .globl __StackTop
+ __StackTop:
+ .size __StackTop, . - __StackTop
+
+.section .heap
+ .align 3
+
+ .globl __HeapBase
+ __HeapBase:
#ifdef __HEAP_SIZE
- .equ Heap_Size, __HEAP_SIZE
+ .equ Heap_Size, __HEAP_SIZE
#else
- .equ Heap_Size, 0x00000C00
+ .equ Heap_Size, 0x00000C00
#endif
- .globl __HeapBase
- .globl __HeapLimit
-__HeapBase:
- .if Heap_Size
- .space Heap_Size
- .endif
- .size __HeapBase, . - __HeapBase
-__HeapLimit:
- .size __HeapLimit, . - __HeapLimit
+ .if Heap_Size
+ .space Heap_Size
+ .endif
+ .size __HeapBase, . - __HeapBase
+
+ .globl __HeapLimit
+ __HeapLimit:
+ .size __HeapLimit, . - __HeapLimit
#if 0
- .section .isr_vector
- .align 2
- .globl __isr_vector
+ .section .isr_vector
+ .align 2
+ .globl __isr_vector
__isr_vector:
.long __StackTop /* Top of Stack */
.long Reset_Handler /* Reset Handler */
@@ -127,200 +133,195 @@
.size __isr_vector, . - __isr_vector
#else
.macro ISR_HANDLER name=
- .section .vectors, "ax"
- .word \name
+ .section .vectors, "a"
+ .word \name
.section .init, "ax"
- .thumb_func
- .weak \name
-\name:
-1: b 1b /* endless loop */
+ .thumb_func
+ .weak \name
+ \name:
+ 1: b 1b /* endless loop */
.endm
.macro ISR_RESERVED
- .section .vectors, "ax"
- .word 0
+ .section .vectors, "a"
+ .word 0
.endm
- .syntax unified
- .global reset_handler
+.section .vectors, "a"
+ .global _vectors
+ _vectors:
+ .long __StackTop
+ .long Reset_Handler
+ ISR_HANDLER NMI_Handler
+ ISR_HANDLER HardFault_Handler
+ ISR_HANDLER MemManage_Handler
+ ISR_HANDLER BusFault_Handler
+ ISR_HANDLER UsageFault_Handler
+ ISR_RESERVED
+ ISR_RESERVED
+ ISR_RESERVED
+ ISR_RESERVED
+ ISR_HANDLER SVC_Handler
+ ISR_HANDLER DebugMon_Handler
+ ISR_RESERVED
+ ISR_HANDLER PendSV_Handler
+ ISR_HANDLER SysTick_Handler
- .section .vectors, "ax"
- .code 16
- .global _vectors
+ /* interrupts */
+ ISR_HANDLER WWDG_IRQHandler
+ ISR_HANDLER PVD_IRQHandler
+ ISR_HANDLER TAMP_STAMP_IRQHandler
+ ISR_HANDLER RTC_WKUP_IRQHandler
+ ISR_HANDLER FLASH_IRQHandler
+ ISR_HANDLER RCC_IRQHandler
+ ISR_HANDLER EXTI0_IRQHandler
+ ISR_HANDLER EXTI1_IRQHandler
+ ISR_HANDLER EXTI2_IRQHandler
+ ISR_HANDLER EXTI3_IRQHandler
+ ISR_HANDLER EXTI4_IRQHandler
+ ISR_HANDLER DMA1_Stream0_IRQHandler
+ ISR_HANDLER DMA1_Stream1_IRQHandler
+ ISR_HANDLER DMA1_Stream2_IRQHandler
+ ISR_HANDLER DMA1_Stream3_IRQHandler
+ ISR_HANDLER DMA1_Stream4_IRQHandler
+ ISR_HANDLER DMA1_Stream5_IRQHandler
+ ISR_HANDLER DMA1_Stream6_IRQHandler
+ ISR_HANDLER ADC_IRQHandler
+ ISR_HANDLER CAN1_TX_IRQHandler
+ ISR_HANDLER CAN1_RX0_IRQHandler
+ ISR_HANDLER CAN1_RX1_IRQHandler
+ ISR_HANDLER CAN1_SCE_IRQHandler
+ ISR_HANDLER EXTI9_5_IRQHandler
+ ISR_HANDLER TIM1_BRK_TIM9_IRQHandler
+ ISR_HANDLER TIM1_UP_TIM10_IRQHandler
+ ISR_HANDLER TIM1_TRG_COM_TIM11_IRQHandler
+ ISR_HANDLER TIM1_CC_IRQHandler
+ ISR_HANDLER TIM2_IRQHandler
+ ISR_HANDLER TIM3_IRQHandler
+ ISR_HANDLER TIM4_IRQHandler
+ ISR_HANDLER I2C1_EV_IRQHandler
+ ISR_HANDLER I2C1_ER_IRQHandler
+ ISR_HANDLER I2C2_EV_IRQHandler
+ ISR_HANDLER I2C2_ER_IRQHandler
+ ISR_HANDLER SPI1_IRQHandler
+ ISR_HANDLER SPI2_IRQHandler
+ ISR_HANDLER USART1_IRQHandler
+ ISR_HANDLER USART2_IRQHandler
+ ISR_HANDLER USART3_IRQHandler
+ ISR_HANDLER EXTI15_10_IRQHandler
+ ISR_HANDLER RTC_Alarm_IRQHandler
+ ISR_HANDLER OTG_FS_WKUP_IRQHandler
+ ISR_HANDLER TIM8_BRK_TIM12_IRQHandler
+ ISR_HANDLER TIM8_UP_TIM13_IRQHandler
+ ISR_HANDLER TIM8_TRG_COM_TIM14_IRQHandler
+ ISR_HANDLER TIM8_CC_IRQHandler
+ ISR_HANDLER DMA1_Stream7_IRQHandler
+ ISR_HANDLER FSMC_IRQHandler
+ ISR_HANDLER SDIO_IRQHandler
+ ISR_HANDLER TIM5_IRQHandler
+ ISR_HANDLER SPI3_IRQHandler
+ ISR_HANDLER UART4_IRQHandler
+ ISR_HANDLER UART5_IRQHandler
+ ISR_HANDLER TIM6_DAC_IRQHandler
+ ISR_HANDLER TIM7_IRQHandler
+ ISR_HANDLER DMA2_Stream0_IRQHandler
+ ISR_HANDLER DMA2_Stream1_IRQHandler
+ ISR_HANDLER DMA2_Stream2_IRQHandler
+ ISR_HANDLER DMA2_Stream3_IRQHandler
+ ISR_HANDLER DMA2_Stream4_IRQHandler
+ ISR_HANDLER ETH_IRQHandler
+ ISR_HANDLER ETH_WKUP_IRQHandler
+ ISR_HANDLER CAN2_TX_IRQHandler
+ ISR_HANDLER CAN2_RX0_IRQHandler
+ ISR_HANDLER CAN2_RX1_IRQHandler
+ ISR_HANDLER CAN2_SCE_IRQHandler
+ ISR_HANDLER OTG_FS_IRQHandler
+ ISR_HANDLER DMA2_Stream5_IRQHandler
+ ISR_HANDLER DMA2_Stream6_IRQHandler
+ ISR_HANDLER DMA2_Stream7_IRQHandler
+ ISR_HANDLER USART6_IRQHandler
+ ISR_HANDLER I2C3_EV_IRQHandler
+ ISR_HANDLER I2C3_ER_IRQHandler
+ ISR_HANDLER OTG_HS_EP1_OUT_IRQHandler
+ ISR_HANDLER OTG_HS_EP1_IN_IRQHandler
+ ISR_HANDLER OTG_HS_WKUP_IRQHandler
+ ISR_HANDLER OTG_HS_IRQHandler
+ ISR_HANDLER DCMI_IRQHandler
+ ISR_HANDLER CRYP_IRQHandler
+ ISR_HANDLER HASH_RNG_IRQHandler
-_vectors:
- .long __StackTop /* Top of Stack */
- .long Reset_Handler /* Reset Handler */
-ISR_HANDLER NMI_Handler
-ISR_HANDLER HardFault_Handler
-ISR_HANDLER MemManage_Handler
-ISR_HANDLER BusFault_Handler
-ISR_HANDLER UsageFault_Handler
-ISR_RESERVED
-ISR_RESERVED
-ISR_RESERVED
-ISR_RESERVED
-ISR_HANDLER SVC_Handler
-ISR_HANDLER DebugMon_Handler
-ISR_RESERVED
-ISR_HANDLER PendSV_Handler
-ISR_HANDLER SysTick_Handler
-/* interrupts */
-ISR_HANDLER WWDG_IRQHandler
-ISR_HANDLER PVD_IRQHandler
-ISR_HANDLER TAMP_STAMP_IRQHandler
-ISR_HANDLER RTC_WKUP_IRQHandler
-ISR_HANDLER FLASH_IRQHandler
-ISR_HANDLER RCC_IRQHandler
-ISR_HANDLER EXTI0_IRQHandler
-ISR_HANDLER EXTI1_IRQHandler
-ISR_HANDLER EXTI2_IRQHandler
-ISR_HANDLER EXTI3_IRQHandler
-ISR_HANDLER EXTI4_IRQHandler
-ISR_HANDLER DMA1_Stream0_IRQHandler
-ISR_HANDLER DMA1_Stream1_IRQHandler
-ISR_HANDLER DMA1_Stream2_IRQHandler
-ISR_HANDLER DMA1_Stream3_IRQHandler
-ISR_HANDLER DMA1_Stream4_IRQHandler
-ISR_HANDLER DMA1_Stream5_IRQHandler
-ISR_HANDLER DMA1_Stream6_IRQHandler
-ISR_HANDLER ADC_IRQHandler
-ISR_HANDLER CAN1_TX_IRQHandler
-ISR_HANDLER CAN1_RX0_IRQHandler
-ISR_HANDLER CAN1_RX1_IRQHandler
-ISR_HANDLER CAN1_SCE_IRQHandler
-ISR_HANDLER EXTI9_5_IRQHandler
-ISR_HANDLER TIM1_BRK_TIM9_IRQHandler
-ISR_HANDLER TIM1_UP_TIM10_IRQHandler
-ISR_HANDLER TIM1_TRG_COM_TIM11_IRQHandler
-ISR_HANDLER TIM1_CC_IRQHandler
-ISR_HANDLER TIM2_IRQHandler
-ISR_HANDLER TIM3_IRQHandler
-ISR_HANDLER TIM4_IRQHandler
-ISR_HANDLER I2C1_EV_IRQHandler
-ISR_HANDLER I2C1_ER_IRQHandler
-ISR_HANDLER I2C2_EV_IRQHandler
-ISR_HANDLER I2C2_ER_IRQHandler
-ISR_HANDLER SPI1_IRQHandler
-ISR_HANDLER SPI2_IRQHandler
-ISR_HANDLER USART1_IRQHandler
-ISR_HANDLER USART2_IRQHandler
-ISR_HANDLER USART3_IRQHandler
-ISR_HANDLER EXTI15_10_IRQHandler
-ISR_HANDLER RTC_Alarm_IRQHandler
-ISR_HANDLER OTG_FS_WKUP_IRQHandler
-ISR_HANDLER TIM8_BRK_TIM12_IRQHandler
-ISR_HANDLER TIM8_UP_TIM13_IRQHandler
-ISR_HANDLER TIM8_TRG_COM_TIM14_IRQHandler
-ISR_HANDLER TIM8_CC_IRQHandler
-ISR_HANDLER DMA1_Stream7_IRQHandler
-ISR_HANDLER FSMC_IRQHandler
-ISR_HANDLER SDIO_IRQHandler
-ISR_HANDLER TIM5_IRQHandler
-ISR_HANDLER SPI3_IRQHandler
-ISR_HANDLER UART4_IRQHandler
-ISR_HANDLER UART5_IRQHandler
-ISR_HANDLER TIM6_DAC_IRQHandler
-ISR_HANDLER TIM7_IRQHandler
-ISR_HANDLER DMA2_Stream0_IRQHandler
-ISR_HANDLER DMA2_Stream1_IRQHandler
-ISR_HANDLER DMA2_Stream2_IRQHandler
-ISR_HANDLER DMA2_Stream3_IRQHandler
-ISR_HANDLER DMA2_Stream4_IRQHandler
-ISR_HANDLER ETH_IRQHandler
-ISR_HANDLER ETH_WKUP_IRQHandler
-ISR_HANDLER CAN2_TX_IRQHandler
-ISR_HANDLER CAN2_RX0_IRQHandler
-ISR_HANDLER CAN2_RX1_IRQHandler
-ISR_HANDLER CAN2_SCE_IRQHandler
-ISR_HANDLER OTG_FS_IRQHandler
-ISR_HANDLER DMA2_Stream5_IRQHandler
-ISR_HANDLER DMA2_Stream6_IRQHandler
-ISR_HANDLER DMA2_Stream7_IRQHandler
-ISR_HANDLER USART6_IRQHandler
-ISR_HANDLER I2C3_EV_IRQHandler
-ISR_HANDLER I2C3_ER_IRQHandler
-ISR_HANDLER OTG_HS_EP1_OUT_IRQHandler
-ISR_HANDLER OTG_HS_EP1_IN_IRQHandler
-ISR_HANDLER OTG_HS_WKUP_IRQHandler
-ISR_HANDLER OTG_HS_IRQHandler
-ISR_HANDLER DCMI_IRQHandler
-ISR_HANDLER CRYP_IRQHandler
-ISR_HANDLER HASH_RNG_IRQHandler
- .section .vectors, "ax"
-_vectors_end:
+.section .vectors, "a"
+ _vectors_end:
- .section .vectors_ram, "ax"
-_vectors_ram:
+.section .vectors_ram, "a"
+ /*.global _vectors_ram*/
+ _vectors_ram:
.space _vectors_end-_vectors, 0
+ /*.size _vectors_ram, . - _vectors_ram*/
#endif
- .text
- .thumb
- .thumb_func
- .align 2
- .globl Reset_Handler
- .type Reset_Handler, %function
-Reset_Handler:
+.text
+ .thumb_func
+ .align 2
+ .globl Reset_Handler
+ .type Reset_Handler, %function
+ Reset_Handler:
+
/* Loop to copy data from read only memory to RAM. The ranges
* of copy from/to are specified by following symbols evaluated in
* linker script.
* __etext: End of code section, i.e., begin of data sections to copy from.
* __data_start__/__data_end__: RAM address range that data should be
* copied to. Both must be aligned to 4 bytes boundary. */
-
- ldr r1, =__etext
- ldr r2, =__data_start__
- ldr r3, =__data_end__
-
- subs r3, r2
- ble .LC1
-.LC0:
- subs r3, #4
- ldr r0, [r1, r3]
- str r0, [r2, r3]
- bgt .LC0
-.LC1:
+ ldr r1, =__etext
+ ldr r2, =__data_start__
+ ldr r3, =__data_end__
+ subs r3, r2
+ ble .LC1
+ .LC0:
+ subs r3, #4
+ ldr r0, [r1, r3]
+ str r0, [r2, r3]
+ bgt .LC0
+ .LC1:
/* Loop to zero out BSS section, which uses following symbols
* in linker script:
* __bss_start__: start of BSS section. Must align to 4
* __bss_end__: end of BSS section. Must align to 4
*/
- ldr r1, =__bss_start__
- ldr r2, =__bss_end__
+ ldr r1, =__bss_start__
+ ldr r2, =__bss_end__
+ movs r0, 0
+ .LC2:
+ cmp r1, r2
+ itt lt
+ strlt r0, [r1], #4
+ blt .LC2
- movs r0, 0
-.LC2:
- cmp r1, r2
- itt lt
- strlt r0, [r1], #4
- blt .LC2
+ /*bl SystemInit*/
- bl SystemInit
-
- ldr r0, =__vectors_load_start__
- ldr r1, =__vectors_load_end__
+ /* Copy the vector table into RAM */
+ ldr r0, =_vectors
+ ldr r1, =_vectors_end
ldr r2, =_vectors_ram
-l0:
+ .LC3:
cmp r0, r1
- beq l1
+ beq .LC4
ldr r3, [r0]
str r3, [r2]
adds r0, r0, #4
adds r2, r2, #4
- b l0
-l1:
-
- /* Configure vector table offset register */
+ b .LC3
+ .LC4:
+ /* Configure vector table offset register to use the newly copied table */
ldr r0, =0xE000ED08
ldr r1, =_vectors_ram
str r1, [r0]
-#ifndef __START
-#define __START _start
-#endif
- bl __START
- .pool
- .size Reset_Handler, . - Reset_Handler
+ bl _start
+ 1: b 1b /* endless loop if it ever returns */
+
+ .pool
+ .size Reset_Handler, . - Reset_Handler
diff --git a/bbb_cape/src/cape/bootloader.c b/bbb_cape/src/cape/bootloader.c
new file mode 100644
index 0000000..c429f38
--- /dev/null
+++ b/bbb_cape/src/cape/bootloader.c
@@ -0,0 +1,2 @@
+void _start(void) {
+}
diff --git a/bbb_cape/src/cape/gcc_arm.ld b/bbb_cape/src/cape/gcc_arm.ld
index cef468c..2b02d9d 100644
--- a/bbb_cape/src/cape/gcc_arm.ld
+++ b/bbb_cape/src/cape/gcc_arm.ld
@@ -6,7 +6,7 @@
}
/* Library configurations */
-GROUP(libgcc.a libc.a libm.a libnosys.a)
+GROUP(libgcc.a libc.a libm.a)
/* Linker script to place sections and symbol values. Should be used together
* with other linker script that defines memory regions FLASH and RAM.
@@ -40,7 +40,8 @@
{
.text :
{
- KEEP(*(.isr_vector))
+ KEEP(*(.vectors))
+ /*KEEP(*(.vectors_ram))*/
*(.text*)
KEEP(*(.init))
@@ -65,6 +66,12 @@
KEEP(*(.eh_frame*))
} > FLASH
+ .vectors_ram :
+ {
+ . = ALIGN(4);
+ KEEP(*(.vectors_ram))
+ } > RAM
+
.ARM.extab :
{
*(.ARM.extab* .gnu.linkonce.armextab.*)
diff --git a/bbb_cape/src/cape/main.c b/bbb_cape/src/cape/main.c
new file mode 100644
index 0000000..c429f38
--- /dev/null
+++ b/bbb_cape/src/cape/main.c
@@ -0,0 +1,2 @@
+void _start(void) {
+}