got sending encoder values working
diff --git a/bbb_cape/src/bbb/uart_reader.cc b/bbb_cape/src/bbb/uart_reader.cc
index 46c9962..8928e5a 100644
--- a/bbb_cape/src/bbb/uart_reader.cc
+++ b/bbb_cape/src/bbb/uart_reader.cc
@@ -73,8 +73,8 @@
//options.c_iflag |= IGNCR | PARMRK;
options.c_oflag = 0;
options.c_lflag = 0;
- options.c_cc[VMIN] = 0;
- options.c_cc[VTIME] = 10;
+ options.c_cc[VMIN] = 20;
+ options.c_cc[VTIME] = 0;
if (tcsetattr(fd_, TCSANOW, &options) != 0) {
LOG(FATAL, "tcsetattr(%d, TCSANOW, %p) failed with %d: %s\n",
fd_, &options, errno, strerror(errno));
diff --git a/bbb_cape/src/bbb/uart_reader_main.cc b/bbb_cape/src/bbb/uart_reader_main.cc
index aadd902..8815f66 100644
--- a/bbb_cape/src/bbb/uart_reader_main.cc
+++ b/bbb_cape/src/bbb/uart_reader_main.cc
@@ -1,4 +1,5 @@
#include <stdint.h>
+#include <inttypes.h>
#include "aos/atom_code/init.h"
#include "aos/common/logging/logging_impl.h"
@@ -46,6 +47,8 @@
last_packet_time = Time::Now();
LOG(DEBUG, "got one!\n");
+ LOG(DEBUG, "timestamp %" PRIu64 "\n", packet.timestamp);
+ LOG(DEBUG, "0=%d\n", packet.main.encoders[0]);
//TODO (danielp): Do stuff here with the data we got.
}
diff --git a/bbb_cape/src/cape/bootloader.c b/bbb_cape/src/cape/bootloader.c
index 042255b..3562252 100644
--- a/bbb_cape/src/cape/bootloader.c
+++ b/bbb_cape/src/cape/bootloader.c
@@ -62,11 +62,9 @@
setup_main_clock();
-#if 0
+ RCC->APB2ENR |= RCC_APB2ENR_SYSCFGEN;
SYSCFG->CMPCR |= SYSCFG_CMPCR_CMP_PD; // enable IO compensation cell
while (!(SYSCFG->CMPCR & SYSCFG_CMPCR_READY)) {} // wait for it to be ready
- TODO(brians): Figure out what the story with this is.
-#endif
jump_to_main();
}
diff --git a/bbb_cape/src/cape/encoder.c b/bbb_cape/src/cape/encoder.c
index 768d3c0..5199bd4 100644
--- a/bbb_cape/src/cape/encoder.c
+++ b/bbb_cape/src/cape/encoder.c
@@ -70,7 +70,7 @@
timer->SMCR = 3; // 4x quadrature encoder mode
timer->CCMR1 =
TIM_CCMR1_CC2S_0 | /* input pin 2 -> timer input 2 */
- TIM_CCMR1_CC1S_0; /* input pin 1 -> timer input 1*/
+ TIM_CCMR1_CC1S_0; /* input pin 1 -> timer input 1 */
timer->EGR = TIM_EGR_UG;
timer->CR1 |= TIM_CR1_CEN;
}
diff --git a/bbb_cape/src/cape/encoder.h b/bbb_cape/src/cape/encoder.h
index 5a69835..c5b0bf0 100644
--- a/bbb_cape/src/cape/encoder.h
+++ b/bbb_cape/src/cape/encoder.h
@@ -18,10 +18,10 @@
static const uint16_t kHalf = 0xFFFF / 2;
uint16_t old = *counter & 0xFFFF;
int32_t counter_top = *counter ^ old;
- int32_t delta = (int32_t)new - (int32_t)old;
+ int32_t delta = (int32_t)old - (int32_t)new;
int32_t new_counter;
if (__builtin_expect(delta < -kHalf, 0)) {
- new_counter = counter_top - 0x10000;
+ new_counter = (counter_top - 0x10000) ^ 0xFFFF;
} else if (__builtin_expect(delta > kHalf, 0)) {
new_counter = counter_top + 0x10000;
} else {
@@ -39,12 +39,13 @@
uint32_t new) {
uint16_t old = *counter & 0xFFFF;
int64_t counter_top = *counter ^ old;
+ int64_t new_counter;
if (__builtin_expect(new < old, 0)) {
- *counter = counter_top + 0x10000;
+ new_counter = counter_top + 0x10000;
} else {
- *counter = counter_top;
+ new_counter = counter_top;
}
- *counter |= new;
+ *counter = new_counter | new;
}
// number is the 0-indexed number on the silkscreen
diff --git a/bbb_cape/src/cape/fill_packet.c b/bbb_cape/src/cape/fill_packet.c
index 4f1c717..2c95ef1 100644
--- a/bbb_cape/src/cape/fill_packet.c
+++ b/bbb_cape/src/cape/fill_packet.c
@@ -58,7 +58,7 @@
The_size_of_the_data_is_wrong);
struct DataStruct *packet = &data.packet;
- //do_fill_packet(packet);
+ do_fill_packet(packet);
uint32_t *p;
memcpy(&p, &packet, sizeof(void *));
diff --git a/bbb_cape/src/cape/uart_dma.c b/bbb_cape/src/cape/uart_dma.c
index ed576b4..538cc32 100644
--- a/bbb_cape/src/cape/uart_dma.c
+++ b/bbb_cape/src/cape/uart_dma.c
@@ -9,13 +9,13 @@
#define DMA_Stream DMA2_Stream7
#define DMA_SR DMA2->HISR
#define DMA_FCR DMA2->HIFCR
-#define DMA_SR_SHIFT 3
#define DMA_Stream_IRQHandler DMA2_Stream7_IRQHandler
#define DMA_Stream_IRQn DMA2_Stream7_IRQn
#define DMA_CHANNEL_NUMBER 4
#define RCC_AHB1ENR_DMAEN RCC_AHB1ENR_DMA2EN
-#define DMA_SR_BIT(bit) (1 << (bit + 6 * DMA_SR_SHIFT))
+#define DMA_SR_SHIFT(value) ((value) << 22)
+#define DMA_SR_BIT(bit) DMA_SR_SHIFT(1 << (bit))
void uart_dma_callback(uint8_t *new_buffer) __attribute__((weak));
void uart_dma_callback(uint8_t *new_buffer) {}
@@ -23,7 +23,6 @@
static uint8_t *volatile buffer1, *volatile buffer2;
void DMA_Stream_IRQHandler(void) {
- led_set(LED_DB, 1);
uint32_t status = DMA_SR;
if (status & DMA_SR_BIT(5)) { // transfer completed
DMA_FCR = DMA_SR_BIT(5);
@@ -69,11 +68,10 @@
DMA_SxFCR_DMDIS /* disable direct mode (enable the FIFO) */ |
1 /* 1/2 full threshold */;
UART->SR = ~USART_SR_TC;
- DMA_FCR = 0xF << DMA_SR_SHIFT;
+ DMA_FCR = DMA_SR_SHIFT(1 << 0 | 1 << 2 | 1 << 3 | 1 << 4 | 1 << 5);
DMA_Stream->CR |= DMA_SxCR_EN; // enable it
NVIC_SetPriority(DMA_Stream_IRQn, 8);
NVIC_EnableIRQ(DMA_Stream_IRQn);
uart_dma_callback(buffer2);
- led_set(LED_Z, 1);
}