Remove brain-dead attempt at dealing with FPGA time wrapping
It took a lock in a bad place.
Also, if it was ever actually used, it would trigger undefined behavior
in various places in WPILib and our code that still use 32-bit ints for
the result...
Change-Id: I57672096ccead70815b770f31c9cada0557499f1
diff --git a/frc971/wpilib/dma_edge_counting.h b/frc971/wpilib/dma_edge_counting.h
index 6d88170..37f5837 100644
--- a/frc971/wpilib/dma_edge_counting.h
+++ b/frc971/wpilib/dma_edge_counting.h
@@ -189,7 +189,7 @@
::std::vector<DMASampleHandlerInterface *> handlers_;
// The time at which we most recently read the sensor values.
- uint32_t sample_time_ = 0.0;
+ uint32_t sample_time_ = 0;
DISALLOW_COPY_AND_ASSIGN(DMASynchronizer);
};